DE69018832T2 - EEPROM-Zelle mit einschichtigem Metallgate und mit einem Lese-Interface des externen Schaltkreises, welches isoliert ist vom Schreib/Lösch-Interface des Programmierungsschaltkreises. - Google Patents

EEPROM-Zelle mit einschichtigem Metallgate und mit einem Lese-Interface des externen Schaltkreises, welches isoliert ist vom Schreib/Lösch-Interface des Programmierungsschaltkreises.

Info

Publication number
DE69018832T2
DE69018832T2 DE69018832T DE69018832T DE69018832T2 DE 69018832 T2 DE69018832 T2 DE 69018832T2 DE 69018832 T DE69018832 T DE 69018832T DE 69018832 T DE69018832 T DE 69018832T DE 69018832 T2 DE69018832 T2 DE 69018832T2
Authority
DE
Germany
Prior art keywords
interface
write
isolated
metal gate
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69018832T
Other languages
English (en)
Other versions
DE69018832D1 (de
Inventor
Nuccio Villa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
SGS Thomson Microelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SRL filed Critical SGS Thomson Microelectronics SRL
Publication of DE69018832D1 publication Critical patent/DE69018832D1/de
Application granted granted Critical
Publication of DE69018832T2 publication Critical patent/DE69018832T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
DE69018832T 1990-12-31 1990-12-31 EEPROM-Zelle mit einschichtigem Metallgate und mit einem Lese-Interface des externen Schaltkreises, welches isoliert ist vom Schreib/Lösch-Interface des Programmierungsschaltkreises. Expired - Fee Related DE69018832T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP90830622A EP0493640B1 (de) 1990-12-31 1990-12-31 EEPROM-Zelle mit einschichtigem Metallgate und mit einem Lese-Interface des externen Schaltkreises, welches isoliert ist vom Schreib/Lösch-Interface des Programmierungsschaltkreises

Publications (2)

Publication Number Publication Date
DE69018832D1 DE69018832D1 (de) 1995-05-24
DE69018832T2 true DE69018832T2 (de) 1995-11-23

Family

ID=8206046

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69018832T Expired - Fee Related DE69018832T2 (de) 1990-12-31 1990-12-31 EEPROM-Zelle mit einschichtigem Metallgate und mit einem Lese-Interface des externen Schaltkreises, welches isoliert ist vom Schreib/Lösch-Interface des Programmierungsschaltkreises.

Country Status (3)

Country Link
EP (1) EP0493640B1 (de)
JP (1) JPH0685275A (de)
DE (1) DE69018832T2 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2596695B2 (ja) * 1993-05-07 1997-04-02 インターナショナル・ビジネス・マシーンズ・コーポレイション Ｅｅｐｒｏｍ
US5604700A (en) * 1995-07-28 1997-02-18 Motorola, Inc. Non-volatile memory cell having a single polysilicon gate
US5896315A (en) * 1997-04-11 1999-04-20 Programmable Silicon Solutions Nonvolatile memory
DE19846211A1 (de) * 1998-10-07 2000-04-20 Siemens Ag Nichtflüchtige EPROM-Speicherzelle mit baulich getrenntem Programmierbereich und Lesebereich
US6404006B2 (en) 1998-12-01 2002-06-11 Vantis Corporation EEPROM cell with tunneling across entire separated channels
US5969992A (en) * 1998-12-21 1999-10-19 Vantis Corporation EEPROM cell using P-well for tunneling across a channel
US6294810B1 (en) 1998-12-22 2001-09-25 Vantis Corporation EEPROM cell with tunneling at separate edge and channel regions
US6294811B1 (en) 1999-02-05 2001-09-25 Vantis Corporation Two transistor EEPROM cell
WO2001011687A1 (en) * 1999-08-06 2001-02-15 Vantis Corporation Gate isolated triple-well non-volatile cell
JP4605956B2 (ja) 2001-09-19 2011-01-05 株式会社リコー 半導体装置の製造方法
WO2004006264A2 (en) * 2002-07-08 2004-01-15 Koninklijke Philips Electronics N.V. Erasable and programmable non-volatile cell
JP2004165182A (ja) 2002-11-08 2004-06-10 Ricoh Co Ltd 半導体装置
JP4795660B2 (ja) 2004-09-29 2011-10-19 ルネサスエレクトロニクス株式会社 半導体装置
WO2006068265A1 (en) 2004-12-24 2006-06-29 Ricoh Company, Ltd. Semiconductor device
JP4548603B2 (ja) * 2005-06-08 2010-09-22 セイコーエプソン株式会社 半導体装置
JP2006344735A (ja) * 2005-06-08 2006-12-21 Seiko Epson Corp 半導体装置
JP4889268B2 (ja) * 2005-09-22 2012-03-07 ルネサスエレクトロニクス株式会社 Ｅｅｐｒｏｍとｅｅｐｒｏｍの駆動方法
DE102006024121B4 (de) * 2006-05-22 2011-02-24 Telefunken Semiconductors Gmbh & Co. Kg Nichtflüchtige Speicherzelle einer in einem Halbleiterplättchen integrierten Schaltung, Verfahren zu deren Herstellung und Verwendung einer nichtflüchtigen Speicherzelle
DE102006038936A1 (de) 2006-08-18 2008-02-28 Atmel Germany Gmbh Schaltregler, Transceiverschaltung und schlüsselloses Zugangskontrollsystem
JP5130571B2 (ja) * 2007-06-19 2013-01-30 ルネサスエレクトロニクス株式会社 半導体装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1198109B (it) * 1986-11-18 1988-12-21 Sgs Microelettronica Spa Cella di memoria eeprom a singolo livello di polisilicio con zona di ossido di tunnel
IT1199828B (it) * 1986-12-22 1989-01-05 Sgs Microelettronica Spa Cella di memoria eeprom a singolo livello di polisilicio scrivibile e cancellabile bit a bit
JPH02125470A (ja) * 1988-06-15 1990-05-14 Seiko Instr Inc 半導体不揮発性メモリ

Also Published As

Publication number Publication date
JPH0685275A (ja) 1994-03-25
DE69018832D1 (de) 1995-05-24
EP0493640A1 (de) 1992-07-08
EP0493640B1 (de) 1995-04-19

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Legal Events

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8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee