IN2014DE00712A - - Google Patents

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Publication number
IN2014DE00712A
IN2014DE00712A IN712DE2014A IN2014DE00712A IN 2014DE00712 A IN2014DE00712 A IN 2014DE00712A IN 712DE2014 A IN712DE2014 A IN 712DE2014A IN 2014DE00712 A IN2014DE00712 A IN 2014DE00712A
Authority
IN
India
Prior art keywords
soc
wide input
output memory
bump groups
chip
Prior art date
Application number
Other languages
English (en)
Inventor
Tae-Sun Kim
Lim-Kyoung-Mook
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of IN2014DE00712A publication Critical patent/IN2014DE00712A/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Memory System (AREA)
IN712DE2014 2013-03-15 2014-03-12 IN2014DE00712A (cg-RX-API-DMAC7.html)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020130027658A KR102029682B1 (ko) 2013-03-15 2013-03-15 반도체 장치 및 반도체 패키지

Publications (1)

Publication Number Publication Date
IN2014DE00712A true IN2014DE00712A (cg-RX-API-DMAC7.html) 2015-06-19

Family

ID=50792497

Family Applications (1)

Application Number Title Priority Date Filing Date
IN712DE2014 IN2014DE00712A (cg-RX-API-DMAC7.html) 2013-03-15 2014-03-12

Country Status (8)

Country Link
US (1) US9275688B2 (cg-RX-API-DMAC7.html)
JP (1) JP2014182794A (cg-RX-API-DMAC7.html)
KR (1) KR102029682B1 (cg-RX-API-DMAC7.html)
CN (1) CN104051410B (cg-RX-API-DMAC7.html)
DE (1) DE102014103186B4 (cg-RX-API-DMAC7.html)
IN (1) IN2014DE00712A (cg-RX-API-DMAC7.html)
NL (1) NL2012389B1 (cg-RX-API-DMAC7.html)
TW (1) TWI606569B (cg-RX-API-DMAC7.html)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9324397B1 (en) * 2015-01-16 2016-04-26 Qualcomm Incorporated Common die for supporting different external memory types with minimal packaging complexity
TWI561960B (en) * 2015-11-05 2016-12-11 Sunplus Technology Co Ltd Clock providing system
KR102413441B1 (ko) 2015-11-12 2022-06-28 삼성전자주식회사 반도체 패키지
KR102468698B1 (ko) * 2015-12-23 2022-11-22 에스케이하이닉스 주식회사 메모리 장치
DE102016011750A1 (de) * 2016-09-29 2018-03-29 Ceramtec-Etec Gmbh Datenträger aus Keramik
US11514996B2 (en) * 2017-07-30 2022-11-29 Neuroblade Ltd. Memory-based processors
KR20190087893A (ko) * 2018-01-17 2019-07-25 삼성전자주식회사 클럭을 공유하는 반도체 패키지 및 전자 시스템
KR102836932B1 (ko) * 2018-09-06 2025-07-22 뉴로블레이드, 리미티드. 메모리 기반 프로세서
WO2020240239A1 (en) * 2019-05-31 2020-12-03 Micron Technology, Inc. Memory component for a system-on-chip device

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US5223454A (en) * 1988-01-29 1993-06-29 Hitachi, Ltd. Method of manufacturing semiconductor integrated circuit device
US6809421B1 (en) * 1996-12-02 2004-10-26 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
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US7173877B2 (en) * 2004-09-30 2007-02-06 Infineon Technologies Ag Memory system with two clock lines and a memory device
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JP4910512B2 (ja) * 2006-06-30 2012-04-04 富士通セミコンダクター株式会社 半導体装置および半導体装置の製造方法
US8059443B2 (en) 2007-10-23 2011-11-15 Hewlett-Packard Development Company, L.P. Three-dimensional memory module architectures
US20100140750A1 (en) * 2008-12-10 2010-06-10 Qualcomm Incorporated Parallel Plane Memory and Processor Coupling in a 3-D Micro-Architectural System
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US8174876B2 (en) * 2009-06-19 2012-05-08 Hynix Semiconductor Inc. Fusion memory device embodied with phase change memory devices having different resistance distributions and data processing system using the same
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CN102891114B (zh) * 2012-10-24 2015-01-28 上海新储集成电路有限公司 一种上下堆叠的片上系统芯片的制作方法

Also Published As

Publication number Publication date
CN104051410B (zh) 2018-05-01
JP2014182794A (ja) 2014-09-29
TWI606569B (zh) 2017-11-21
KR20140112944A (ko) 2014-09-24
KR102029682B1 (ko) 2019-10-08
TW201436165A (zh) 2014-09-16
US20140268979A1 (en) 2014-09-18
DE102014103186A1 (de) 2014-09-18
NL2012389B1 (en) 2016-07-15
CN104051410A (zh) 2014-09-17
DE102014103186B4 (de) 2021-05-27
US9275688B2 (en) 2016-03-01
NL2012389A (en) 2014-09-16

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