IN191647B - - Google Patents
Info
- Publication number
- IN191647B IN191647B IN1704CA1997A IN191647B IN 191647 B IN191647 B IN 191647B IN 1704CA1997 A IN1704CA1997 A IN 1704CA1997A IN 191647 B IN191647 B IN 191647B
- Authority
- IN
- India
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19639026A DE19639026C1 (de) | 1996-09-23 | 1996-09-23 | Selbstjustierte nichtflüchtige Speicherzelle |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| IN191647B true IN191647B (instruction) | 2003-12-13 |
Family
ID=7806628
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IN1704CA1997 IN191647B (instruction) | 1996-09-23 | 1997-09-16 |
Country Status (11)
| Country | Link |
|---|---|
| EP (1) | EP0948816B1 (instruction) |
| JP (1) | JP2001501034A (instruction) |
| KR (1) | KR20000048526A (instruction) |
| CN (1) | CN1135628C (instruction) |
| AT (1) | ATE265091T1 (instruction) |
| BR (1) | BR9712840A (instruction) |
| DE (2) | DE19639026C1 (instruction) |
| IN (1) | IN191647B (instruction) |
| RU (1) | RU2205471C2 (instruction) |
| UA (1) | UA57034C2 (instruction) |
| WO (1) | WO1998013878A1 (instruction) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2810161B1 (fr) * | 2000-06-09 | 2005-03-11 | Commissariat Energie Atomique | Memoire electronique a architecture damascene et procede de realisation d'une telle memoire |
| DE10162261B4 (de) * | 2001-12-18 | 2005-09-15 | Infineon Technologies Ag | Speicherzelle mit Grabentransistor |
| TW575960B (en) * | 2001-12-18 | 2004-02-11 | Infineon Technologies Ag | Memory cell with trench transistor |
| US6661053B2 (en) | 2001-12-18 | 2003-12-09 | Infineon Technologies Ag | Memory cell with trench transistor |
| DE10204873C1 (de) | 2002-02-06 | 2003-10-09 | Infineon Technologies Ag | Herstellungsverfahren für Speicherzelle |
| DE10226964A1 (de) * | 2002-06-17 | 2004-01-08 | Infineon Technologies Ag | Verfahren zur Herstellung einer NROM-Speicherzellenanordnung |
| DE10229065A1 (de) * | 2002-06-28 | 2004-01-29 | Infineon Technologies Ag | Verfahren zur Herstellung eines NROM-Speicherzellenfeldes |
| DE10306318B4 (de) * | 2003-02-14 | 2010-07-22 | Infineon Technologies Ag | Halbleiter-Schaltungsanordnung mit Grabenisolation und Herstellungsverfahren |
| KR100674952B1 (ko) * | 2005-02-05 | 2007-01-26 | 삼성전자주식회사 | 3차원 플래쉬 메모리 소자 및 그 제조방법 |
| US7365382B2 (en) * | 2005-02-28 | 2008-04-29 | Infineon Technologies Ag | Semiconductor memory having charge trapping memory cells and fabrication method thereof |
| US7312490B2 (en) * | 2005-03-31 | 2007-12-25 | Intel Corporation | Vertical memory device and method |
| KR100707217B1 (ko) * | 2006-05-26 | 2007-04-13 | 삼성전자주식회사 | 리세스-타입 제어 게이트 전극을 구비하는 반도체 메모리소자 및 그 제조 방법 |
| KR101131136B1 (ko) * | 2006-10-19 | 2012-04-03 | 삼성전자주식회사 | 리세스-타입 제어 게이트 전극을 구비하는 반도체 메모리소자의 동작 방법 |
| CN101221955B (zh) * | 2006-11-20 | 2010-06-09 | 旺宏电子股份有限公司 | 有扩散阻挡结构的栅极二极管非易失性存储器及制造方法 |
| JP5301123B2 (ja) | 2007-07-25 | 2013-09-25 | スパンション エルエルシー | 半導体装置及びその製造方法 |
| JP5546740B2 (ja) * | 2008-05-23 | 2014-07-09 | ローム株式会社 | 半導体装置 |
| WO2010114406A1 (ru) * | 2009-03-30 | 2010-10-07 | Murashev Viktor Nikolaevich | Ячейка памяти для быстродействующего эсппзу и способ ее программирования |
| RU2436190C1 (ru) * | 2010-04-13 | 2011-12-10 | Учреждение Российской академии наук Физико-технологический институт РАН (ФТИАН) | Ячейка энергонезависимой электрически перепрограммируемой памяти |
| RU2465659C1 (ru) * | 2011-08-09 | 2012-10-27 | Федеральное государственное автономное образовательное учреждение высшего профессионального образования "Национальный исследовательский технологический университет "МИСиС" | Ячейка памяти для быстродействующего эсппзу с управляемым потенциалом подзатворной области |
| JP5815786B2 (ja) * | 2014-04-09 | 2015-11-17 | ローム株式会社 | 半導体装置 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0715953B2 (ja) * | 1985-08-09 | 1995-02-22 | 株式会社リコー | 書換え可能なメモリ装置とその製造方法 |
| JPS6285468A (ja) * | 1985-10-09 | 1987-04-18 | Nippon Denso Co Ltd | 不揮発性半導体記憶装置 |
| US5045490A (en) * | 1990-01-23 | 1991-09-03 | Texas Instruments Incorporated | Method of making a pleated floating gate trench EPROM |
| JP2925312B2 (ja) * | 1990-11-30 | 1999-07-28 | 株式会社東芝 | 半導体基板の製造方法 |
| RU2018994C1 (ru) * | 1992-03-31 | 1994-08-30 | Константин Иванович Баринов | Элемент памяти |
| JP2889061B2 (ja) * | 1992-09-25 | 1999-05-10 | ローム株式会社 | 半導体記憶装置およびその製法 |
| KR0125113B1 (ko) * | 1993-02-02 | 1997-12-11 | 모리시타 요이찌 | 불휘발성 반도체 메모리 집적장치 및 그 제조방법 |
| JPH0738002A (ja) * | 1993-07-22 | 1995-02-07 | Toshiba Corp | 半導体装置及びその半導体装置を用いた不揮発性半導体メモリとそのメモリの駆動回路 |
-
1996
- 1996-09-23 DE DE19639026A patent/DE19639026C1/de not_active Expired - Fee Related
-
1997
- 1997-09-15 BR BR9712840-6A patent/BR9712840A/pt not_active IP Right Cessation
- 1997-09-15 DE DE59711553T patent/DE59711553D1/de not_active Expired - Lifetime
- 1997-09-15 KR KR1019990702433A patent/KR20000048526A/ko not_active Abandoned
- 1997-09-15 RU RU99108463/28A patent/RU2205471C2/ru not_active IP Right Cessation
- 1997-09-15 AT AT97944710T patent/ATE265091T1/de not_active IP Right Cessation
- 1997-09-15 UA UA99031564A patent/UA57034C2/uk unknown
- 1997-09-15 JP JP10515143A patent/JP2001501034A/ja not_active Abandoned
- 1997-09-15 EP EP97944710A patent/EP0948816B1/de not_active Expired - Lifetime
- 1997-09-15 WO PCT/DE1997/002066 patent/WO1998013878A1/de active IP Right Grant
- 1997-09-15 CN CNB971999996A patent/CN1135628C/zh not_active Expired - Fee Related
- 1997-09-16 IN IN1704CA1997 patent/IN191647B/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| WO1998013878A1 (de) | 1998-04-02 |
| KR20000048526A (ko) | 2000-07-25 |
| UA57034C2 (uk) | 2003-06-16 |
| DE19639026C1 (de) | 1998-04-09 |
| EP0948816B1 (de) | 2004-04-21 |
| DE59711553D1 (de) | 2004-05-27 |
| ATE265091T1 (de) | 2004-05-15 |
| JP2001501034A (ja) | 2001-01-23 |
| RU2205471C2 (ru) | 2003-05-27 |
| CN1135628C (zh) | 2004-01-21 |
| BR9712840A (pt) | 2000-12-05 |
| EP0948816A1 (de) | 1999-10-13 |
| CN1238857A (zh) | 1999-12-15 |