IL147791A0 - A method and apparatus for generating multiple bits of a pseudonoise sequence with each clock pulse by computing the bits in parallel - Google Patents

A method and apparatus for generating multiple bits of a pseudonoise sequence with each clock pulse by computing the bits in parallel

Info

Publication number
IL147791A0
IL147791A0 IL14779100A IL14779100A IL147791A0 IL 147791 A0 IL147791 A0 IL 147791A0 IL 14779100 A IL14779100 A IL 14779100A IL 14779100 A IL14779100 A IL 14779100A IL 147791 A0 IL147791 A0 IL 147791A0
Authority
IL
Israel
Prior art keywords
bits
generator
parallel
sub
sequence
Prior art date
Application number
IL14779100A
Other languages
English (en)
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of IL147791A0 publication Critical patent/IL147791A0/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58—Random or pseudo-random number generators
    • G06F7/582—Pseudo-random number generators
    • G06F7/584—Pseudo-random number generators using finite field arithmetic, e.g. using a linear feedback shift register

Landscapes

  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Error Detection And Correction (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Complex Calculations (AREA)
  • Editing Of Facsimile Originals (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
IL14779100A 1999-08-31 2000-08-30 A method and apparatus for generating multiple bits of a pseudonoise sequence with each clock pulse by computing the bits in parallel IL147791A0 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/386,600 US6640236B1 (en) 1999-08-31 1999-08-31 Method and apparatus for generating multiple bits of a pseudonoise sequence with each clock pulse by computing the bits in parallel
PCT/US2000/023949 WO2001016699A1 (en) 1999-08-31 2000-08-30 A method and apparatus for generating multiple bits of a pseudonoise sequence with each clock pulse by computing the bits in parallel

Publications (1)

Publication Number Publication Date
IL147791A0 true IL147791A0 (en) 2002-08-14

Family

ID=23526279

Family Applications (2)

Application Number Title Priority Date Filing Date
IL14779100A IL147791A0 (en) 1999-08-31 2000-08-30 A method and apparatus for generating multiple bits of a pseudonoise sequence with each clock pulse by computing the bits in parallel
IL147791A IL147791A (en) 1999-08-31 2002-01-23 Method and device for the production of many houses of noise-like sequences at each clock pulse by calculating the houses in parallel

Family Applications After (1)

Application Number Title Priority Date Filing Date
IL147791A IL147791A (en) 1999-08-31 2002-01-23 Method and device for the production of many houses of noise-like sequences at each clock pulse by calculating the houses in parallel

Country Status (18)

Country Link
US (1) US6640236B1 (no)
EP (1) EP1214644B1 (no)
JP (1) JP4536980B2 (no)
KR (1) KR100768979B1 (no)
CN (1) CN1293459C (no)
AT (1) ATE308076T1 (no)
AU (1) AU781309B2 (no)
BR (1) BR0013633A (no)
CA (1) CA2380984C (no)
DE (1) DE60023525T2 (no)
HK (1) HK1047176B (no)
IL (2) IL147791A0 (no)
MX (1) MXPA02001889A (no)
NO (1) NO325775B1 (no)
RU (1) RU2267807C2 (no)
TW (1) TW501059B (no)
UA (1) UA70380C2 (no)
WO (1) WO2001016699A1 (no)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10147306A1 (de) * 2001-09-26 2003-07-03 Infineon Technologies Ag Verfahren und Vorrichtung zur Bestimmung von Initialisierungszuständen bei Pseudo-Noise-Folgen
WO2004017192A2 (en) * 2002-08-19 2004-02-26 Analog Devices Inc. Fast linear feedback shift register engine
EP1614028B1 (en) * 2003-04-08 2008-05-21 Nxp B.V. Configurable multi-step linear feedback shift register
US7383295B2 (en) * 2004-06-18 2008-06-03 Seagate Technology, Llc Selective sequence generation method and apparatus
US20080281892A1 (en) * 2004-09-22 2008-11-13 Erwin Hemming Method and Apparatus for Generating Pseudo Random Numbers
US20070127431A1 (en) * 2005-11-11 2007-06-07 Samsung Electronics Co., Ltd. Method and apparatus for generating pseudorandom binary sequence in communication system using linear feedback shift register
US7613757B1 (en) 2006-01-20 2009-11-03 L-3 Communications, Corp. System and method for parallel PN generation
US7953781B1 (en) 2007-05-29 2011-05-31 L-3 Communications Corp. System and method for memory-based parallel PN generation
US8503678B2 (en) * 2007-09-28 2013-08-06 Intel Corporation Suppressing power supply noise using data scrambling in double data rate memory systems
US7945050B2 (en) * 2007-09-28 2011-05-17 Intel Corporation Suppressing power supply noise using data scrambling in double data rate memory systems
KR100853391B1 (ko) * 2007-10-19 2008-08-21 주식회사 솔탑 Ｃｃｓｄｓ ｐｎ 고속처리 방법
US8176394B2 (en) * 2008-04-11 2012-05-08 Mediatek Inc. Linear feedback shift register structure and method
US9792246B2 (en) 2014-12-27 2017-10-17 Intel Corporation Lower-power scrambling with improved signal integrity

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2211169A5 (no) 1972-12-15 1974-07-12 Sle Citerel Lannion Elec
JPS5363943A (en) * 1976-11-19 1978-06-07 Koden Electronics Co Ltd Coefficient setting system for pseudoorandom number generator
JPS5840682A (ja) * 1981-09-04 1983-03-09 Hitachi Denshi Ltd 演算回路
JPS6197746A (ja) * 1984-10-15 1986-05-16 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 乱数発生装置
US4901307A (en) 1986-10-17 1990-02-13 Qualcomm, Inc. Spread spectrum multiple access communication system using satellite or terrestrial repeaters
US5109390A (en) 1989-11-07 1992-04-28 Qualcomm Incorporated Diversity receiver in a cdma cellular telephone system
US5101501A (en) 1989-11-07 1992-03-31 Qualcomm Incorporated Method and system for providing a soft handoff in communications in a cdma cellular telephone system
US5103459B1 (en) 1990-06-25 1999-07-06 Qualcomm Inc System and method for generating signal waveforms in a cdma cellular telephone system
JPH0457407A (ja) * 1990-06-27 1992-02-25 Fujitsu Ltd 直列ｐｎパターン並列発生回路、および、該回路の構成方法
JPH05241795A (ja) * 1992-02-26 1993-09-21 Nec Corp Ｍ系列乱数発生方式
US5228054A (en) 1992-04-03 1993-07-13 Qualcomm Incorporated Power-of-two length pseudo-noise sequence generator with fast offset adjustment
JPH0817381B2 (ja) * 1992-05-27 1996-02-21 株式会社毎日放送 演算処理回路を用いるスクランブル方法および装置
ZA938324B (en) 1992-11-24 1994-06-07 Qualcomm Inc Pilot carrier dot product circuit
KR970002951B1 (ko) * 1994-04-13 1997-03-13 양승택 2^n길이 의사 난수 계열 발생 장치
JPH0818550A (ja) * 1994-04-27 1996-01-19 N T T Ido Tsushinmo Kk 符号系列発生器
CN1103147C (zh) 1994-07-29 2003-03-12 夸尔柯姆股份有限公司 Cdma通信系统中进行搜索捕获的改进方法和装置
US5805648A (en) 1995-07-31 1998-09-08 Qualcomm Incorporated Method and apparatus for performing search acquisition in a CDMA communication system
US5910907A (en) 1997-02-20 1999-06-08 C.K. Chen Shift register based pseudorandom number generator
JP3587675B2 (ja) * 1998-02-18 2004-11-10 富士通株式会社 擬似雑音発生装置
US6141669A (en) * 1998-05-06 2000-10-31 Nortel Networks Corporation Pseudorandom binary sequence block shifter

Also Published As

Publication number Publication date
RU2267807C2 (ru) 2006-01-10
MXPA02001889A (es) 2002-10-31
AU781309B2 (en) 2005-05-12
KR100768979B1 (ko) 2007-10-22
NO325775B1 (no) 2008-07-14
AU7096500A (en) 2001-03-26
CA2380984C (en) 2013-04-02
WO2001016699A9 (en) 2002-09-12
CA2380984A1 (en) 2001-03-08
WO2001016699A1 (en) 2001-03-08
NO20020966L (no) 2002-02-27
IL147791A (en) 2007-06-03
JP4536980B2 (ja) 2010-09-01
DE60023525T2 (de) 2006-07-20
ATE308076T1 (de) 2005-11-15
BR0013633A (pt) 2002-07-02
EP1214644A1 (en) 2002-06-19
TW501059B (en) 2002-09-01
NO20020966D0 (no) 2002-02-27
UA70380C2 (uk) 2004-10-15
US6640236B1 (en) 2003-10-28
CN1371498A (zh) 2002-09-25
HK1047176B (zh) 2007-06-08
KR20020035584A (ko) 2002-05-11
HK1047176A1 (en) 2003-02-07
RU2002107980A (ru) 2004-02-10
EP1214644B1 (en) 2005-10-26
JP2003508953A (ja) 2003-03-04
CN1293459C (zh) 2007-01-03
DE60023525D1 (de) 2005-12-01

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