IL137026A - Method for manufacturing multi-layer wiring boards - Google Patents

Method for manufacturing multi-layer wiring boards

Info

Publication number
IL137026A
IL137026A IL13702698A IL13702698A IL137026A IL 137026 A IL137026 A IL 137026A IL 13702698 A IL13702698 A IL 13702698A IL 13702698 A IL13702698 A IL 13702698A IL 137026 A IL137026 A IL 137026A
Authority
IL
Israel
Prior art keywords
layer
column
metallic body
plating
forming
Prior art date
Application number
IL13702698A
Other languages
English (en)
Hebrew (he)
Other versions
IL137026A0 (en
Original Assignee
Daiwa Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Daiwa Kk filed Critical Daiwa Kk
Publication of IL137026A0 publication Critical patent/IL137026A0/xx
Publication of IL137026A publication Critical patent/IL137026A/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/062—Etching masks consisting of metals or alloys or metallic inorganic compounds
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0384—Etch stop layer, i.e. a buried barrier layer for preventing etching of layers under the etch stop layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/072—Electroless plating, e.g. finish plating or initial plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metallurgy (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
IL13702698A 1998-11-18 1998-11-18 Method for manufacturing multi-layer wiring boards IL137026A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP1998/005192 WO2000030420A1 (fr) 1998-11-18 1998-11-18 Procede de production de tableaux de connexions

Publications (2)

Publication Number Publication Date
IL137026A0 IL137026A0 (en) 2001-06-14
IL137026A true IL137026A (en) 2004-02-19

Family

ID=14209428

Family Applications (1)

Application Number Title Priority Date Filing Date
IL13702698A IL137026A (en) 1998-11-18 1998-11-18 Method for manufacturing multi-layer wiring boards

Country Status (7)

Country Link
US (1) US6527963B1 (zh)
EP (1) EP1049364A4 (zh)
JP (1) JP3217381B2 (zh)
KR (1) KR100343389B1 (zh)
CN (1) CN1173616C (zh)
IL (1) IL137026A (zh)
WO (1) WO2000030420A1 (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4383257B2 (ja) * 2004-05-31 2009-12-16 三洋電機株式会社 回路装置およびその製造方法
KR100652132B1 (ko) * 2004-07-12 2006-11-29 곽경숙 인쇄 회로 기판 및 이의 제작 방법
KR100589253B1 (ko) * 2005-12-13 2006-06-19 (주)엠케이켐앤텍 금속 회로가 도금된 세라믹 보드 및 이의 제조방법
JP4887232B2 (ja) * 2007-07-24 2012-02-29 日東電工株式会社 配線回路基板の製造方法
US9129955B2 (en) * 2009-02-04 2015-09-08 Texas Instruments Incorporated Semiconductor flip-chip system having oblong connectors and reduced trace pitches
KR101070098B1 (ko) * 2009-09-15 2011-10-04 삼성전기주식회사 인쇄회로기판 및 그의 제조 방법
KR101089959B1 (ko) 2009-09-15 2011-12-05 삼성전기주식회사 인쇄회로기판 및 그의 제조 방법
JP6543887B2 (ja) * 2014-02-24 2019-07-17 日立化成株式会社 バンプ付き配線基板及びその製造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0083488A3 (en) * 1981-12-31 1985-11-06 O'Hara, James Brian Method of producing printed circuits
JPS58213451A (ja) 1982-06-07 1983-12-12 Hitachi Ltd 多層配線の形成法
US4785137A (en) * 1984-04-30 1988-11-15 Allied Corporation Novel nickel/indium/other metal alloy for use in the manufacture of electrical contact areas of electrical devices
US4659587A (en) * 1984-10-11 1987-04-21 Hitachi, Ltd. Electroless plating process and process for producing multilayer wiring board
JPS61121392A (ja) * 1984-11-19 1986-06-09 日本電信電話株式会社 多層配線の製造方法
US4735694A (en) * 1986-06-18 1988-04-05 Macdermid, Incorporated Method for manufacture of printed circuit boards
JPH0710030B2 (ja) * 1990-05-18 1995-02-01 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 多層配線基板の製造方法
JPH05291744A (ja) 1992-04-10 1993-11-05 Hitachi Chem Co Ltd 多層配線板の製造法および多層金属層付絶縁基板
JPH0621651A (ja) * 1992-07-03 1994-01-28 Toshiba Corp 多層配線回路板及びその製造方法
US5480048A (en) * 1992-09-04 1996-01-02 Hitachi, Ltd. Multilayer wiring board fabricating method
US5600103A (en) * 1993-04-16 1997-02-04 Kabushiki Kaisha Toshiba Circuit devices and fabrication method of the same
JPH06310857A (ja) * 1993-04-26 1994-11-04 Hitachi Ltd 薄膜多層回路とその製造方法
JPH06314878A (ja) 1993-04-30 1994-11-08 Toppan Printing Co Ltd プリント配線板の製造方法

Also Published As

Publication number Publication date
CN1286013A (zh) 2001-02-28
US6527963B1 (en) 2003-03-04
CN1173616C (zh) 2004-10-27
JP3217381B2 (ja) 2001-10-09
IL137026A0 (en) 2001-06-14
KR100343389B1 (ko) 2002-07-15
KR20010034171A (ko) 2001-04-25
EP1049364A4 (en) 2004-06-09
WO2000030420A1 (fr) 2000-05-25
EP1049364A1 (en) 2000-11-02

Similar Documents

Publication Publication Date Title
US6555209B1 (en) Method of manufacturing multilayer wiring board
JP5213094B2 (ja) 導電バイアを誘電体層に埋め込む方法およびプロセス
TWI422302B (zh) Method for manufacturing multilayer flexible printed wiring board
US20060060558A1 (en) Method of fabricating package substrate using electroless nickel plating
US7169313B2 (en) Plating method for circuitized substrates
KR920005070B1 (ko) 양면배선기판의 제조방법
TWI442854B (zh) 印刷電路板及其製造方法
JPH0423485A (ja) プリント配線板とその製造法
EP1942711B1 (en) Method of manufacturing a wiring board including electroplating
US20030201242A1 (en) Method for manufacturing wiring circuit boards with bumps and method for forming bumps
JP4060629B2 (ja) メッキスルーホールの形成方法、及び多層配線基板の製造方法
US6527963B1 (en) Method of manufacturing multilayer wiring boards
US6455783B1 (en) Multilayer printed wiring board and method for manufacturing the same
US20060086535A1 (en) Method for producing multilayer printed wiring board, multilayer printed wiring board, and electronic device
KR920005072B1 (ko) 양면배선기판의 제조방법
US20040245210A1 (en) Method for the manufacture of printed circuit boards with embedded resistors
JP3575783B2 (ja) プリント配線板およびその製造方法
JP3527965B2 (ja) プリント配線板
KR101231522B1 (ko) 인쇄회로기판 및 그의 제조 방법
JP2000294933A (ja) 多層回路基板及びその製造方法
JP3178677B2 (ja) 多層配線基板の製造方法
GB2307351A (en) Printed circuit boards and their manufacture
JP4582277B2 (ja) 柱状金属体の形成方法及び多層配線基板の製造方法
JP4798858B2 (ja) 柱状金属体の形成方法及び多層配線基板の製造方法
JP2849163B2 (ja) 電子回路基板の製造方法

Legal Events

Date Code Title Description
FF Patent granted
KB Patent renewed
MM9K Patent not in force due to non-payment of renewal fees