HK68794A - Method and arrangements for testing megabit memory modules with arbitrary test patterns in a multiple bit test mode - Google Patents
Method and arrangements for testing megabit memory modules with arbitrary test patterns in a multiple bit test modeInfo
- Publication number
- HK68794A HK68794A HK68794A HK68794A HK68794A HK 68794 A HK68794 A HK 68794A HK 68794 A HK68794 A HK 68794A HK 68794 A HK68794 A HK 68794A HK 68794 A HK68794 A HK 68794A
- Authority
- HK
- Hong Kong
- Prior art keywords
- test
- memory modules
- testing
- arrangements
- arbitrary
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/30—Accessing single arrays
- G11C29/34—Accessing multiple bits simultaneously
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/267—Reconfiguring circuits for testing, e.g. LSSD, partitioning
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19863634352 DE3634352A1 (de) | 1986-10-08 | 1986-10-08 | Verfahren und anordnung zum testen von mega-bit-speicherbausteinen mit beliebigen testmustern im multi-bit-testmodus |
Publications (1)
Publication Number | Publication Date |
---|---|
HK68794A true HK68794A (en) | 1994-07-22 |
Family
ID=6311350
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
HK68794A HK68794A (en) | 1986-10-08 | 1994-07-14 | Method and arrangements for testing megabit memory modules with arbitrary test patterns in a multiple bit test mode |
Country Status (7)
Country | Link |
---|---|
US (1) | US4841525A (xx) |
EP (1) | EP0263470B1 (xx) |
JP (1) | JP2894691B2 (xx) |
KR (1) | KR960004739B1 (xx) |
AT (1) | ATE85862T1 (xx) |
DE (2) | DE3634352A1 (xx) |
HK (1) | HK68794A (xx) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2222461B (en) * | 1988-08-30 | 1993-05-19 | Mitsubishi Electric Corp | On chip testing of semiconductor memory devices |
JPH02276099A (ja) * | 1989-04-18 | 1990-11-09 | Mitsubishi Electric Corp | マイクロプロセッサ |
US5167020A (en) * | 1989-05-25 | 1992-11-24 | The Boeing Company | Serial data transmitter with dual buffers operating separately and having scan and self test modes |
EP0400179B1 (de) * | 1989-05-31 | 1995-07-19 | Siemens Aktiengesellschaft | Verfahren und Vorrichtung zum internen Paralleltest von Halbleiterspeichern |
JP2717712B2 (ja) * | 1989-08-18 | 1998-02-25 | 三菱電機株式会社 | 半導体記憶装置 |
EP0418521A3 (en) * | 1989-09-20 | 1992-07-15 | International Business Machines Corporation | Testable latch self checker |
US5113399A (en) * | 1989-10-16 | 1992-05-12 | Rockwell International Corporation | Memory test methodology |
US5073891A (en) * | 1990-02-14 | 1991-12-17 | Intel Corporation | Method and apparatus for testing memory |
US5159599A (en) * | 1990-07-31 | 1992-10-27 | Sgs-Thomson Microelectronics, Inc. | High speed testing for programmable logic devices |
DE4028819A1 (de) * | 1990-09-11 | 1992-03-12 | Siemens Ag | Schaltungsanordnung zum testen eines halbleiterspeichers mittels paralleltests mit verschiedenen testbitmustern |
US5200960A (en) * | 1990-09-21 | 1993-04-06 | Xerox Corporation | Streaming tape diagnostic |
JPH06242181A (ja) * | 1992-11-23 | 1994-09-02 | Texas Instr Inc <Ti> | 集積回路の試験装置及び方法 |
DE19639613A1 (de) * | 1996-09-26 | 1997-08-14 | Siemens Ag | Integrierter Speicher und Paralleltest-Schaltungsanordnung |
US5822513A (en) * | 1996-09-27 | 1998-10-13 | Emc Corporation | Method and apparatus for detecting stale write data |
US6539508B1 (en) | 2000-03-15 | 2003-03-25 | Xilinx, Inc. | Methods and circuits for testing programmable logic |
DE10133689C2 (de) * | 2001-07-11 | 2003-12-18 | Infineon Technologies Ag | Testverfahren und Testvorrichtung für elektronische Speicher |
US8794391B2 (en) | 2007-07-10 | 2014-08-05 | Ton-Rong TSENG | Safety braking system |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4195770A (en) * | 1978-10-24 | 1980-04-01 | Burroughs Corporation | Test generator for random access memories |
US4414665A (en) * | 1979-11-21 | 1983-11-08 | Nippon Telegraph & Telephone Public Corp. | Semiconductor memory device test apparatus |
US4319355A (en) * | 1979-12-28 | 1982-03-09 | Compagnia Internationale Pour L'informatique | Method of and apparatus for testing a memory matrix control character |
US4541090A (en) * | 1981-06-09 | 1985-09-10 | Matsushita Electric Industrial Co., Ltd. | Semiconductor memory device |
JPS57203298A (en) * | 1981-06-09 | 1982-12-13 | Matsushita Electric Ind Co Ltd | Semiconductor storage device |
JPS59119597A (ja) * | 1982-12-27 | 1984-07-10 | Fujitsu Ltd | 半導体記憶装置 |
JPS59185097A (ja) * | 1983-04-04 | 1984-10-20 | Oki Electric Ind Co Ltd | 自己診断機能付メモリ装置 |
JPS61145799A (ja) * | 1984-12-20 | 1986-07-03 | Fujitsu Ltd | メモリを内蔵した半導体集積回路 |
DE3583493D1 (de) * | 1984-12-28 | 1991-08-22 | Siemens Ag | Integrierter halbleiterspeicher. |
US4715034A (en) * | 1985-03-04 | 1987-12-22 | John Fluke Mfg. Co., Inc. | Method of and system for fast functional testing of random access memories |
EP0197363B1 (de) * | 1985-03-26 | 1990-05-30 | Siemens Aktiengesellschaft | Verfahren zum Betreiben eines Halbleiterspeichers mit integrierter Paralleltestmöglichkeit und Auswerteschaltung zur Durchführung des Verfahrens |
JPS6231439A (ja) * | 1985-08-03 | 1987-02-10 | Fujitsu Ltd | 命令再処理制御方式 |
-
1986
- 1986-10-08 DE DE19863634352 patent/DE3634352A1/de not_active Withdrawn
-
1987
- 1987-10-05 AT AT87114519T patent/ATE85862T1/de not_active IP Right Cessation
- 1987-10-05 US US07/104,155 patent/US4841525A/en not_active Expired - Lifetime
- 1987-10-05 EP EP87114519A patent/EP0263470B1/de not_active Expired - Lifetime
- 1987-10-05 DE DE8787114519T patent/DE3784209D1/de not_active Expired - Lifetime
- 1987-10-06 JP JP62253452A patent/JP2894691B2/ja not_active Expired - Lifetime
- 1987-10-06 KR KR1019870011298A patent/KR960004739B1/ko not_active IP Right Cessation
-
1994
- 1994-07-14 HK HK68794A patent/HK68794A/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0263470B1 (de) | 1993-02-17 |
DE3634352A1 (de) | 1988-04-21 |
KR880005623A (ko) | 1988-06-29 |
JPS63106997A (ja) | 1988-05-12 |
EP0263470A2 (de) | 1988-04-13 |
KR960004739B1 (ko) | 1996-04-12 |
DE3784209D1 (de) | 1993-03-25 |
US4841525A (en) | 1989-06-20 |
JP2894691B2 (ja) | 1999-05-24 |
ATE85862T1 (de) | 1993-03-15 |
EP0263470A3 (en) | 1989-11-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PC | Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee) |