HK1034804A1 - Mixed fuse technologies. - Google Patents

Mixed fuse technologies.

Info

Publication number
HK1034804A1
HK1034804A1 HK01105209A HK01105209A HK1034804A1 HK 1034804 A1 HK1034804 A1 HK 1034804A1 HK 01105209 A HK01105209 A HK 01105209A HK 01105209 A HK01105209 A HK 01105209A HK 1034804 A1 HK1034804 A1 HK 1034804A1
Authority
HK
Hong Kong
Prior art keywords
fuse technologies
mixed
mixed fuse
technologies
fuse
Prior art date
Application number
HK01105209A
Other languages
English (en)
Inventor
Chandrasekhar Narayan
Kenneth Arndt
David Lachtrupp
Axel Brintzinger
Gabriel Daniel
Toshiaki Kirihata
Original Assignee
Infineon Technologies Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Corp filed Critical Infineon Technologies Corp
Publication of HK1034804A1 publication Critical patent/HK1034804A1/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/22Connection or disconnection of sub-entities or redundant parts of a device in response to a measurement
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H01L23/5258Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Fuses (AREA)
HK01105209A 1999-07-27 2001-07-26 Mixed fuse technologies. HK1034804A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/361,960 US6288436B1 (en) 1999-07-27 1999-07-27 Mixed fuse technologies

Publications (1)

Publication Number Publication Date
HK1034804A1 true HK1034804A1 (en) 2001-11-02

Family

ID=23424113

Family Applications (1)

Application Number Title Priority Date Filing Date
HK01105209A HK1034804A1 (en) 1999-07-27 2001-07-26 Mixed fuse technologies.

Country Status (8)

Country Link
US (1) US6288436B1 (ja)
EP (1) EP1073118B1 (ja)
JP (1) JP3470960B2 (ja)
KR (1) KR100399493B1 (ja)
CN (1) CN1177366C (ja)
DE (1) DE60011190T2 (ja)
HK (1) HK1034804A1 (ja)
TW (1) TW461070B (ja)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6249038B1 (en) * 1999-06-04 2001-06-19 International Business Machines Corporation Method and structure for a semiconductor fuse
DE10026926C2 (de) * 2000-05-30 2002-06-20 Infineon Technologies Ag Halbleiteranordnung mit optischer Fuse
US6355968B1 (en) * 2000-08-10 2002-03-12 Infineon Technologies Ag Wiring through terminal via fuse
DE10123686C1 (de) 2001-05-15 2003-03-20 Infineon Technologies Ag Verfahren zur Herstellung eines elektronischen Bauelements, insbesondere eines Speicherchips und dadurch hergestelltes elektronische Bauelement
US6704228B2 (en) * 2001-12-28 2004-03-09 Samsung Electronics Co., Ltd Semiconductor memory device post-repair circuit and method
KR100853460B1 (ko) * 2002-07-19 2008-08-21 주식회사 하이닉스반도체 반도체 장치 제조방법
TW538518B (en) * 2002-07-19 2003-06-21 Nanya Technology Corp Fuse structure
US6906969B2 (en) * 2002-09-24 2005-06-14 Infineon Technologies Aktiengesellschaft Hybrid fuses for redundancy
JP3884374B2 (ja) * 2002-12-06 2007-02-21 株式会社東芝 半導体装置
US6835642B2 (en) * 2002-12-18 2004-12-28 Taiwan Semiconductor Manufacturing Co., Ltd Method of forming a metal fuse on semiconductor devices
DE10349749B3 (de) 2003-10-23 2005-05-25 Infineon Technologies Ag Anti-Fuse-Verbindung für integrierte Schaltungen sowie Verfahren zur Herstellung von Anti-Fuse-Verbindungen
US6946718B2 (en) * 2004-01-05 2005-09-20 Hewlett-Packard Development Company, L.P. Integrated fuse for multilayered structure
JP2005209903A (ja) * 2004-01-23 2005-08-04 Fujitsu Ltd 半導体装置及びその製造方法
US7284168B2 (en) * 2005-01-26 2007-10-16 Hewlett-Packard Development Company, L.P. Method and system for testing RAM redundant integrated circuits
JP4959267B2 (ja) 2006-03-07 2012-06-20 ルネサスエレクトロニクス株式会社 半導体装置および電気ヒューズの抵抗値の増加方法
JP2012094928A (ja) * 2006-03-07 2012-05-17 Renesas Electronics Corp 半導体装置
JP4405488B2 (ja) * 2006-08-30 2010-01-27 株式会社東芝 半導体装置及び半導体装置の製造方法
US20080067600A1 (en) * 2006-09-19 2008-03-20 Louis Lu-Chen Hsu Storage Elements with Disguised Configurations and Methods of Using the Same
JP5248170B2 (ja) * 2008-04-03 2013-07-31 ルネサスエレクトロニクス株式会社 半導体装置
JP2009283506A (ja) * 2008-05-19 2009-12-03 Mitsumi Electric Co Ltd 半導体装置、半導体集積回路装置及び半導体装置の電気的特性の調整方法
US8208768B2 (en) * 2009-10-26 2012-06-26 United Microelectronics Corp. Focusing member and optoelectronic device
US8139907B2 (en) * 2009-12-29 2012-03-20 United Microelectronics Corp. Optoelectronic device and method of forming the same
KR101131557B1 (ko) * 2010-04-30 2012-04-04 주식회사 하이닉스반도체 반도체 메모리 장치의 리페어 회로 및 리페어 방법
KR20120105828A (ko) * 2011-03-16 2012-09-26 삼성전자주식회사 반도체 발광다이오드 칩, 그 제조방법 및 품질관리방법

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5066998A (en) 1989-06-30 1991-11-19 At&T Bell Laboratories Severable conductive path in an integrated-circuit device
JP2829156B2 (ja) * 1991-07-25 1998-11-25 株式会社東芝 不揮発性半導体記憶装置の冗長回路
US5285099A (en) 1992-12-15 1994-02-08 International Business Machines Corporation SiCr microfuses
US5314840A (en) 1992-12-18 1994-05-24 International Business Machines Corporation Method for forming an antifuse element with electrical or optical programming
US5323353A (en) * 1993-04-08 1994-06-21 Sharp Microelectronics Technology Inc. Method and apparatus for repair of memory by redundancy
JP3056019B2 (ja) 1993-05-11 2000-06-26 九州日本電気株式会社 半導体記憶装置
KR0119888B1 (ko) * 1994-04-11 1997-10-30 윤종용 반도체 메모리장치의 결함구제방법 및 그 회로
US5818748A (en) * 1995-11-21 1998-10-06 International Business Machines Corporation Chip function separation onto separate stacked chips
US5796746A (en) * 1995-12-22 1998-08-18 Micron Technology, Inc. Device and method for testing integrated circuit dice in an integrated circuit module
US5748031A (en) * 1996-02-01 1998-05-05 Cypress Semiconductor, Corporation Electrical laser fuse hybrid cell
US5847441A (en) * 1996-05-10 1998-12-08 Micron Technology, Inc. Semiconductor junction antifuse circuit
US5986319A (en) * 1997-03-19 1999-11-16 Clear Logic, Inc. Laser fuse and antifuse structures formed over the active circuitry of an integrated circuit
KR100269296B1 (ko) * 1997-04-22 2000-10-16 윤종용 메모리집적회로의승압전원회로및승압전원의전하량제어방법
JPH1117016A (ja) * 1997-06-25 1999-01-22 Hitachi Ltd 半導体集積回路装置およびその製造方法

Also Published As

Publication number Publication date
JP3470960B2 (ja) 2003-11-25
TW461070B (en) 2001-10-21
KR20010015353A (ko) 2001-02-26
KR100399493B1 (ko) 2003-09-26
EP1073118B1 (en) 2004-06-02
US6288436B1 (en) 2001-09-11
CN1177366C (zh) 2004-11-24
EP1073118A1 (en) 2001-01-31
CN1297255A (zh) 2001-05-30
JP2001068555A (ja) 2001-03-16
DE60011190T2 (de) 2005-06-30
DE60011190D1 (de) 2004-07-08

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Legal Events

Date Code Title Description
CORR Corrigendum

Free format text: CORRECTED DATA OF SECTION 27 TO JOURNAL OF 20050708: [72] - __

PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20080720