GB2320613B - Method for forming metal lines of semiconductor device - Google Patents

Method for forming metal lines of semiconductor device

Info

Publication number
GB2320613B
GB2320613B GB9725029A GB9725029A GB2320613B GB 2320613 B GB2320613 B GB 2320613B GB 9725029 A GB9725029 A GB 9725029A GB 9725029 A GB9725029 A GB 9725029A GB 2320613 B GB2320613 B GB 2320613B
Authority
GB
United Kingdom
Prior art keywords
semiconductor device
metal lines
forming metal
forming
lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9725029A
Other languages
English (en)
Other versions
GB9725029D0 (en
GB2320613A (en
Inventor
Seoung Wook Lee
Yeo Song Seol
Chang Ju Choi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hyundai Electronics Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Industries Co Ltd filed Critical Hyundai Electronics Industries Co Ltd
Publication of GB9725029D0 publication Critical patent/GB9725029D0/en
Publication of GB2320613A publication Critical patent/GB2320613A/en
Application granted granted Critical
Publication of GB2320613B publication Critical patent/GB2320613B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76885By forming conductive members before deposition of protective insulating material, e.g. pillars, studs

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
GB9725029A 1996-12-20 1997-11-26 Method for forming metal lines of semiconductor device Expired - Fee Related GB2320613B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960068902A KR100248342B1 (ko) 1996-12-20 1996-12-20 반도체소자의 금속 배선 형성방법

Publications (3)

Publication Number Publication Date
GB9725029D0 GB9725029D0 (en) 1998-01-28
GB2320613A GB2320613A (en) 1998-06-24
GB2320613B true GB2320613B (en) 2002-02-13

Family

ID=19489694

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9725029A Expired - Fee Related GB2320613B (en) 1996-12-20 1997-11-26 Method for forming metal lines of semiconductor device

Country Status (6)

Country Link
JP (1) JP3238363B2 (ko)
KR (1) KR100248342B1 (ko)
CN (1) CN1099700C (ko)
DE (1) DE19756227A1 (ko)
GB (1) GB2320613B (ko)
TW (1) TW350999B (ko)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100307629B1 (ko) * 1999-04-30 2001-09-26 윤종용 하이드로 카본계의 가스를 이용한 반사방지막의 형성 및 적용방법
KR100555484B1 (ko) * 1999-09-03 2006-03-03 삼성전자주식회사 반도체장치의 텅스텐 배선 제조방법
JP3733021B2 (ja) * 2000-12-15 2006-01-11 シャープ株式会社 プラズマプロセス方法
KR100399442B1 (ko) * 2001-06-28 2003-09-29 주식회사 하이닉스반도체 금속 배선 형성 방법
KR100425467B1 (ko) * 2001-09-29 2004-03-30 삼성전자주식회사 반도체소자를 위한 건식 식각방법
CN101593689B (zh) * 2008-05-29 2010-12-22 中芯国际集成电路制造(北京)有限公司 光刻图案的形成方法和双镶嵌结构的制造方法
JP5845714B2 (ja) * 2011-08-19 2016-01-20 住友電気工業株式会社 炭化珪素半導体装置の製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06314671A (ja) * 1993-04-30 1994-11-08 Sony Corp 半導体装置の製造方法
US5376585A (en) * 1992-09-25 1994-12-27 Texas Instruments Incorporated Method for forming titanium tungsten local interconnect for integrated circuits
JPH0869995A (ja) * 1994-08-30 1996-03-12 Sony Corp プラズマエッチング方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06318573A (ja) * 1993-05-07 1994-11-15 Sony Corp 高融点金属のエッチング方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5376585A (en) * 1992-09-25 1994-12-27 Texas Instruments Incorporated Method for forming titanium tungsten local interconnect for integrated circuits
JPH06314671A (ja) * 1993-04-30 1994-11-08 Sony Corp 半導体装置の製造方法
JPH0869995A (ja) * 1994-08-30 1996-03-12 Sony Corp プラズマエッチング方法

Also Published As

Publication number Publication date
KR100248342B1 (ko) 2000-03-15
CN1099700C (zh) 2003-01-22
GB9725029D0 (en) 1998-01-28
JP3238363B2 (ja) 2001-12-10
TW350999B (en) 1999-01-21
CN1185654A (zh) 1998-06-24
GB2320613A (en) 1998-06-24
DE19756227A1 (de) 1998-06-25
JPH10189594A (ja) 1998-07-21
KR19980050124A (ko) 1998-09-15

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20091126