KR100425467B1 - 반도체소자를 위한 건식 식각방법 - Google Patents
반도체소자를 위한 건식 식각방법 Download PDFInfo
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- KR100425467B1 KR100425467B1 KR10-2001-0060997A KR20010060997A KR100425467B1 KR 100425467 B1 KR100425467 B1 KR 100425467B1 KR 20010060997 A KR20010060997 A KR 20010060997A KR 100425467 B1 KR100425467 B1 KR 100425467B1
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- 238000000034 method Methods 0.000 title claims abstract description 78
- 239000004065 semiconductor Substances 0.000 title claims abstract description 76
- 238000001312 dry etching Methods 0.000 title claims abstract description 46
- 238000005530 etching Methods 0.000 claims abstract description 101
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 74
- 239000000758 substrate Substances 0.000 claims abstract description 56
- 239000000463 material Substances 0.000 claims abstract description 20
- 239000002826 coolant Substances 0.000 claims abstract description 4
- 239000007789 gas Substances 0.000 claims description 25
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 22
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 22
- 239000004020 conductor Substances 0.000 claims description 8
- 239000011261 inert gas Substances 0.000 claims description 6
- 238000010926 purge Methods 0.000 claims description 6
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 claims description 5
- 229910021342 tungsten silicide Inorganic materials 0.000 claims description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 4
- 229920005591 polysilicon Polymers 0.000 claims description 4
- 230000000087 stabilizing effect Effects 0.000 claims description 3
- 238000001035 drying Methods 0.000 claims 2
- 238000001816 cooling Methods 0.000 abstract description 3
- 239000013077 target material Substances 0.000 abstract description 2
- 238000000206 photolithography Methods 0.000 description 7
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 238000001878 scanning electron micrograph Methods 0.000 description 4
- 230000006641 stabilisation Effects 0.000 description 4
- 238000011105 stabilization Methods 0.000 description 4
- 238000011161 development Methods 0.000 description 3
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- 238000006552 photochemical reaction Methods 0.000 description 3
- 229910052786 argon Inorganic materials 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
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- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 239000004215 Carbon black (E152) Substances 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 125000004432 carbon atom Chemical group C* 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000000635 electron micrograph Methods 0.000 description 1
- 238000007687 exposure technique Methods 0.000 description 1
- ZVGNESXIJDCBKN-UUEYKCAUSA-N fidaxomicin Chemical compound O([C@@H]1[C@@H](C)O[C@H]([C@H]([C@H]1O)OC)OCC\1=C/C=C/C[C@H](O)/C(C)=C/[C@@H]([C@H](/C(C)=C/C(/C)=C/C[C@H](OC/1=O)[C@@H](C)O)O[C@H]1[C@H]([C@@H](O)[C@H](OC(=O)C(C)C)C(C)(C)O1)O)CC)C(=O)C1=C(O)C(Cl)=C(O)C(Cl)=C1CC ZVGNESXIJDCBKN-UUEYKCAUSA-N 0.000 description 1
- -1 for example Substances 0.000 description 1
- 229930195733 hydrocarbon Natural products 0.000 description 1
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- 238000001459 lithography Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
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- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
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- 239000010703 silicon Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
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- Photosensitive Polymer And Photoresist Processing (AREA)
Abstract
Description
Claims (19)
- 반도체기판상에 피식각물질층을 형성하는 단계;상기 피식각물질층상에 파장 193 nm 이하의 노광광원용 포토레지스트를 사용하여 포토레지스트 패턴을 형성하는 단계;상기 포토레지스트 패턴이 형성된 반도체기판을 건식 식각챔버 내의 칠러를 포함하는 스테이지상으로 로딩하는 단계; 및상기 칠러의 설정온도를 -20℃ 내지 5℃의 범위내에서 제어함으로써 상기 반도체기판을 소정의 온도 이하로 저온화하여 상기 피식각물질층을 건식 식각하는 단계를 포함하는 반도체소자를 위한 건식 식각방법.
- 제 1 항에 있어서, 상기 포토레지스트 패턴을 형성하는 단계에서 파장 193nm 이하의 노광광원을 사용하여 노광공정을 수행하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 제 1 항에 있어서, 상기 포토레지스트 패턴을 형성하기 전에 상기 피식각물질층상에 유기 반사방지층을 더 형성하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 삭제
- 삭제
- 제 1 항에 있어서, 상기 반도체기판의 온도는 35℃ 이하로 유지하여 건식 식각하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 제 1 항에 있어서, 상기 반도체기판의 온도를 저온화하여 식각하는 단계는,상기 식각단계중에 상기 반도체기판을 상기 식각챔버로부터 언로딩하는 단계;상기 식각챔버 내를 퍼지가스로 퍼지하는 단계; 및상기 반도체기판을 상기 식각챔버내로 다시 로딩하여 식각하는 단계를 포함하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 제 1 항에 있어서, 상기 반도체기판의 온도를 저온화하여 식각하는 단계는,상기 식각단계중에 상기 반도체기판을 안정화하는 단계에서 상기 식각챔버 내로 불활성가스의 유량을 증가시켜 온도를 저온화하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 반도체기판상에 도전물질층을 형성하는 단계;상기 도전물질층상에 실리콘나이트라이드층을 형성하는 단계;상기 실리콘나이트라이드층상에 반사방지층을 형성하는 단계;상기 반사방지층상에 ArF용 포토레지스트 패턴을 형성하는 단계;상기 포토레지스트 패턴이 형성된 반도체기판을 건식 식각챔버 내의 스테이지상으로 로딩하는 단계; 및상기 포토레지스트 패턴을 식각마스크로 하여 상기 반도체기판을 소정의 온도 이하로 저온화하여 상기 반사방지층 및 실리콘나이트라이드층을 건식 식각하는 단계를 포함하는 반도체소자를 위한 건식 식각방법.
- 제 9 항에 있어서, 상기 도전물질층은 폴리실리콘층 및 텅스텐실리사이드층으로 이루어진 것임을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 제 9 항에 있어서, 상기 스테이지는 상기 스테이지를 냉각시키는 냉매의 온도를 제어하는 칠러와 연결되며, 상기 반사방지층 및 실리콘나이트라이드층의 식각 단계에서 상기 반도체기판을 저온화하는 것은 상기 칠러의 설정온도를 제어함으로써 수행하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 제 11 항에 있어서, 상기 칠러의 온도는 -20℃ 내지 5℃ 의 범위내에서 설정하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 제 1 항에 있어서, 상기 반도체기판의 온도는 35℃ 이하로 유지하여 건식 식각하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 제 9 항에 있어서, 상기 반도체기판의 온도를 저온화하여 식각하는 단계는,상기 식각단계중에 상기 반도체기판을 안정화하는 단계에서 상기 식각챔버 내로 불활성가스의 유량을 증가시켜 온도를 저온화하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 제 9 항에 있어서, 상기 포토레지스트는 오니시(Ohnish) 파라미터가 3.2 이상인 포토레지스트를 사용하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 제 9 항에 있어서, 상기 포토레지스트는 3,000 내지 4,000 Å의 두께로 형성하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 제 16 항에 있어서, 상기 실리콘나이트라이드층은 2,000 Å 이상의 두께로 형성하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 제 10 항에 있어서, 상기 반사방지층은 O2및 CF4가스를 포함하는 식각가스를 사용하여 수행하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
- 제 10 항에 있어서, 상기 실리콘나이트라이드층은 O2, CF4, CHF3및 Ar 가스를 포함하는 식각가스를 사용하여 수행하는 것을 특징으로 하는 반도체소자를 위한 건식 식각방법.
Priority Applications (2)
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KR10-2001-0060997A KR100425467B1 (ko) | 2001-09-29 | 2001-09-29 | 반도체소자를 위한 건식 식각방법 |
US10/261,595 US7572736B2 (en) | 2001-09-29 | 2002-09-30 | Method of dry-etching semiconductor devices |
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KR10-2001-0060997A KR100425467B1 (ko) | 2001-09-29 | 2001-09-29 | 반도체소자를 위한 건식 식각방법 |
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KR20030027628A KR20030027628A (ko) | 2003-04-07 |
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Families Citing this family (6)
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KR100460068B1 (ko) * | 2002-08-05 | 2004-12-04 | 주식회사 하이닉스반도체 | 반도체소자의 금속배선 형성방법 |
KR100858874B1 (ko) * | 2002-12-26 | 2008-09-17 | 주식회사 하이닉스반도체 | 불화아르곤 노광원을 이용한 반도체소자 제조방법 |
DE102005004410B4 (de) * | 2005-01-31 | 2010-09-16 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zum Ausbilden einer Halbleiterstruktur mit Bemustern einer Schicht aus einem Material |
KR100875653B1 (ko) * | 2006-06-30 | 2008-12-26 | 주식회사 하이닉스반도체 | 반도체 소자의 미세 패턴 형성 방법 |
JP6170378B2 (ja) * | 2013-08-29 | 2017-07-26 | 東京エレクトロン株式会社 | エッチング方法 |
US20230014644A1 (en) * | 2019-12-13 | 2023-01-19 | National Research Council Of Canada | Vertically tapered spot size converter and method for fabricating the same |
Citations (5)
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KR890003002A (ko) * | 1987-07-29 | 1989-04-12 | 미다 가쓰시게 | 드라이 에칭 방법 |
JPH04233728A (ja) * | 1990-12-28 | 1992-08-21 | Sony Corp | ドライエッチング方法 |
JPH10199789A (ja) * | 1997-01-10 | 1998-07-31 | Sony Corp | 反射防止膜及びパターンニング方法 |
KR19980050124A (ko) * | 1996-12-20 | 1998-09-15 | 김영환 | 반도체소자의 금속 배선 형성방법 |
KR19990004915A (ko) * | 1997-06-30 | 1999-01-25 | 김영환 | 반도체 장치의 콘택홀 형성방법 |
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JP2734908B2 (ja) * | 1992-10-28 | 1998-04-02 | 住友金属工業株式会社 | プラズマ処理装置 |
US5571366A (en) * | 1993-10-20 | 1996-11-05 | Tokyo Electron Limited | Plasma processing apparatus |
US5763327A (en) * | 1995-11-08 | 1998-06-09 | Advanced Micro Devices, Inc. | Integrated arc and polysilicon etching process |
JPH09293707A (ja) * | 1996-04-30 | 1997-11-11 | Matsushita Electron Corp | 基板冷却装置および半導体製造装置 |
US6107135A (en) * | 1998-02-11 | 2000-08-22 | Kabushiki Kaisha Toshiba | Method of making a semiconductor memory device having a buried plate electrode |
JP3373147B2 (ja) * | 1998-02-23 | 2003-02-04 | シャープ株式会社 | フォトレジスト膜及びそのパターン形成方法 |
US6221776B1 (en) * | 1998-05-05 | 2001-04-24 | Cypress Semiconductor Corp. | Anti-reflective coating used as a disposable etch stop |
DE59914195D1 (de) * | 1998-08-04 | 2007-03-29 | Sram De Gmbh | Schalter für fahrradgetriebe |
US6207583B1 (en) * | 1998-09-04 | 2001-03-27 | Alliedsignal Inc. | Photoresist ashing process for organic and inorganic polymer dielectric materials |
US6221772B1 (en) * | 1999-07-14 | 2001-04-24 | United Microelectronics Corp. | Method of cleaning the polymer from within holes on a semiconductor wafer |
JP2001093888A (ja) * | 1999-09-27 | 2001-04-06 | Toshiba Corp | 半導体装置の製造方法 |
US6177341B1 (en) * | 2000-06-15 | 2001-01-23 | Vanguard International Semiconductor Corporation | Method for forming interconnections in semiconductor devices |
KR20020047490A (ko) * | 2000-12-13 | 2002-06-22 | 윤종용 | 실리콘을 함유하는 감광성 폴리머 및 이를 포함하는레지스트 조성물 |
US20030068898A1 (en) * | 2001-10-10 | 2003-04-10 | Chun-Hung Lee | Dry etching method for manufacturing processes of semiconductor devices |
JP3921234B2 (ja) * | 2002-02-28 | 2007-05-30 | キヤノンアネルバ株式会社 | 表面処理装置及びその製造方法 |
US6649532B1 (en) * | 2002-05-09 | 2003-11-18 | Applied Materials Inc. | Methods for etching an organic anti-reflective coating |
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Publication number | Priority date | Publication date | Assignee | Title |
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KR890003002A (ko) * | 1987-07-29 | 1989-04-12 | 미다 가쓰시게 | 드라이 에칭 방법 |
JPH04233728A (ja) * | 1990-12-28 | 1992-08-21 | Sony Corp | ドライエッチング方法 |
KR19980050124A (ko) * | 1996-12-20 | 1998-09-15 | 김영환 | 반도체소자의 금속 배선 형성방법 |
JPH10199789A (ja) * | 1997-01-10 | 1998-07-31 | Sony Corp | 反射防止膜及びパターンニング方法 |
KR19990004915A (ko) * | 1997-06-30 | 1999-01-25 | 김영환 | 반도체 장치의 콘택홀 형성방법 |
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US7572736B2 (en) | 2009-08-11 |
US20040063327A1 (en) | 2004-04-01 |
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