GB9824981D0 - Method of forming a semiconductor device - Google Patents

Method of forming a semiconductor device

Info

Publication number
GB9824981D0
GB9824981D0 GBGB9824981.6A GB9824981A GB9824981D0 GB 9824981 D0 GB9824981 D0 GB 9824981D0 GB 9824981 A GB9824981 A GB 9824981A GB 9824981 D0 GB9824981 D0 GB 9824981D0
Authority
GB
United Kingdom
Prior art keywords
forming
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GBGB9824981.6A
Other versions
GB2331624A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of GB9824981D0 publication Critical patent/GB9824981D0/en
Publication of GB2331624A publication Critical patent/GB2331624A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Drying Of Semiconductors (AREA)
GB9824981A 1997-11-13 1998-11-13 Plasma etching of a nitride layer over an oxide layer Withdrawn GB2331624A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9312183A JPH11145113A (en) 1997-11-13 1997-11-13 Etching method

Publications (2)

Publication Number Publication Date
GB9824981D0 true GB9824981D0 (en) 1999-01-06
GB2331624A GB2331624A (en) 1999-05-26

Family

ID=18026226

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9824981A Withdrawn GB2331624A (en) 1997-11-13 1998-11-13 Plasma etching of a nitride layer over an oxide layer

Country Status (5)

Country Link
JP (1) JPH11145113A (en)
KR (1) KR19990045272A (en)
CN (1) CN1218279A (en)
GB (1) GB2331624A (en)
TW (1) TW389967B (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002134472A (en) 2000-10-20 2002-05-10 Mitsubishi Electric Corp Etching method, etching apparatus, and method of manufacturing semiconductor device
CN100336180C (en) * 2001-06-22 2007-09-05 东京毅力科创株式会社 Dry-etching method
JP4854874B2 (en) * 2001-06-22 2012-01-18 東京エレクトロン株式会社 Dry etching method
KR100523652B1 (en) * 2002-09-23 2005-10-24 동부아남반도체 주식회사 Method for manufacturing flash memory
JP5695117B2 (en) * 2013-04-04 2015-04-01 東京エレクトロン株式会社 Plasma etching method

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4832787A (en) * 1988-02-19 1989-05-23 International Business Machines Corporation Gas mixture and method for anisotropic selective etch of nitride
US5242532A (en) * 1992-03-20 1993-09-07 Vlsi Technology, Inc. Dual mode plasma etching system and method of plasma endpoint detection
US5591301A (en) * 1994-12-22 1997-01-07 Siemens Aktiengesellschaft Plasma etching method

Also Published As

Publication number Publication date
CN1218279A (en) 1999-06-02
KR19990045272A (en) 1999-06-25
TW389967B (en) 2000-05-11
JPH11145113A (en) 1999-05-28
GB2331624A (en) 1999-05-26

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)