GB2056168A - Method of fabricating P-N junction with high breakdown voltage - Google Patents

Method of fabricating P-N junction with high breakdown voltage Download PDF

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Publication number
GB2056168A
GB2056168A GB8012509A GB8012509A GB2056168A GB 2056168 A GB2056168 A GB 2056168A GB 8012509 A GB8012509 A GB 8012509A GB 8012509 A GB8012509 A GB 8012509A GB 2056168 A GB2056168 A GB 2056168A
Authority
GB
United Kingdom
Prior art keywords
impurity
substrate
layer
ions
concentration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB8012509A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Arris Technology Inc
Original Assignee
Arris Technology Inc
General Instrument Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Arris Technology Inc, General Instrument Corp filed Critical Arris Technology Inc
Publication of GB2056168A publication Critical patent/GB2056168A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60Impurity distributions or concentrations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H10P30/212Through-implantation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices

Landscapes

  • Thyristors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
GB8012509A 1979-08-01 1980-04-16 Method of fabricating P-N junction with high breakdown voltage Withdrawn GB2056168A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US6267679A 1979-08-01 1979-08-01

Publications (1)

Publication Number Publication Date
GB2056168A true GB2056168A (en) 1981-03-11

Family

ID=22044093

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8012509A Withdrawn GB2056168A (en) 1979-08-01 1980-04-16 Method of fabricating P-N junction with high breakdown voltage

Country Status (5)

Country Link
JP (1) JPS5623742A (enExample)
DE (1) DE3028185A1 (enExample)
FR (1) FR2462780A1 (enExample)
GB (1) GB2056168A (enExample)
IT (1) IT1145411B (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4369072A (en) * 1981-01-22 1983-01-18 International Business Machines Corp. Method for forming IGFET devices having improved drain voltage characteristics
EP0328819A3 (en) * 1987-12-04 1989-11-29 Kabushiki Kaisha Toshiba Making of doped regions using phosphorus and arsenic
US4889820A (en) * 1988-03-14 1989-12-26 Fujitsu Limited Method of producing a semiconductor device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60117681A (ja) * 1983-11-29 1985-06-25 Mitsubishi Electric Corp 半導体装置
JPH063798B2 (ja) * 1985-02-06 1994-01-12 日本電気株式会社 半導体装置の製造方法
JP4629809B2 (ja) * 1996-03-27 2011-02-09 クリー,インコーポレイテッド SiCの半導体層を有する半導体素子を製造する方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT956828B (it) * 1971-08-05 1973-10-10 Rca Corp Processo per l ottenimento di regio ni diffuse a semiconduttore presen tanti un numero ridotto di difetti nel cristallo
IL40189A0 (en) * 1971-09-09 1972-10-29 Trusty J Method and apparatus for preparing and analyzing serum samples
DE2304647C2 (de) * 1973-01-31 1984-06-28 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Herstellung einer dotierten Zone in einem Halbleiterkörper
JPS543479A (en) * 1977-06-09 1979-01-11 Toshiba Corp Semiconductor device and its manufacture

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4369072A (en) * 1981-01-22 1983-01-18 International Business Machines Corp. Method for forming IGFET devices having improved drain voltage characteristics
EP0328819A3 (en) * 1987-12-04 1989-11-29 Kabushiki Kaisha Toshiba Making of doped regions using phosphorus and arsenic
US4889820A (en) * 1988-03-14 1989-12-26 Fujitsu Limited Method of producing a semiconductor device

Also Published As

Publication number Publication date
FR2462780B1 (enExample) 1983-02-18
FR2462780A1 (fr) 1981-02-13
JPS5623742A (en) 1981-03-06
IT1145411B (it) 1986-11-05
IT8049389A0 (it) 1980-07-31
DE3028185A1 (de) 1981-02-26

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)