FR2748157B1 - Dispositif a semiconducteurs comportant une structure silicium sur isolant et procede de fabrication de ce dispositif - Google Patents

Dispositif a semiconducteurs comportant une structure silicium sur isolant et procede de fabrication de ce dispositif

Info

Publication number
FR2748157B1
FR2748157B1 FR9700288A FR9700288A FR2748157B1 FR 2748157 B1 FR2748157 B1 FR 2748157B1 FR 9700288 A FR9700288 A FR 9700288A FR 9700288 A FR9700288 A FR 9700288A FR 2748157 B1 FR2748157 B1 FR 2748157B1
Authority
FR
France
Prior art keywords
silicon
manufacturing
semiconductor device
insulation structure
insulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9700288A
Other languages
English (en)
Other versions
FR2748157A1 (fr
Inventor
Takashi Ipposhi
Toshiaki Iwamatsu
Yasuo Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of FR2748157A1 publication Critical patent/FR2748157A1/fr
Application granted granted Critical
Publication of FR2748157B1 publication Critical patent/FR2748157B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/66772Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78609Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing leakage current
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76281Lateral isolation by selective oxidation of silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Element Separation (AREA)
FR9700288A 1996-04-24 1997-01-14 Dispositif a semiconducteurs comportant une structure silicium sur isolant et procede de fabrication de ce dispositif Expired - Fee Related FR2748157B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10258296A JP4027447B2 (ja) 1996-04-24 1996-04-24 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
FR2748157A1 FR2748157A1 (fr) 1997-10-31
FR2748157B1 true FR2748157B1 (fr) 2000-01-14

Family

ID=14331232

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9700288A Expired - Fee Related FR2748157B1 (fr) 1996-04-24 1997-01-14 Dispositif a semiconducteurs comportant une structure silicium sur isolant et procede de fabrication de ce dispositif

Country Status (5)

Country Link
US (3) US6025629A (fr)
JP (1) JP4027447B2 (fr)
KR (1) KR100225053B1 (fr)
DE (1) DE19642539A1 (fr)
FR (1) FR2748157B1 (fr)

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JP2002026311A (ja) 2000-07-04 2002-01-25 Miyazaki Oki Electric Co Ltd Soi型mos素子およびその製造方法
JP3420205B2 (ja) * 2000-11-20 2003-06-23 Necエレクトロニクス株式会社 半導体装置の製造方法
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JP2003332580A (ja) * 2002-05-09 2003-11-21 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
US7157774B2 (en) * 2003-01-31 2007-01-02 Taiwan Semiconductor Manufacturing Co., Ltd. Strained silicon-on-insulator transistors with mesa isolation
US7144767B2 (en) * 2003-09-23 2006-12-05 International Business Machines Corporation NFETs using gate induced stress modulation
JP4572367B2 (ja) * 2004-03-26 2010-11-04 セイコーエプソン株式会社 半導体装置およびその製造方法
JP4449076B2 (ja) * 2004-04-16 2010-04-14 セイコーエプソン株式会社 半導体装置の製造方法
FR2872958B1 (fr) * 2004-07-12 2008-05-02 Commissariat Energie Atomique Procede de fabrication d'un film mince structure et film mince obtenu par un tel procede
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US7358571B2 (en) * 2004-10-20 2008-04-15 Taiwan Semiconductor Manufacturing Company Isolation spacer for thin SOI devices
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JP2007103491A (ja) * 2005-09-30 2007-04-19 Seiko Epson Corp 半導体装置および半導体装置の製造方法
WO2011043608A2 (fr) * 2009-10-07 2011-04-14 주식회사 엘지화학 Procédé de fabrication d'une batterie lithium-ion polymère, pile de batterie et pile lithium-ion polymère comprenant celle-ci
WO2011074537A1 (fr) * 2009-12-14 2011-06-23 シャープ株式会社 Procédé de fabrication d'un dispositif à transistor à couche mince
WO2011096387A1 (fr) * 2010-02-02 2011-08-11 シャープ株式会社 Dispositif à semi-conducteurs et procédé de fabrication associé
WO2011149768A2 (fr) * 2010-05-25 2011-12-01 Ss Sc Ip, Llc Dispositifs semi-conducteurs auto-alignés à fuite grille-source réduite sous une polarisation inversée, ainsi que procédés de fabrication
JP2012142560A (ja) * 2010-12-15 2012-07-26 Canon Inc 固体撮像装置およびその製造方法ならびにカメラ
JP5944266B2 (ja) 2012-08-10 2016-07-05 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
PL2882027T3 (pl) * 2013-05-23 2020-09-07 Lg Chem, Ltd. Zespół elektrodowy i jednostka rodnikowa dla niego
KR101776885B1 (ko) * 2014-09-25 2017-09-08 주식회사 엘지화학 둘 이상의 케이스 부재들을 포함하는 각형 전지셀
CN113327914A (zh) * 2021-05-27 2021-08-31 武汉新芯集成电路制造有限公司 半导体器件及其制造方法

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Also Published As

Publication number Publication date
US6818536B2 (en) 2004-11-16
JP4027447B2 (ja) 2007-12-26
FR2748157A1 (fr) 1997-10-31
US20020016025A1 (en) 2002-02-07
KR100225053B1 (ko) 1999-10-15
KR970072209A (ko) 1997-11-07
US20030207548A1 (en) 2003-11-06
US6025629A (en) 2000-02-15
JPH09293868A (ja) 1997-11-11
US6596615B2 (en) 2003-07-22
DE19642539A1 (de) 1997-11-06

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