FR2410364B1 - Procede de fabrication d'avis d'isolement entre des dispositifs semi-conducteurs et dispositifs ainsi obtenus - Google Patents

Procede de fabrication d'avis d'isolement entre des dispositifs semi-conducteurs et dispositifs ainsi obtenus

Info

Publication number
FR2410364B1
FR2410364B1 FR7806167A FR7806167A FR2410364B1 FR 2410364 B1 FR2410364 B1 FR 2410364B1 FR 7806167 A FR7806167 A FR 7806167A FR 7806167 A FR7806167 A FR 7806167A FR 2410364 B1 FR2410364 B1 FR 2410364B1
Authority
FR
France
Prior art keywords
devices
notice
isolation
manufacturing
semiconductor devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7806167A
Other languages
English (en)
Other versions
FR2410364A1 (fr
Inventor
Katsutoshi Izumi
Masanobu Doken
Hisashi Ariyoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Publication of FR2410364A1 publication Critical patent/FR2410364A1/fr
Application granted granted Critical
Publication of FR2410364B1 publication Critical patent/FR2410364B1/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26533Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically inactive species in silicon to make buried insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H01L21/86Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642Isolation within the component, i.e. internal isolation
    • H01L29/0649Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78612Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing the kink- or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/78654Monocrystalline silicon transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76267Vertical isolation by silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76281Lateral isolation by selective oxidation of silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76289Lateral isolation by air gap

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Element Separation (AREA)
  • Bipolar Transistors (AREA)
  • Thin Film Transistor (AREA)
FR7806167A 1977-11-28 1978-03-03 Procede de fabrication d'avis d'isolement entre des dispositifs semi-conducteurs et dispositifs ainsi obtenus Expired FR2410364B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14159977A JPS5721856B2 (en) 1977-11-28 1977-11-28 Semiconductor and its manufacture

Publications (2)

Publication Number Publication Date
FR2410364A1 FR2410364A1 (fr) 1979-06-22
FR2410364B1 true FR2410364B1 (fr) 1983-01-21

Family

ID=15295748

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7806167A Expired FR2410364B1 (fr) 1977-11-28 1978-03-03 Procede de fabrication d'avis d'isolement entre des dispositifs semi-conducteurs et dispositifs ainsi obtenus

Country Status (7)

Country Link
US (1) US4241359A (fr)
JP (1) JPS5721856B2 (fr)
CA (1) CA1095183A (fr)
DE (1) DE2808257C3 (fr)
FR (1) FR2410364B1 (fr)
GB (1) GB1601676A (fr)
NL (1) NL182999C (fr)

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JPS5626467A (en) * 1979-08-10 1981-03-14 Toshiba Corp Semiconductor device and the manufacturing process
JPS5662369A (en) * 1979-10-26 1981-05-28 Toshiba Corp Mos semiconductor device
JPS56105652A (en) * 1980-01-28 1981-08-22 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS577161A (en) * 1980-06-16 1982-01-14 Toshiba Corp Mos semiconductor device
JPS5739579A (en) * 1980-08-20 1982-03-04 Toshiba Corp Mos semiconductor device and manufacture thereof
JPS5742161A (en) * 1980-08-28 1982-03-09 Fujitsu Ltd Semiconductor and production thereof
JPS5752167A (en) * 1980-09-16 1982-03-27 Nippon Telegr & Teleph Corp <Ntt> Insulated gate type field effect transistor and manufacture thereof
JPS5754370A (en) * 1980-09-19 1982-03-31 Nippon Telegr & Teleph Corp <Ntt> Insulating gate type transistor
GB2085224B (en) * 1980-10-07 1984-08-15 Itt Ind Ltd Isolating sc device using oxygen duping
JPS5854672A (ja) * 1981-09-28 1983-03-31 Fujitsu Ltd 半導体装置
JPS58176967A (ja) * 1982-04-12 1983-10-17 Toshiba Corp 半導体装置の製造方法
JPS59170555A (ja) * 1983-03-15 1984-09-26 Iseki & Co Ltd 農作業機の動力伝導装置
JPS6035955U (ja) * 1983-08-19 1985-03-12 ヤンマー農機株式会社 農機の無段変速装置
FR2563377B1 (fr) * 1984-04-19 1987-01-23 Commissariat Energie Atomique Procede de fabrication d'une couche isolante enterree dans un substrat semi-conducteur, par implantation ionique
US4686758A (en) * 1984-06-27 1987-08-18 Honeywell Inc. Three-dimensional CMOS using selective epitaxial growth
JPS61177742A (ja) * 1985-02-01 1986-08-09 Mitsubishi Electric Corp 半導体装置
FR2581795B1 (fr) * 1985-05-10 1988-06-17 Golanski Andrzej Procede de fabrication d'une couche isolante continue enterree dans un substrat semi-conducteur, par implantation ionique
US4717677A (en) * 1985-08-19 1988-01-05 Motorola Inc. Fabricating a semiconductor device with buried oxide
US4662059A (en) * 1985-09-19 1987-05-05 Rca Corporation Method of making stabilized silicon-on-insulator field-effect transistors having 100 oriented side and top surfaces
US4700454A (en) * 1985-11-04 1987-10-20 Intel Corporation Process for forming MOS transistor with buried oxide regions for insulation
US4683637A (en) * 1986-02-07 1987-08-04 Motorola, Inc. Forming depthwise isolation by selective oxygen/nitrogen deep implant and reaction annealing
JPS632350A (ja) * 1986-06-20 1988-01-07 Fujitsu Ltd 半導体装置の製造方法
US5043778A (en) * 1986-08-11 1991-08-27 Texas Instruments Incorporated Oxide-isolated source/drain transistor
US4862232A (en) * 1986-09-22 1989-08-29 General Motors Corporation Transistor structure for high temperature logic circuits with insulation around source and drain regions
JPS63119218A (ja) * 1986-11-07 1988-05-23 Canon Inc 半導体基材とその製造方法
JPS63157475A (ja) * 1986-12-20 1988-06-30 Toshiba Corp 半導体装置及びその製造方法
US5115289A (en) * 1988-11-21 1992-05-19 Hitachi, Ltd. Semiconductor device and semiconductor memory device
US5080730A (en) * 1989-04-24 1992-01-14 Ibis Technology Corporation Implantation profile control with surface sputtering
WO1992005580A1 (fr) * 1990-09-14 1992-04-02 Westinghouse Electric Corporation Circuit hybride hyperfrequence monolithique fabrique sur une tranche de silicium a haute resistivite
US6884701B2 (en) * 1991-04-27 2005-04-26 Hidemi Takasu Process for fabricating semiconductor device
KR960002765B1 (ko) * 1992-12-22 1996-02-26 금성일렉트론주식회사 절연체 위에 단결정 반도체 제조방법
US6228779B1 (en) 1998-11-06 2001-05-08 Novellus Systems, Inc. Ultra thin oxynitride and nitride/oxide stacked gate dielectrics fabricated by high pressure technology
US6383924B1 (en) 2000-12-13 2002-05-07 Micron Technology, Inc. Method of forming buried conductor patterns by surface transformation of empty spaces in solid state materials
US7142577B2 (en) 2001-05-16 2006-11-28 Micron Technology, Inc. Method of forming mirrors by surface transformation of empty spaces in solid state materials and structures thereon
US6898362B2 (en) * 2002-01-17 2005-05-24 Micron Technology Inc. Three-dimensional photonic crystal waveguide structure and method
US7041575B2 (en) * 2003-04-29 2006-05-09 Micron Technology, Inc. Localized strained semiconductor on insulator
US6987037B2 (en) * 2003-05-07 2006-01-17 Micron Technology, Inc. Strained Si/SiGe structures by ion implantation
US7501329B2 (en) 2003-05-21 2009-03-10 Micron Technology, Inc. Wafer gettering using relaxed silicon germanium epitaxial proximity layers
US7008854B2 (en) 2003-05-21 2006-03-07 Micron Technology, Inc. Silicon oxycarbide substrates for bonded silicon on insulator
US7273788B2 (en) 2003-05-21 2007-09-25 Micron Technology, Inc. Ultra-thin semiconductors bonded on glass substrates
US7662701B2 (en) 2003-05-21 2010-02-16 Micron Technology, Inc. Gettering of silicon on insulator using relaxed silicon germanium epitaxial proximity layers
US6929984B2 (en) * 2003-07-21 2005-08-16 Micron Technology Inc. Gettering using voids formed by surface transformation
US7439158B2 (en) 2003-07-21 2008-10-21 Micron Technology, Inc. Strained semiconductor by full wafer bonding
US7153753B2 (en) 2003-08-05 2006-12-26 Micron Technology, Inc. Strained Si/SiGe/SOI islands and processes of making same
US7396779B2 (en) 2003-09-24 2008-07-08 Micron Technology, Inc. Electronic apparatus, silicon-on-insulator integrated circuits, and fabrication methods
KR100604527B1 (ko) * 2003-12-31 2006-07-24 동부일렉트로닉스 주식회사 바이폴라 트랜지스터 제조방법
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US3622382A (en) * 1969-05-05 1971-11-23 Ibm Semiconductor isolation structure and method of producing
US3666548A (en) * 1970-01-06 1972-05-30 Ibm Monocrystalline semiconductor body having dielectrically isolated regions and method of forming
US3840409A (en) * 1970-03-16 1974-10-08 Ibm Insulating layer pedestal transistor device and process
US3707765A (en) * 1970-11-19 1973-01-02 Motorola Inc Method of making isolated semiconductor devices
BE792589A (fr) * 1971-10-06 1973-03-30 Ibm Procede d'obtention de structures semiconductrices par implantation d'ions
US3791024A (en) * 1971-10-21 1974-02-12 Rca Corp Fabrication of monolithic integrated circuits
US3873373A (en) * 1972-07-06 1975-03-25 Bryan H Hill Fabrication of a semiconductor device
US3886587A (en) * 1973-07-19 1975-05-27 Harris Corp Isolated photodiode array
US3855009A (en) * 1973-09-20 1974-12-17 Texas Instruments Inc Ion-implantation and conventional epitaxy to produce dielectrically isolated silicon layers
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JPS5329551B2 (fr) * 1974-08-19 1978-08-22
JPS6041458B2 (ja) * 1975-04-21 1985-09-17 ソニー株式会社 半導体装置の製造方法
US3976511A (en) * 1975-06-30 1976-08-24 Ibm Corporation Method for fabricating integrated circuit structures with full dielectric isolation by ion bombardment

Also Published As

Publication number Publication date
GB1601676A (en) 1981-11-04
DE2808257A1 (de) 1979-05-31
CA1095183A (fr) 1981-02-03
JPS5721856B2 (en) 1982-05-10
DE2808257C3 (de) 1981-12-24
JPS5474682A (en) 1979-06-14
NL7802260A (nl) 1979-05-30
US4241359A (en) 1980-12-23
FR2410364A1 (fr) 1979-06-22
NL182999C (nl) 1988-06-16
DE2808257B2 (de) 1981-02-19

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