JPS5662369A - Mos semiconductor device - Google Patents

Mos semiconductor device

Info

Publication number
JPS5662369A
JPS5662369A JP13838879A JP13838879A JPS5662369A JP S5662369 A JPS5662369 A JP S5662369A JP 13838879 A JP13838879 A JP 13838879A JP 13838879 A JP13838879 A JP 13838879A JP S5662369 A JPS5662369 A JP S5662369A
Authority
JP
Japan
Prior art keywords
temporary
drain
mos
base board
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13838879A
Other languages
Japanese (ja)
Inventor
Yutaka Hatano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13838879A priority Critical patent/JPS5662369A/en
Publication of JPS5662369A publication Critical patent/JPS5662369A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)

Abstract

PURPOSE:To prevent a decrease of temporary capacity and a damage made by a temporary thyrister operation at C-MOS by a method wherein a buried insulation layer is selectively arranged below the areas of source and drain. CONSTITUTION:Buried insulation layers 21, 22 are selectively arranged below the source area 5 and the drain area 6 of MOS transistor area. With this arrangement a base board 12 in MOS transistor area is not separated completely from the base board 11, and a base board electrode may be taken. As a result, it is possible to prevent a twisting in performance of VD-ID (drain) and to get a superior characteristic. The temporary decrease of capacitor may be provided sufficiently by the buried insulation layers 21, 22 and a damage caused by the temporary thyrister operation when C-MOS is constructed may also be prevented.
JP13838879A 1979-10-26 1979-10-26 Mos semiconductor device Pending JPS5662369A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13838879A JPS5662369A (en) 1979-10-26 1979-10-26 Mos semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13838879A JPS5662369A (en) 1979-10-26 1979-10-26 Mos semiconductor device

Publications (1)

Publication Number Publication Date
JPS5662369A true JPS5662369A (en) 1981-05-28

Family

ID=15220769

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13838879A Pending JPS5662369A (en) 1979-10-26 1979-10-26 Mos semiconductor device

Country Status (1)

Country Link
JP (1) JPS5662369A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6074564A (en) * 1983-09-30 1985-04-26 Toshiba Corp Semiconductor memory device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5236983A (en) * 1975-09-18 1977-03-22 Matsushita Electric Ind Co Ltd Mos type semiconductor integrated circuit device and process for produ ction of same
JPS5474682A (en) * 1977-11-28 1979-06-14 Nippon Telegr & Teleph Corp <Ntt> Semiconductor and its manufacture

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5236983A (en) * 1975-09-18 1977-03-22 Matsushita Electric Ind Co Ltd Mos type semiconductor integrated circuit device and process for produ ction of same
JPS5474682A (en) * 1977-11-28 1979-06-14 Nippon Telegr & Teleph Corp <Ntt> Semiconductor and its manufacture

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6074564A (en) * 1983-09-30 1985-04-26 Toshiba Corp Semiconductor memory device

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