FR2390003A1 - - Google Patents
Info
- Publication number
- FR2390003A1 FR2390003A1 FR7810335A FR7810335A FR2390003A1 FR 2390003 A1 FR2390003 A1 FR 2390003A1 FR 7810335 A FR7810335 A FR 7810335A FR 7810335 A FR7810335 A FR 7810335A FR 2390003 A1 FR2390003 A1 FR 2390003A1
- Authority
- FR
- France
- Prior art keywords
- silicon
- silicide
- mask
- deposited
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/251—Source or drain electrodes for field-effect devices
- H10D64/256—Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
- H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
- H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
- H10D64/664—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures the additional layers comprising a barrier layer between the layer of silicon and an upper metal or metal silicide layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/03—Manufacture or treatment wherein the substrate comprises sapphire, e.g. silicon-on-sapphire [SOS]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/103—Mask, dual function, e.g. diffusion and oxidation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/141—Self-alignment coat gate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/147—Silicides
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
- Y10S438/951—Lift-off
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/793,231 US4109372A (en) | 1977-05-02 | 1977-05-02 | Method for making an insulated gate field effect transistor utilizing a silicon gate and silicide interconnection vias |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2390003A1 true FR2390003A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1978-12-01 |
FR2390003B1 FR2390003B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1980-08-29 |
Family
ID=25159441
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7810335A Expired FR2390003B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1977-05-02 | 1978-03-31 |
Country Status (5)
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL190710C (nl) * | 1978-02-10 | 1994-07-01 | Nec Corp | Geintegreerde halfgeleiderketen. |
NL7902247A (nl) * | 1978-03-25 | 1979-09-27 | Fujitsu Ltd | Metaal-isolator-halfgeleidertype halfgeleiderinrich- ting en werkwijze voor het vervaardigen ervan. |
JPS55138874A (en) * | 1979-04-18 | 1980-10-30 | Fujitsu Ltd | Semiconductor device and method of fabricating the same |
US4263058A (en) * | 1979-06-11 | 1981-04-21 | General Electric Company | Composite conductive structures in integrated circuits and method of making same |
US4227944A (en) * | 1979-06-11 | 1980-10-14 | General Electric Company | Methods of making composite conductive structures in integrated circuits |
US4228212A (en) * | 1979-06-11 | 1980-10-14 | General Electric Company | Composite conductive structures in integrated circuits |
JPS5927102B2 (ja) * | 1979-12-24 | 1984-07-03 | 富士通株式会社 | 半導体記憶装置 |
US4276688A (en) * | 1980-01-21 | 1981-07-07 | Rca Corporation | Method for forming buried contact complementary MOS devices |
US4301588A (en) * | 1980-02-01 | 1981-11-24 | International Business Machines Corporation | Consumable amorphous or polysilicon emitter process |
USRE32613E (en) * | 1980-04-17 | 1988-02-23 | American Telephone And Telegraph Company, At&T Bell Laboratories | Method of making contact electrodes to silicon gate, and source and drain regions, of a semiconductor device |
US4343082A (en) * | 1980-04-17 | 1982-08-10 | Bell Telephone Laboratories, Incorporated | Method of making contact electrodes to silicon gate, and source and drain regions, of a semiconductor device |
IT1131450B (it) * | 1980-05-07 | 1986-06-25 | Cise Spa | Procedimento per la produzione di transistori ad effetto di campo per microonde |
US4320571A (en) * | 1980-10-14 | 1982-03-23 | International Rectifier Corporation | Stencil mask process for high power, high speed controlled rectifiers |
JPS5815250A (ja) * | 1981-07-21 | 1983-01-28 | Fujitsu Ltd | 半導体装置の製造方法 |
US4378628A (en) * | 1981-08-27 | 1983-04-05 | Bell Telephone Laboratories, Incorporated | Cobalt silicide metallization for semiconductor integrated circuits |
US4638347A (en) * | 1982-12-07 | 1987-01-20 | International Business Machines Corporation | Gate electrode sidewall isolation spacer for field effect transistors |
JPS59115189U (ja) * | 1983-01-25 | 1984-08-03 | 三菱重工業株式会社 | 微粉炭管の流量調整オリフイス |
GB2156579B (en) * | 1984-03-15 | 1987-05-07 | Standard Telephones Cables Ltd | Field effect transistors |
JPH0622245B2 (ja) * | 1986-05-02 | 1994-03-23 | 富士ゼロックス株式会社 | 薄膜トランジスタの製造方法 |
JPS6373660A (ja) * | 1986-09-17 | 1988-04-04 | Fujitsu Ltd | 半導体装置 |
US4794093A (en) * | 1987-05-01 | 1988-12-27 | Raytheon Company | Selective backside plating of gaas monolithic microwave integrated circuits |
US4902379A (en) * | 1988-02-08 | 1990-02-20 | Eastman Kodak Company | UHV compatible lift-off method for patterning nobel metal silicide |
JPH05102155A (ja) * | 1991-10-09 | 1993-04-23 | Sony Corp | 銅配線構造体及びその製造方法 |
JP2713165B2 (ja) * | 1994-05-19 | 1998-02-16 | 日本電気株式会社 | 半導体装置の製造方法 |
US8586472B2 (en) | 2010-07-14 | 2013-11-19 | Infineon Technologies Ag | Conductive lines and pads and method of manufacturing thereof |
WO2014089814A1 (zh) | 2012-12-14 | 2014-06-19 | 复旦大学 | 一种半导体器件及其制备方法 |
WO2014089825A1 (zh) * | 2012-12-14 | 2014-06-19 | 复旦大学 | 半导体器件及其制备方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1399164A (en) * | 1972-11-08 | 1975-06-25 | Ferranti Ltd | Semiconductor devices |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3382568A (en) * | 1965-07-22 | 1968-05-14 | Ibm | Method for providing electrical connections to semiconductor devices |
US3571913A (en) * | 1968-08-20 | 1971-03-23 | Hewlett Packard Co | Method of making ohmic contact to a shallow diffused transistor |
US3740835A (en) * | 1970-08-31 | 1973-06-26 | Fairchild Camera Instr Co | Method of forming semiconductor device contacts |
JPS4834457A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1971-09-07 | 1973-05-18 | ||
DE2315710C3 (de) * | 1973-03-29 | 1975-11-13 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Verfahren zum Herstellen einer Halbleiteranordnung |
JPS5321989B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1973-10-12 | 1978-07-06 | ||
JPS5847867B2 (ja) * | 1975-02-26 | 1983-10-25 | 日本電気株式会社 | ハンドウタイソウチ |
-
1977
- 1977-05-02 US US05/793,231 patent/US4109372A/en not_active Expired - Lifetime
-
1978
- 1978-03-28 JP JP3495978A patent/JPS53136488A/ja active Granted
- 1978-03-31 FR FR7810335A patent/FR2390003B1/fr not_active Expired
- 1978-04-07 GB GB13699/78A patent/GB1562877A/en not_active Expired
- 1978-04-20 DE DE19782817258 patent/DE2817258A1/de not_active Withdrawn
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1399164A (en) * | 1972-11-08 | 1975-06-25 | Ferranti Ltd | Semiconductor devices |
Non-Patent Citations (2)
Title |
---|
NV700/73 * |
NV700/74 * |
Also Published As
Publication number | Publication date |
---|---|
DE2817258A1 (de) | 1978-11-09 |
GB1562877A (en) | 1980-03-19 |
FR2390003B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1980-08-29 |
JPS53136488A (en) | 1978-11-29 |
US4109372A (en) | 1978-08-29 |
JPS5710585B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1982-02-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |