FR2366694A1 - Procede de masquage et dispositif de fabrication notamment de circuits integres - Google Patents

Procede de masquage et dispositif de fabrication notamment de circuits integres

Info

Publication number
FR2366694A1
FR2366694A1 FR7724267A FR7724267A FR2366694A1 FR 2366694 A1 FR2366694 A1 FR 2366694A1 FR 7724267 A FR7724267 A FR 7724267A FR 7724267 A FR7724267 A FR 7724267A FR 2366694 A1 FR2366694 A1 FR 2366694A1
Authority
FR
France
Prior art keywords
integrated circuits
manufacturing device
masking process
manufacture
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7724267A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xonics Inc
Original Assignee
Xonics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xonics Inc filed Critical Xonics Inc
Publication of FR2366694A1 publication Critical patent/FR2366694A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70216—Mask projection systems
    • G03F7/70233—Optical aspects of catoptric systems, i.e. comprising only reflective elements, e.g. extreme ultraviolet [EUV] projection systems
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0278—Röntgenlithographic or X-ray lithographic processes

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

L'invention concerne la fabrication des circuits intégrés. Deux surfaces réfléchissantes 16, 17 forment sur une couche sensible d'un substrat 13 une image réduite d'un masque 11 éclairé par une source de rayons X 10. Cette configuration permet d'améliorer dans un rapport 10 à 100 la résolution de la structure formée sur le substrat 13. Application à la fabrication de circuits intégrés de très faibles dimensions.
FR7724267A 1976-09-29 1977-08-05 Procede de masquage et dispositif de fabrication notamment de circuits integres Withdrawn FR2366694A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US72794976A 1976-09-29 1976-09-29

Publications (1)

Publication Number Publication Date
FR2366694A1 true FR2366694A1 (fr) 1978-04-28

Family

ID=24924778

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7724267A Withdrawn FR2366694A1 (fr) 1976-09-29 1977-08-05 Procede de masquage et dispositif de fabrication notamment de circuits integres

Country Status (7)

Country Link
JP (1) JPS5342679A (fr)
BE (1) BE857362A (fr)
DE (1) DE2740366A1 (fr)
FR (1) FR2366694A1 (fr)
GB (1) GB1522568A (fr)
IT (1) IT1089816B (fr)
NL (1) NL7707485A (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1224839A (fr) * 1983-06-06 1987-07-28 Barukh Yaakobi Lithographie a rayons x
JPS629632A (ja) * 1985-07-06 1987-01-17 Agency Of Ind Science & Technol 投影露光装置
JPS62208631A (ja) * 1986-03-07 1987-09-12 Sanyo Electric Co Ltd 縮小型ｘ線リソグラフイ装置
JP2628165B2 (ja) * 1987-06-15 1997-07-09 キヤノン株式会社 Ｘ線露光装置
JP2603225B2 (ja) * 1986-07-11 1997-04-23 キヤノン株式会社 Ｘ線投影露光装置及び半導体製造方法
JPH07147230A (ja) * 1994-08-04 1995-06-06 Canon Inc 縮小投影露光装置および半導体製造方法

Also Published As

Publication number Publication date
NL7707485A (nl) 1978-03-31
BE857362A (fr) 1977-12-01
GB1522568A (en) 1978-08-23
JPS5342679A (en) 1978-04-18
IT1089816B (it) 1985-06-18
DE2740366A1 (de) 1978-03-30

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Legal Events

Date Code Title Description
ST Notification of lapse