FI96256C - Menetelmä ja järjestely transponoidussa digitaalisessa FIR-suodattimessa binäärisen sisääntulosignaalin kertomiseksi tappikertoimilla sekä menetelmä transponoidun digitaalisen suodattimen suunnittelemiseksi - Google Patents

Menetelmä ja järjestely transponoidussa digitaalisessa FIR-suodattimessa binäärisen sisääntulosignaalin kertomiseksi tappikertoimilla sekä menetelmä transponoidun digitaalisen suodattimen suunnittelemiseksi

Info

Publication number
FI96256C
FI96256C FI931532A FI931532A FI96256C FI 96256 C FI96256 C FI 96256C FI 931532 A FI931532 A FI 931532A FI 931532 A FI931532 A FI 931532A FI 96256 C FI96256 C FI 96256C
Authority
FI
Finland
Prior art keywords
filter
input signal
binary input
multiplying
transposed digital
Prior art date
Application number
FI931532A
Other languages
English (en)
Swedish (sv)
Other versions
FI931532A0 (fi
FI96256B (fi
FI931532A (fi
Inventor
Tapio Antero Saramaeki
Tapani Juhani Ritoniemi
Ville Antero Eerola
Timo Kalevi Husu
Eero Juhani Pajarre
Seppo Tapio Ingalsuo
Original Assignee
Tapio Antero Saramaeki
Tapani Juhani Ritoniemi
Ville Antero Eerola
Timo Kalevi Husu
Eero Juhani Pajarre
Seppo Tapio Ingalsuo
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tapio Antero Saramaeki, Tapani Juhani Ritoniemi, Ville Antero Eerola, Timo Kalevi Husu, Eero Juhani Pajarre, Seppo Tapio Ingalsuo filed Critical Tapio Antero Saramaeki
Publication of FI931532A0 publication Critical patent/FI931532A0/fi
Priority to FI931532A priority Critical patent/FI96256C/fi
Priority to US08/522,362 priority patent/US6370556B1/en
Priority to KR1019950704330A priority patent/KR100302093B1/ko
Priority to AT94911198T priority patent/ATE195617T1/de
Priority to EP94911198A priority patent/EP0693236B1/en
Priority to PCT/FI1994/000126 priority patent/WO1994023493A1/en
Priority to JP6521717A priority patent/JPH08508857A/ja
Priority to DE69425565T priority patent/DE69425565T2/de
Publication of FI931532A publication Critical patent/FI931532A/fi
Publication of FI96256B publication Critical patent/FI96256B/fi
Application granted granted Critical
Publication of FI96256C publication Critical patent/FI96256C/fi

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00Networks using digital techniques
    • H03H17/02Frequency selective networks
    • H03H17/0223Computation saving measures; Accelerating measures
    • H03H17/0225Measures concerning the multipliers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00Networks using digital techniques
    • H03H17/02Frequency selective networks
    • H03H17/0223Computation saving measures; Accelerating measures
    • H03H17/0227Measures concerning the coefficients
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00Networks using digital techniques
    • H03H17/02Frequency selective networks
    • H03H17/06Non-recursive filters

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Complex Calculations (AREA)
  • Filters That Use Time-Delay Elements (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Color Television Systems (AREA)
FI931532A 1993-04-05 1993-04-05 Menetelmä ja järjestely transponoidussa digitaalisessa FIR-suodattimessa binäärisen sisääntulosignaalin kertomiseksi tappikertoimilla sekä menetelmä transponoidun digitaalisen suodattimen suunnittelemiseksi FI96256C (fi)

Priority Applications (8)

Application Number Priority Date Filing Date Title
FI931532A FI96256C (fi) 1993-04-05 1993-04-05 Menetelmä ja järjestely transponoidussa digitaalisessa FIR-suodattimessa binäärisen sisääntulosignaalin kertomiseksi tappikertoimilla sekä menetelmä transponoidun digitaalisen suodattimen suunnittelemiseksi
EP94911198A EP0693236B1 (en) 1993-04-05 1994-03-31 Method and arrangement in a transposed digital fir filter for multiplying a binary input signal with tap coefficients and a method for designing a transposed digital filter
KR1019950704330A KR100302093B1 (ko) 1993-04-05 1994-03-31 교차형디지탈유한임펄스응답필터에서이진입력신호를탭계수와승산시키는방법및회로배열과교차형디지탈필터의설계방법
AT94911198T ATE195617T1 (de) 1993-04-05 1994-03-31 Verfahren und vorrichtung in einem transponierten digitalen fir-filter zur multiplikation eines binären eingangssignals mit filterkoeffizienten und verfahren zum entwurf eines digitalen transponierten filters
US08/522,362 US6370556B1 (en) 1993-04-05 1994-03-31 Method and arrangement in a transposed digital FIR filter for multiplying a binary input signal with tap coefficients and a method for designing a transposed digital filter
PCT/FI1994/000126 WO1994023493A1 (en) 1993-04-05 1994-03-31 Method and arrangement in a transposed digital fir filter for multiplying a binary input signal with tap coefficients and a method for disigning a transposed digital filter
JP6521717A JPH08508857A (ja) 1993-04-05 1994-03-31 転置ディジタルfirフィルターにおいて、2進入力信号にタップ係数を乗ずるための方法および配列ならびに転置ディジタルフィルターを設計するための方法
DE69425565T DE69425565T2 (de) 1993-04-05 1994-03-31 Verfahren und vorrichtung in einem transponierten digitalen fir-filter zur multiplikation eines binären eingangssignals mit filterkoeffizienten und verfahren zum entwurf eines digitalen transponierten filters

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI931532 1993-04-05
FI931532A FI96256C (fi) 1993-04-05 1993-04-05 Menetelmä ja järjestely transponoidussa digitaalisessa FIR-suodattimessa binäärisen sisääntulosignaalin kertomiseksi tappikertoimilla sekä menetelmä transponoidun digitaalisen suodattimen suunnittelemiseksi

Publications (4)

Publication Number Publication Date
FI931532A0 FI931532A0 (fi) 1993-04-05
FI931532A FI931532A (fi) 1994-10-06
FI96256B FI96256B (fi) 1996-02-15
FI96256C true FI96256C (fi) 1996-05-27

Family

ID=8537687

Family Applications (1)

Application Number Title Priority Date Filing Date
FI931532A FI96256C (fi) 1993-04-05 1993-04-05 Menetelmä ja järjestely transponoidussa digitaalisessa FIR-suodattimessa binäärisen sisääntulosignaalin kertomiseksi tappikertoimilla sekä menetelmä transponoidun digitaalisen suodattimen suunnittelemiseksi

Country Status (8)

Country Link
US (1) US6370556B1 (fi)
EP (1) EP0693236B1 (fi)
JP (1) JPH08508857A (fi)
KR (1) KR100302093B1 (fi)
AT (1) ATE195617T1 (fi)
DE (1) DE69425565T2 (fi)
FI (1) FI96256C (fi)
WO (1) WO1994023493A1 (fi)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI97002C (fi) * 1993-12-17 1996-09-25 Eero Juhani Pajarre Suora FIR-suodatin, menetelmä pistetulon laskemiseksi FIR-suodattimessa ja menetelmä suoran FIR-suodattimen suunnittelemiseksi
US5848200A (en) * 1995-08-31 1998-12-08 General Instrument Corporation Method and apparatus for performing two dimensional video convolving
FI101915B1 (fi) 1996-12-04 1998-09-15 Nokia Telecommunications Oy Desimointimenetelmä ja desimointisuodatin
SG84516A1 (en) * 1997-10-15 2001-11-20 St Microelectronics Pte Ltd Area efficient realization of coefficient architecture fir, iir filters and combinational/sequential logic structure with zero latency clock output
WO2000022728A1 (en) * 1998-10-13 2000-04-20 Stmicroelectronics Pte Ltd Area efficient realization of coefficient architecture for bit-serial fir, iir filters and combinational/sequential logic structure with zero latency clock output
US7007053B1 (en) 1998-10-13 2006-02-28 Stmicroelectronics Asia Pacific (Pte) Ltd. Area efficient realization of coefficient architecture for bit-serial FIR, IIR filters and combinational/sequential logic structure with zero latency clock output
EP1652065B1 (en) * 2003-07-23 2013-09-04 ST-Ericsson SA Device and method for composing codes
US7385537B2 (en) * 2005-02-28 2008-06-10 Texas Instruments Incorporated Linear feedback shift register first-order noise generator
US7348915B2 (en) * 2006-07-19 2008-03-25 Quickfilter Technologies, Inc. Programmable digital filter system
US9098435B1 (en) 2006-09-28 2015-08-04 L-3 Communciations Corp. Finite impulse response filter with parallel input
DE102006053508A1 (de) * 2006-11-14 2008-05-15 Zinoviy, Lerner, Dipl.-Ing. Verfahren zur digitalen Signalverarbeitung
DE102007006203A1 (de) * 2007-02-08 2008-08-21 Zinoviy, Lerner, Dipl.-Ing. Verfahren zur digitalen Filterung im Frequenzbereich
US9077316B2 (en) * 2012-12-17 2015-07-07 Oracle International Corporation Transmitter finite impulse response characterization
KR101898534B1 (ko) * 2016-12-07 2018-09-13 동국대학교 산학협력단 고주파 신호 필터링을 위한 디지털 체인 필터
KR102035935B1 (ko) 2018-07-04 2019-10-23 피앤피넷 주식회사 유한 임펄스 응답 필터 액셀러레이터
CN110245756B (zh) * 2019-06-14 2021-10-26 第四范式(北京)技术有限公司 用于处理数据组的可编程器件及处理数据组的方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3696235A (en) * 1970-06-22 1972-10-03 Sanders Associates Inc Digital filter using weighting
US4430721A (en) * 1981-08-06 1984-02-07 Rca Corporation Arithmetic circuits for digital filters
US4811259A (en) * 1985-09-27 1989-03-07 Cogent Systems, Inc. Limited shift signal processing system and method
GB8612455D0 (en) * 1986-05-22 1986-07-02 Inmos Ltd Signal processing apparatus
US4791597A (en) * 1986-10-27 1988-12-13 North American Philips Corporation Multiplierless FIR digital filter with two to the Nth power coefficients
US4982354A (en) * 1987-05-28 1991-01-01 Mitsubishi Denki Kabushiki Kaisha Digital finite impulse response filter and method
DE3841268A1 (de) * 1988-12-08 1990-06-13 Thomson Brandt Gmbh Digitales filter
JPH0828649B2 (ja) * 1989-02-16 1996-03-21 日本電気株式会社 ディジタルフィルタ
JPH0449419A (ja) * 1990-06-19 1992-02-18 Sony Corp 係数乗算回路
JPH04270510A (ja) * 1990-12-28 1992-09-25 Advantest Corp ディジタルフィルタ及び送信機

Also Published As

Publication number Publication date
FI931532A0 (fi) 1993-04-05
ATE195617T1 (de) 2000-09-15
EP0693236B1 (en) 2000-08-16
US6370556B1 (en) 2002-04-09
FI96256B (fi) 1996-02-15
JPH08508857A (ja) 1996-09-17
EP0693236A1 (en) 1996-01-24
KR100302093B1 (ko) 2001-10-22
WO1994023493A1 (en) 1994-10-13
DE69425565D1 (de) 2000-09-21
FI931532A (fi) 1994-10-06
KR960702212A (ko) 1996-03-28
DE69425565T2 (de) 2001-04-26

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