ES2910956T3 - Dispositivo integrado que comprende pastillas apiladas sobre capas de redistribución - Google Patents

Dispositivo integrado que comprende pastillas apiladas sobre capas de redistribución Download PDF

Info

Publication number
ES2910956T3
ES2910956T3 ES15710617T ES15710617T ES2910956T3 ES 2910956 T3 ES2910956 T3 ES 2910956T3 ES 15710617 T ES15710617 T ES 15710617T ES 15710617 T ES15710617 T ES 15710617T ES 2910956 T3 ES2910956 T3 ES 2910956T3
Authority
ES
Spain
Prior art keywords
layer
implementations
interconnects
redistribution
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
ES15710617T
Other languages
English (en)
Spanish (es)
Inventor
Urmi Ray
Shiqun Gu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Application granted granted Critical
Publication of ES2910956T3 publication Critical patent/ES2910956T3/es
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H10W70/614—
    • H10W20/20—
    • H10W70/09—
    • H10W72/0198—
    • H10W72/072—
    • H10W72/20—
    • H10W72/851—
    • H10W72/90—
    • H10W74/019—
    • H10W90/00—
    • H10W90/701—
    • H10W70/095—
    • H10W70/099—
    • H10W72/07207—
    • H10W72/241—
    • H10W72/252—
    • H10W72/29—
    • H10W72/874—
    • H10W72/9413—
    • H10W72/9415—
    • H10W72/944—
    • H10W74/142—
    • H10W90/10—
    • H10W90/20—
    • H10W90/297—
    • H10W90/722—

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
ES15710617T 2014-02-14 2015-02-12 Dispositivo integrado que comprende pastillas apiladas sobre capas de redistribución Active ES2910956T3 (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/181,371 US9583460B2 (en) 2014-02-14 2014-02-14 Integrated device comprising stacked dies on redistribution layers
PCT/US2015/015639 WO2015123426A2 (en) 2014-02-14 2015-02-12 Integrated device comprising stacked dies on redistribution layers

Publications (1)

Publication Number Publication Date
ES2910956T3 true ES2910956T3 (es) 2022-05-17

Family

ID=52686444

Family Applications (1)

Application Number Title Priority Date Filing Date
ES15710617T Active ES2910956T3 (es) 2014-02-14 2015-02-12 Dispositivo integrado que comprende pastillas apiladas sobre capas de redistribución

Country Status (9)

Country Link
US (1) US9583460B2 (enExample)
EP (1) EP3105789B1 (enExample)
JP (2) JP6309643B2 (enExample)
KR (1) KR101872510B1 (enExample)
CN (2) CN106133897B (enExample)
BR (1) BR112016018580B1 (enExample)
CA (1) CA2937552C (enExample)
ES (1) ES2910956T3 (enExample)
WO (1) WO2015123426A2 (enExample)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9852998B2 (en) * 2014-05-30 2017-12-26 Taiwan Semiconductor Manufacturing Company, Ltd. Ring structures in device die
US9842825B2 (en) * 2014-09-05 2017-12-12 Taiwan Semiconductor Manufacturing Company, Ltd. Substrateless integrated circuit packages and methods of forming same
JP6330788B2 (ja) * 2015-11-18 2018-05-30 株式会社村田製作所 電子デバイス
WO2017109536A1 (en) * 2015-12-21 2017-06-29 Intel IP Corporation System-in-package devices and methods for forming system-in-package devices
US10276402B2 (en) * 2016-03-21 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor package and manufacturing process thereof
US10134708B2 (en) * 2016-08-05 2018-11-20 Taiwan Semiconductor Manufacturing Company, Ltd. Package with thinned substrate
KR20230047499A (ko) * 2016-12-29 2023-04-07 인텔 코포레이션 하이퍼칩
US10854568B2 (en) 2017-04-07 2020-12-01 Taiwan Semiconductor Manufacturing Company, Ltd. Packages with Si-substrate-free interposer and method forming same
DE102017124104B4 (de) 2017-04-07 2025-05-15 Taiwan Semiconductor Manufacturing Co., Ltd. Packages mit si-substrat-freiem interposer und verfahren zum bilden derselben
DE102017123449B4 (de) 2017-04-10 2023-12-28 Taiwan Semiconductor Manufacturing Co. Ltd. Gehäuse mit Si-substratfreiem Zwischenstück und Ausbildungsverfahren
US10522449B2 (en) 2017-04-10 2019-12-31 Taiwan Semiconductor Manufacturing Company, Ltd. Packages with Si-substrate-free interposer and method forming same
CN107226452B (zh) * 2017-05-24 2019-05-31 中国科学院上海微系统与信息技术研究所 共面键合结构及其制备方法
KR102412613B1 (ko) 2017-07-24 2022-06-23 삼성전자주식회사 반도체 패키지 및 이의 제조 방법
CN107275323B (zh) * 2017-07-25 2018-05-01 睿力集成电路有限公司 一种芯片堆栈立体封装结构
US10290571B2 (en) * 2017-09-18 2019-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. Packages with si-substrate-free interposer and method forming same
WO2019059950A1 (en) * 2017-09-25 2019-03-28 Intel Corporation STACK OF MONOLITHIC CHIPS USING A DOUBLE-SIDED INTERCONNECTION LAYER
US11398451B2 (en) 2019-03-01 2022-07-26 Sandisk Technologies Llc Methods for reusing substrates during manufacture of a bonded assembly including a logic die and a memory die
US11239253B2 (en) 2019-03-01 2022-02-01 Sandisk Technologies Llc Three-dimensional memory device having an epitaxial vertical semiconductor channel and method for making the same
US11424231B2 (en) 2019-03-01 2022-08-23 Sandisk Technologies Llc Three-dimensional memory device having an epitaxial vertical semiconductor channel and method for making the same
US10790300B2 (en) * 2019-03-01 2020-09-29 Sandisk Technologies Llc Three-dimensional memory device having an epitaxial vertical semiconductor channel and method for making the same
US11410902B2 (en) 2019-09-16 2022-08-09 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
US11217560B2 (en) * 2019-10-28 2022-01-04 Nanya Technology Corporation Die assembly and method of manufacturing the same
US11784151B2 (en) * 2020-07-22 2023-10-10 Qualcomm Incorporated Redistribution layer connection
WO2022016470A1 (zh) * 2020-07-23 2022-01-27 华为技术有限公司 一种芯片封装结构、电子设备
KR20230063921A (ko) 2021-10-29 2023-05-10 삼성전자주식회사 반도체 장치 및 이의 제조 방법

Family Cites Families (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3011098U (ja) * 1994-11-11 1995-05-16 勝規 森 取付具付き水準器
JP2000155027A (ja) * 1998-11-19 2000-06-06 Komatsu Ltd 水準器
JP2003344047A (ja) * 2002-05-27 2003-12-03 Hokuriku Seiko:Kk 遊技盤面傾斜器
US20070126085A1 (en) 2005-12-02 2007-06-07 Nec Electronics Corporation Semiconductor device and method of manufacturing the same
KR100753415B1 (ko) 2006-03-17 2007-08-30 주식회사 하이닉스반도체 스택 패키지
JP2008091639A (ja) * 2006-10-02 2008-04-17 Nec Electronics Corp 電子装置およびその製造方法
JP2008091638A (ja) * 2006-10-02 2008-04-17 Nec Electronics Corp 電子装置およびその製造方法
US7969009B2 (en) * 2008-06-30 2011-06-28 Qualcomm Incorporated Through silicon via bridge interconnect
US8446017B2 (en) * 2009-09-18 2013-05-21 Amkor Technology Korea, Inc. Stackable wafer level package and fabricating method thereof
US9431316B2 (en) * 2010-05-04 2016-08-30 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming channels in back surface of FO-WLCSP for heat dissipation
TWI427753B (zh) * 2010-05-20 2014-02-21 日月光半導體製造股份有限公司 封裝結構以及封裝製程
US9620455B2 (en) 2010-06-24 2017-04-11 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming anisotropic conductive film between semiconductor die and build-up interconnect structure
KR101683814B1 (ko) 2010-07-26 2016-12-08 삼성전자주식회사 관통 전극을 구비하는 반도체 장치
US8754516B2 (en) * 2010-08-26 2014-06-17 Intel Corporation Bumpless build-up layer package with pre-stacked microelectronic devices
US9224647B2 (en) * 2010-09-24 2015-12-29 Stats Chippac, Ltd. Semiconductor device and method of forming TSV interposer with semiconductor die and build-up interconnect structure on opposing surfaces of the interposer
US8786066B2 (en) * 2010-09-24 2014-07-22 Intel Corporation Die-stacking using through-silicon vias on bumpless build-up layer substrates including embedded-dice, and processes of forming same
US8993377B2 (en) * 2010-09-29 2015-03-31 Stats Chippac, Ltd. Semiconductor device and method of bonding different size semiconductor die at the wafer level
US8421245B2 (en) * 2010-12-22 2013-04-16 Intel Corporation Substrate with embedded stacked through-silicon via die
US8648470B2 (en) * 2011-01-21 2014-02-11 Stats Chippac, Ltd. Semiconductor device and method of forming FO-WLCSP with multiple encapsulants
JP5716415B2 (ja) * 2011-01-26 2015-05-13 富士通株式会社 半導体装置の製造方法
JP2012227443A (ja) * 2011-04-21 2012-11-15 Sumitomo Bakelite Co Ltd 半導体装置の製造方法および半導体装置
KR101739945B1 (ko) 2011-05-02 2017-06-09 삼성전자주식회사 반도체 패키지 및 이를 제조하는 방법
KR20130015885A (ko) 2011-08-05 2013-02-14 삼성전자주식회사 반도체 패키지 및 그 제조 방법
JP2013038300A (ja) 2011-08-10 2013-02-21 Fujitsu Ltd 電子装置及びその製造方法
US8754514B2 (en) * 2011-08-10 2014-06-17 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-chip wafer level package
JP2013045863A (ja) * 2011-08-24 2013-03-04 Elpida Memory Inc 半導体装置およびその製造方法
KR101906408B1 (ko) * 2011-10-04 2018-10-11 삼성전자주식회사 반도체 패키지 및 그 제조 방법
US10475759B2 (en) * 2011-10-11 2019-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit structure having dies with connectors of different sizes
JP6103470B2 (ja) * 2011-12-14 2017-03-29 川崎化成工業株式会社 縮合多環芳香族骨格を有する連鎖移動剤並びに該縮合多環芳香族骨格を有するポリマーおよびポリマーの製造方法
US8546955B1 (en) 2012-08-16 2013-10-01 Xilinx, Inc. Multi-die stack package
US9165887B2 (en) * 2012-09-10 2015-10-20 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with discrete blocks
US9478474B2 (en) * 2012-12-28 2016-10-25 Taiwan Semiconductor Manufacturing Company, Ltd. Methods and apparatus for forming package-on-packages
US9524942B2 (en) * 2013-12-18 2016-12-20 Taiwan Semiconductor Manufacturing Company, Ltd. Chip-on-substrate packaging on carrier
JP6551903B2 (ja) * 2015-06-29 2019-07-31 株式会社スリーストン 傾斜計
JP6799914B2 (ja) * 2015-12-10 2020-12-16 大都販売株式会社 傾斜計、遊技機傾斜測定方法

Also Published As

Publication number Publication date
CN110060974A (zh) 2019-07-26
CN110060974B (zh) 2023-02-17
EP3105789B1 (en) 2022-03-23
US20150235988A1 (en) 2015-08-20
WO2015123426A2 (en) 2015-08-20
WO2015123426A3 (en) 2015-10-08
CA2937552A1 (en) 2015-08-20
CA2937552C (en) 2019-09-10
EP3105789A2 (en) 2016-12-21
BR112016018580B1 (pt) 2022-09-20
BR112016018580A2 (enExample) 2017-08-08
US9583460B2 (en) 2017-02-28
JP6309643B2 (ja) 2018-04-11
KR20160122769A (ko) 2016-10-24
JP2017506001A (ja) 2017-02-23
CN106133897B (zh) 2019-07-23
JP2018082205A (ja) 2018-05-24
CN106133897A (zh) 2016-11-16
KR101872510B1 (ko) 2018-06-28

Similar Documents

Publication Publication Date Title
ES2910956T3 (es) Dispositivo integrado que comprende pastillas apiladas sobre capas de redistribución
TWI575693B (zh) 包括無機層中的高密度互連和有機層中的重分佈層的集成裝置
CN107799499B (zh) 半导体封装结构及其制造方法
TWI508242B (zh) 帶有貫穿模具第一層級互連體之三維積體電路封裝
TWI808115B (zh) 半導體封裝體、半導體封裝系統及形成半導體封裝體之方法
US9153560B2 (en) Package on package (PoP) integrated device comprising a redistribution layer
US20150255416A1 (en) Integrated device comprising high density interconnects and redistribution layers
KR102574410B1 (ko) 하이브리드 인터포저 및 이를 구비한 반도체 패키지
KR20180064402A (ko) IC(INTEGRATED CIRCUIT) 패키지들 사이의 갭 제어기를 포함하는 PoP(PACKAGE-ON-PACKAGE) 디바이스
CN107690699A (zh) 具有焊接到管芯或基板的重分布层的高纵横比互连的集成电路封装及对应制造方法
JP2017511971A (ja) 封止層を横切るサイドバリア層を有するビアを備える集積デバイス
US8927340B2 (en) Double-sided adhesive tape, semiconductor packages, and methods of fabricating the same
JP2017515312A (ja) カプセル封止層の中にビアとしてワイヤを備える集積デバイス
US11018056B1 (en) Encapsulated solder TSV insertion interconnect
US10998271B1 (en) High density pillar interconnect conversion with stack to substrate connection
CN116387263A (zh) 位于直接接合到另一ic管芯的ic管芯上的贯穿模制物互连结构