CN107690699A - 具有焊接到管芯或基板的重分布层的高纵横比互连的集成电路封装及对应制造方法 - Google Patents
具有焊接到管芯或基板的重分布层的高纵横比互连的集成电路封装及对应制造方法 Download PDFInfo
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- CN107690699A CN107690699A CN201680028746.0A CN201680028746A CN107690699A CN 107690699 A CN107690699 A CN 107690699A CN 201680028746 A CN201680028746 A CN 201680028746A CN 107690699 A CN107690699 A CN 107690699A
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Abstract
一种封装(例如,晶片级封装)(300,1102),该封装包括管芯(305)、耦合到管芯(305)的重分布部分(306)、耦合到封装(300,1102)的重分布部分(306)的第一高纵横比互连(308,1150,1152),其中第一高纵横比互连(308,1150,1152)包括大约至少1:2的宽度与高度比,以及耦合到第一高纵横比互连(308,1150,1152)和重分布部分(306)的第一焊料互连(380,1130,1132)。封装(1102)可由第二焊料互连(1180,1182)耦合到印刷电路板(1108),该第二焊料互连(1180,1182)耦合到第一高纵横比互连(1150,1152)和印刷电路板(1108)。在替换的实施例中,封装(1600)包括管芯(1604)、耦合到管芯(1604)的多个焊球(1606)、通过该多个焊球(1606)耦合到管芯(1604)的封装基板(1602)、耦合到封装基板(1602)的第一高纵横比互连(1608),其中,第一高纵横比互连(1608)包括大约至少1:2的宽度与高度比,以及耦合到第一高纵横比互连(1608)和封装基板(1602)的第一焊料互连(1610)。该封装可通过第一高纵横比互连(1608)耦合到印刷电路板(1700),高纵横比互连(1608)耦合到印刷电路板(1700)的互连(例如,焊盘)(1138)和焊料互连(1718)。第一高纵横比互连(700,900)可以是复合互连,该复合互连包括第一传导核心(702,902)以及至少部分地包封第一传导核心(702,902)的第一传导层(704,904)。第一传导层(704,904)可以是扩散阻挡。复合互连(900)可进一步包括第二传导层(906),该第二传导层(906)至少部分地包封第一传导层(904)。第二传导层(906)可包括焊料。
Description
相关申请的交叉引用
本申请要求于2015年5月21日提交的题为“High Aspect Ratio Interconnectfor a Wafer Level Package and/or Integrated Device Package(用于晶片级封装和/或集成器件封装的高纵横比互连)”的美国临时申请No.62/164,960以及于2015年8月26日提交的题为“High Aspect Ratio Interconnect for Wafer Level Package(WLP)AndIntegrated Circuit(IC)Package(用于晶片级封装(WLP)和集成电路(IC)封装的高纵横比互连)”的美国非临时申请No.14/836,501的优先权,其中上述两项申请均通过援引明确纳入于此。
背景
领域
各种特征涉及集成电路(IC)封装,尤其涉及用于晶片级封装和/或集成电路(IC)封装的高纵横比互连。
背景
图1解说了封装100(例如,集成电路(IC)封装),该封装100包括第一管芯102和封装基板106。封装基板106包括电介质层160和多个互连162。封装基板106是层压基板。多个互连162包括迹线、焊盘和/或通孔。第一管芯102(其可以是裸管芯)通过第一多个焊球112耦合到封装基板106。封装基板106通过第二多个焊球116耦合到印刷电路板(PCB)108。
通常,焊球具有大约1:1的宽度与高度纵横比。由于焊球的大小和纵横比,因此使用焊球(例如,焊球116)将封装100耦合到印刷电路板(PCB)108严重限制了封装100与印刷电路板(PCB)108之间可以存在多少连接。由于焊球占用如此多的空间,因此增加封装100与印刷电路板(PCB)108之间的连接数目的唯一方式是增加封装100的大小,这是不理想的,因为存在对具有更优的形状因子(例如,更小的形状因子)、而同时满足移动计算设备和/或可穿戴计算设备的需求和/或要求的封装的持续需求。
图2解说了另一封装200(例如,晶片级封装)的剖面图。封装200包括基板201、若干下金属和下电介质层202、焊盘204、钝化层206、第一绝缘层208、第一金属层210、第二绝缘层212、以及凸块下金属化(UBM)层214。焊盘204、第一金属层210和UBM层214是导电材料(例如,铜)。图2还解说了封装200上的焊球216。具体而言,焊球216耦合到UBM层214。焊球216具有大约1:1的宽度与高度纵横比,这对于提供封装200与印刷电路板之间的高密度连接是不理想的。具体而言,焊球216相对较大的大小限制了焊球之间的间距,并且由此限制了封装200的高密度连接。
因此,存在对具有改善的连接和改善的形状因子、而同时满足移动计算设备和/或可穿戴计算设备的需求和/或要求的封装(例如,晶片级封装)的需求。
概述
各种特征涉及用于晶片级封装和/或集成电路(IC)封装的高纵横比互连。
一个示例提供了一种封装,所述封装包括管芯、耦合到所述管芯的重分布部分、耦合到所述封装的所述重分布部分的第一高纵横比(HAR)互连,其中所述第一高纵横比(HAR)互连包括大约至少1:2的宽度与高度比,以及耦合到所述第一高纵横比(HAR)互连和所述重分布部分的第一焊料互连。
另一示例提供了一种器件,所述器件包括印刷电路板(PCB)以及耦合到所述印刷电路板(PCB)的封装。所述封装包括管芯、耦合到所述管芯的重分布部分、耦合到所述封装的所述重分布部分和所述印刷电路板(PCB)的第一高纵横比(HAR)互连,其中所述第一高纵横比(HAR)互连包括大约至少1:2的宽度与高度比,以及耦合到所述第一高纵横比(HAR)互连和所述重分布部分的第一焊料互连。所述器件包括耦合到所述第一高纵横比(HAR)互连和所述印刷电路板(PCB)的第二焊料互连。
另一示例提供了一种用于制造封装的方法。所述方法提供管芯。所述方法在所述管芯上形成重分布部分。所述方法在所述重分布部分上形成第一焊料互连。所述方法使用所述第一焊料互连将第一高纵横比(HAR)互连耦合到所述封装的所述重分布部分,其中所述第一高纵横比(HAR)互连包括大约至少1:2的宽度与高度比。
另一示例提供了一种封装,所述封装包括管芯、耦合到所述管芯的若干焊球、通过所述若干焊球耦合到所述管芯的封装基板、耦合到所述封装基板的第一高纵横比(HAR)互连,其中所述第一高纵横比(HAR)互连包括大约至少1:2的宽度与高度比,以及耦合到所述第一高纵横比(HAR)互连和所述封装基板的第一焊料互连。
附图
在结合附图理解下面阐述的详细描述时,各种特征、本质和优点会变得明显,在附图中,相同的附图标记始终作相应标识。
图1解说了封装的剖面图。
图2解说了另一封装的剖面图。
图3解说了包括高纵横比互连的封装(例如,晶片级封装)的示例的剖面图。
图4解说了封装中的重分布金属层的平面图。
图5解说了包括高纵横比互连的封装(例如,晶片级封装)的另一示例的剖面图。
图6解说了封装中的重分布金属层的平面图。
图7解说了包括核心互连的高纵横比互连的示例的剖面图。
图8解说了包括核心互连的高纵横比互连的示例的平面图。
图9解说了包括核心互连的高纵横比互连的另一示例的剖面图。
图10解说了包括核心互连的高纵横比互连的另一示例的平面图。
图11解说了用于将包括至少一个高纵横比互连的封装(例如,晶片级封装)耦合到印刷电路板(PCB)的序列。
图12(包括图12A-12D)解说了用于制造包括高纵横比互连的封装(例如,晶片级封装)的示例性序列。
图13解说了用于制造包括高纵横比互连的封装的方法的示例性流程图。
图14解说了包括高纵横比互连的晶片级封装(WLP)的示例的剖面图。
图15解说了包括高纵横比互连的晶片级封装(WLP)的另一示例的剖面图。
图16解说了包括高纵横比互连的封装的另一示例的剖面图。
图17解说了用于制造包括管芯和高纵横比互连的封装的示例性序列。
图18解说了可集成本文所描述的管芯、集成器件、器件封装、封装、集成电路和/或PCB的各种电子设备。
详细描述
在以下描述中,给出了具体细节以提供对本公开的各个方面的透彻理解。然而,本领域普通技术人员将理解,没有这些具体细节也可实践这些方面。例如,电路可能用框图示出以避免使这些方面湮没在不必要的细节中。在其他实例中,公知的电路、结构和技术可能不被详细示出以免湮没本公开的这些方面。
本公开描述了一种封装(例如,晶片级封装),该封装包括管芯、耦合到该管芯的重分布部分、耦合到该封装的重分布部分的第一高纵横比(HAR)互连,其中第一高纵横比(HAR)互连包括大约至少1:2的宽度与高度比。该封装还包括耦合到第一高纵横比(HAR)互连和重分布部分的第一焊料互连。在一些实现中,第一高纵横比(HAR)互连包括第一传导核心、以及至少部分地包封该第一传导核心的第一传导层。在一些实现中,第一传导层是扩散阻挡(diffusion barrier)。在一些实现中,第一传导核心包括第一表面、第二表面和第三表面。第一传导层至少部分地包封第一传导核心的第一表面、第二表面和第三表面。
互连是器件(例如,集成器件、封装、集成电路(IC)封装、管芯)和/或基底(例如,器件封装基底、封装基板、印刷电路板(PCB)、中介体)的允许或促成两个点、元件和/或组件之间的电连接的元件或组件。在一些实现中,互连可包括迹线、通孔、焊盘、柱、重分布金属层、和/或凸块下金属化(UBM)层。在一些实现中,互连是为信号(例如,数据信号、接地信号、功率信号)提供电路径的导电材料。互连可包括一个以上的元件/组件。
包括高纵横比(HAR)互连的示例性封装
图3解说了包括至少一个高纵横比互连的封装300的剖面图。封装300可以是晶片级封装(WLP)。封装300包括基板302、内部部分304、重分布部分306、以及至少一个高纵横比(HAR)互连308。在一些实现中,基板302和内部部分304可形成封装300的管芯305(例如,裸管芯)。
基板302可包括硅、玻璃和/或陶瓷。内部部分304耦合到基板302。内部部分304包括至少一个电介质层340(例如,下级电介质层)、至少一个焊盘342、第一钝化层344以及第二钝化层346。至少一个焊盘342和第一钝化层344在至少一个电介质层340上。在一些实现中,存在一个钝化层。在一些实现中,第一钝化层344和第二钝化层346可以是作为至少一个电介质层340的一部分的相同钝化层。
内部部分304还可包括位于至少一个电介质层340中的若干金属层(例如,下级金属层)。在至少一个电介质层340中的这些金属层(例如,M1金属层、M2金属层、M3金属层、M4金属层、M5金属层、M6金属层、M7金属层)(未示出)可定义封装300的内部部分304中的互连(例如,迹线、通孔)。在一些实现中,至少一个焊盘342可在封装300的内部部分304的顶层金属层之上。至少一个焊盘342可耦合(例如,直接耦合)到封装300的内部部分304的金属层(例如,M7金属层)。至少一个焊盘342可包括铝。在一些实现中,封装300的基板302和/或内部部分304可包括若干晶体管和/或其他电子组件。如上面提到的,基板302和内部部分304可形成封装300的管芯305(例如,裸管芯)。
重分布部分306耦合到管芯305。更具体而言,重分布部分306耦合到内部部分304。重分布部分306包括第一绝缘层360、第一重分布金属层362、以及第二绝缘层364。在一些实现中,第一绝缘层360和/或第二绝缘层364可包括聚酰亚胺层(PI)、聚苯并恶唑(PBO)和/或其他聚合物层中的一者或多者。第一绝缘层360位于第二钝化层346上。
在一些实现中,重分布部分306允许来自管芯305的输入/输出(I/O)焊盘的信号在封装300的其他位置中可用(例如,扇出)。在一些实现中,第一重分布金属层362将来自管芯305的I/O焊盘(例如,焊盘342)的信令重分布至封装300中的其他位置。重分布部分306可具有不同的厚度。在一些实现中,重分布部分306可具有大约50微米(μm)或更小的厚度。
重分布金属层362耦合(例如,直接耦合)到至少一个焊盘342。重分布层或重分布金属层是封装、晶片级封装、集成电路(IC)封装和/或器件封装的重分布部分的金属层。重分布层可包括一个或多个重分布互连,其形成在重分布部分的相同金属层上。集成电路(IC)封装或器件封装的重分布部分可包括若干重分布层,每个重分布层可包括一个或多个重分布互连。因此,例如,重分布部分可包括第一重分布金属层上的第一重分布互连、以及不同于第一重分布金属层的第二重分布金属层上的第二重分布互连。重分布金属层362在第一绝缘层360上。第二绝缘层364在重分布金属层362和/或第一绝缘层360上。
第二绝缘层364中存在开口和/或腔,以使得重分布金属层362的一部分被暴露。高纵横比(HAR)互连308可通过第二绝缘层364中的开口耦合到重分布金属层362。高纵横比(HAR)互连308可通过焊料互连380耦合到重分布金属层362。高纵横比(HAR)互连308包括第一表面(例如,底表面)、第二表面(例如,顶表面)以及第三表面(例如,侧表面)。在一些实现中,高纵横比(HAR)互连308的第一表面耦合到重分布金属层362。在一些实现中,高纵横比(HAR)互连308和焊料互连380是封装300的一部分。可使用回流工艺将高纵横比(HAR)互连308和焊料互连380耦合(例如,接合)到封装300。
高纵横比(HAR)互连308可具有大约至少1:2的宽度与高度纵横比。在一些实现中,高纵横比(HAR)互连308可具有大约1:5的宽度与高度纵横比。若干高纵横比(HAR)互连(例如,高纵横比互连308)的使用允许封装与封装基板、印刷电路板(PCB)、或任何其他器件之间的高密度连接,因为高纵横比互连之间的间距可显著小于焊球之间的间距。在一些实现中,两个毗邻高纵横比互连之间的间距可以是大约300微米(μm)或更小。在一些实现中,两个毗邻高纵横比互连之间的间距可以是大约100微米(μm)或更大。在一些实现中,高纵横比互连308可具有大约15微米(μm)或更大的宽度或直径。在一些实现中,高纵横比(HAR)互连308可具有大约75微米(μm)或更小的高度。下面在至少图7-10中进一步解说和描述高纵横比(HAR)互连的更详细示例。
图4解说了封装的重分布部分的重分布金属层的平面图。如图4中所示,重分布金属层362定义了重分布互连,该重分布互连包括第一重分布互连部分400、第二重分布互连部分402、以及第三重分布互连部分404。第一重分布互连部分400耦合到焊盘342。第一重分布互连部分400耦合到第二重分布互连部分402。第二重分布互连部分402可以是重分布迹线。第二重分布互连部分402耦合到第三重分布互连部分404。第三重分布互连部分404可以是重分布焊盘。第三重分布互连部分404耦合到高纵横比(HAR)互连308。高纵横比(HAR)互连308包括第一表面(例如,底表面)、第二表面(例如,顶表面)以及第三表面(例如,侧表面)。在一些实现中,高纵横比(HAR)互连308的第一表面耦合到第三重分布互连部分404。图4解说了高纵横比(HAR)互连308被放置在重分布金属层362之上(例如,在重分布金属层362上)。然而,在一些实现中,重分布金属层362中可存在腔(未示出),并且高纵横比(HAR)互连308通过该腔耦合到重分布金属层362,以使得重分布金属层362围绕(例如,沿横向横截平面)高纵横比(HAR)互连308。要注意,不同的实现可针对第三重分布互连部分404使用不同的形状、设计和/或大小。不同的实现可提供以不同方式耦合到封装的至少一个高纵横比互连。
图5解说了包括至少一个高纵横比互连的另一封装500的剖面图。封装500可以是晶片级封装(WLP)。封装500包括基板302、内部部分304、重分布部分506、以及至少一个高纵横比互连308。
封装500类似于如图3中所描述的封装300,不同之处在于高纵横比互连以不同方式耦合到封装500的重分布部分。图5的基板302和内部部分304可类似于如图3中所描述的基板和内部部分。
重分布部分506包括第一绝缘层360、重分布金属层562、以及第二绝缘层364。重分布部分506可具有不同的厚度。在一些实现中,重分布部分506可具有大约50微米(μm)或更小的厚度。
高纵横比(HAR)互连308耦合到重分布金属层562。高纵横比(HAR)互连308可通过焊料互连380耦合到重分布金属层562。高纵横比(HAR)互连308包括第一表面(例如,底表面)、第二表面(例如,顶表面)以及第三表面(例如,侧表面)。高纵横比(HAR)互连308的第一表面在第一绝缘层360上。在一些实现中,高纵横比(HAR)互连308的第三表面(例如,侧表面)耦合到重分布金属层562。在一些实现中,高纵横比(HAR)互连308的第三表面不与重分布金属层562直接接触。相反,高纵横比(HAR)互连308的第三表面通过焊料互连380耦合到重分布金属层562。在一些实现中,高纵横比(HAR)互连308和焊料互连380是封装500的一部分。可使用回流工艺将高纵横比(HAR)互连308和焊料互连380耦合(例如,接合)到封装500。
图6解说了封装的重分布部分的重分布金属层的平面图。如图6中所示,重分布金属层562定义了重分布互连,该重分布互连包括第一重分布互连部分400、第二重分布互连部分402、以及第三重分布互连部分604。第一重分布互连部分400耦合到焊盘342。第一重分布互连部分400耦合到第二重分布互连部分402。第二重分布互连部分402可以是重分布迹线。第二重分布互连部分402耦合到第三重分布互连部分604。第三重分布互连部分604可以是重分布焊盘。第三重分布互连部分604耦合到高纵横比(HAR)互连308。高纵横比(HAR)互连308包括第一表面(例如,底表面)、第二表面(例如,顶表面)以及第三表面(例如,侧表面)。在一些实现中,高纵横比(HAR)互连308的第三表面(例如,侧表面)耦合到第三重分布互连部分604。在一些实现中,高纵横比(HAR)互连308的第三表面不与第三重分布互连部分604直接接触。相反,高纵横比(HAR)互连308的第三表面(例如,侧表面)通过焊料互连380耦合到第三重分布互连部分604。在一些实现中,这允许高纵横比(HAR)互连308以较小的覆盖区面积被放置到第三重分布互连部分604的捕获焊盘,这随后允许高纵横比(HAR)互连之间更精细的间距间隔。图6解说了重分布金属层562至少部分地围绕(例如,沿横向横截平面)高纵横比(HAR)互连308。在一些实现中,重分布金属层562围绕(例如,沿横向平面完全围绕)高纵横比(HAR)互连。要注意,不同的实现可针对第三重分布互连部分604使用不同的形状、设计和/或大小。
图3和5解说了具有一个高纵横比(HAR)互连的封装。然而,封装(例如,晶片级封装)可包括若干高纵横比(HAR)互连(例如,第一高纵横比(HAR)互连、第二高纵横比(HAR)互连)。由于通过使用这些高纵横比(HAR)互连而可能的显著更低的间距,因此这些高纵横比(HAR)互连可提供去往和来自封装的高密度连接。
图3和5解说了高纵横比(HAR)互连耦合到封装(例如,晶片级封装)的重分布金属层。然而,在一些实现中,封装(例如,晶片级封装)可包括耦合到重分布金属层的凸块下金属化(UBM)层(图2解说了具有UBM层的封装的示例)。在此类实例中,高纵横比(HAR)互连可耦合到UBM层。
要注意,在一些实现中,封装300和封装500还可包括包封层(图3和5中未示出包封层)。包封层(其可以是模塑或树脂填料)可至少部分地包封基板302和至少一个电介质层340。例如,包封层可至少部分地包封管芯305。在一些实现中,包封层可耦合到重分布部分306或重分布部分506。以下图15解说了包括包封层的封装(例如,晶片级封装)的示例。
示例性高纵横比互连
本公开描述了用于提供封装与印刷电路板(PCB)和/或其他器件之间的高密度连接的高纵横比互连。在图3和5中,高纵横比(HAR)互连308包括单个导电材料(例如,铜)。然而,高纵横比(HAR)互连可包括不同的组成、大小、形状、和/或设计。高纵横比(HAR)互连可具有大约至少1:2的宽度(例如,直径)与高度比。在一些实现中,高纵横比互连可具有大约1:5的宽度与高度比。
图7解说了高纵横比互连700的剖面图。在一些实现中,高纵横比互连700可以是上面提到的高纵横比(HAR)互连308,或者本公开中所描述的任何其他高纵横比互连。高纵横比互连700可以是包括若干材料的复合互连。高纵横比互连700包括第一传导核心702(例如,第一导电核心)和第一传导层704(例如,第一导电层)。第一传导层704至少部分地包封(例如,完全包封)第一传导核心702。如图7中所示,第一传导核心702包括第一表面(例如,底表面)、第二表面(例如,顶表面)、第三表面(例如,侧表面)。第一传导层704至少部分地包封第一传导核心702的第一表面、第二表面和第三表面。
在一些实现中,高纵横比互连700的宽度(例如,直径)可以是大约50微米(μm)或更小。在一些实现中,高纵横比互连700的高度可以是大约500微米(μm)或更小。
不同的实现可将不同的材料用于高纵横比互连700。在一些实现中,第一传导核心702包括铜,并且第一传导层704包括镍、锡、银和/或铜。在一些实现中,第一传导层704是扩散阻挡,其防止第一金属(例如,铜,第一传导核心702)迁移到焊料(例如,焊料互连)中。
图8解说了高纵横比互连700的平面图。如图8中所示,第一传导层704至少部分地包封第一传导核心702。
图9解说了另一高纵横比互连900的剖面图。在一些实现中,高纵横比互连900可以是上面提到的高纵横比互连308,或者本公开中所描述的任何其他高纵横比互连。高纵横比互连900可以是包括若干材料的复合互连。高纵横比互连900包括第一传导核心902(例如,第一导电核心)、第一传导层904(例如,第一导电层)、以及第二传导层906(例如,第二导电层)。第一传导层904至少部分地包封(例如,完全包封)第一传导核心902。如图9中所示,第一传导核心902包括第一表面(例如,底表面)、第二表面(例如,顶表面)、第三表面(例如,侧表面)。第一传导层904至少部分地包封(例如,完全包封)第一传导核心902的第一表面、第二表面和第三表面。第二传导层906至少部分地包封(例如,完全包封)第一传导层904。
在一些实现中,高纵横比互连900的宽度(例如,直径)可以是大约50微米(μm)或更小。在一些实现中,高纵横比互连900的高度可以是大约500微米(μm)或更小。
不同的实现可将不同的材料用于高纵横比互连900。在一些实现中,第一传导核心902包括铜。在一些实现中,第一传导层904和第二传导层906包括镍、锡、银和/或铜。在一些实现中,第一传导层904和/或第二传导层906是扩散阻挡,其防止第一金属(例如,铜,第一传导核心902)迁移到焊料(例如,焊料互连)中。
图10解说了高纵横比互连900的平面图。如图10中所示,第一传导层904至少部分地包封第一传导核心902,并且第二传导层906至少部分地包封第一传导层904。
在一些实现中,使用若干传导层的技术优势在于传导层中的一者可被用作防止一层扩散到另一层中的扩散阻挡。例如,第一传导层904可被用作第一传导核心902与第二传导层906之间的阻挡层。在一些实现中,第一传导核心902可以是铜,并且第一传导层904可以是镍。在一些实现中,第二传导层906可包括焊料。在此类实例中,镍可用作铜与焊料之间的扩散阻挡,其中该扩散阻挡防止金属(例如,铜)迁移到焊料中,由此提供更稳健并且性能更优的互连。
用于将包括高纵横比(HAR)互连的封装耦合到印刷电路板(PCB)的示例性序列
图11解说了用于将包括至少一个高纵横比互连的封装1102(例如,晶片级封装)耦合到印刷电路板(PCB)1108的示例性序列。在一些实现中,图11的封装1102和印刷电路板(PCB)1108可被实现在设备(例如,集成设备、电子设备)中。
图11的阶段1解说了在将封装1102安装到印刷电路板(PCB)1108上之后、但在应用回流工艺将封装1102通过若干高纵横比互连1112耦合(例如,接合)到PCB 1108之前的状态。封装1102可以是晶片级封装(WLP)。封装1102可以是如上面图3和/或5中所描述的封装300或封装500,或者本公开中所描述的任何封装。来自高纵横比互连1112中的至少一个互连可以是本公开中所描述的高纵横比互连中的任何一者。例如,高纵横比互连1112中的至少一者可以是高纵横比互连308、700或900。
高纵横比互连1112包括第一互连1150和第二互连1152。第一互连1150和/或第二互连1152可以是本公开中所描述的高纵横比互连中的任何一者。
阶段1解说了第一互连1150耦合到封装1102的第一重分布金属层1120。可使用第一焊料互连1130将第一互连1150耦合到第一重分布金属层1120。在阶段1之前,可能先前已使用回流工艺将第一互连1150通过第一焊料互连1130耦合(例如,接合)到第一重分布金属层1120。第一互连1150还通过第二焊料互连1160耦合到PCB 1108的第一焊盘1170。在阶段1,还未应用回流工艺将第一互连1150通过第二焊料互连1160耦合(例如,接合)到PCB1108。
阶段1进一步解说了第二互连1152耦合到封装1102的第二重分布金属层1122。可使用第三焊料互连1132将第二互连1152耦合到第二重分布金属层1122。在阶段1之前,可能先前已使用回流工艺将第二互连1152通过第三焊料互连1132耦合到第二重分布金属层1122。第二互连1152还通过第四焊料互连1162耦合到PCB 1108的第二焊盘1172。在阶段1,还未应用回流工艺将第二互连1152通过第四焊料互连1162耦合(例如,接合)到PCB 1108。
阶段2解说了在已应用回流工艺将封装1102通过若干高纵横比互连1112耦合(例如,接合)到PCB 1108之后的状态。如阶段2处所示,第一焊料互连1180将第一互连1150耦合到第一焊盘1170,并且第二焊料互连1182将第二互连1152耦合到第二焊盘1172。
第一焊料互连1180是来自第一焊料互连1130和第二焊料互连1160的某种焊料的组合。类似地,第二焊料互连1182是来自第三焊料互连1132和第四焊料互连1162的某种焊料的组合。
如阶段2处所示,来自将第一互连1150耦合到第一重分布金属层1120的第一焊料互连1130的焊料较少。来自第一焊料互连1130的一些焊料已在回流工艺期间流向第一焊盘1170,以便与第二焊料互连1160组合以形成第一焊料互连1180。类似地,来自将第二互连1152耦合到第二重分布金属层1122的第三焊料互连1132的焊料较少。来自第三焊料互连1132的一些焊料已在回流工艺期间流向第二焊盘1172,以便与第四焊料互连1162组合以形成第二焊料互连1182。
如阶段2处进一步所示,第一焊料互连1180湿涂(wet)第一互连1150的侧壁的一部分。在一些实现中,第一焊料互连1180可湿涂第一互连1150的侧壁,以使得第一焊料互连1180具有第一互连1150的高度的大约至少25%的高度。
类似地,如阶段2处所示,第二焊料互连1182湿涂第二互连1152的侧壁的一部分。在一些实现中,第二焊料互连1182可湿涂第二互连1152的侧壁,以使得第二焊料互连1182具有第二互连1152的高度的大约至少25%的高度。
在一些实现中,在回流工艺之后,第一互连1150的外壁的至少显著部分(例如,大于50%,完全)被第一焊料互连1130和/或第一焊料互连1180覆盖。类似地,在一些实现中,在回流工艺之后,第二互连1152的外壁的至少显著部分被第三焊料互连1132和/或第二焊料互连1182覆盖。在一些实现中,在回流工艺之后,第一互连1150与第一焊盘1170之间可能存在焊料。类似地,在一些实现中,在回流工艺之后,第二互连1152与第二焊盘1172之间可能存在焊料。
在一些实现中,在互连(例如,第一互连1150)的外壁和/或侧壁上具有焊料提供了封装1102与PCB 1108之间更优的电信号性能。在一些实现中,第一互连1150和/或第二互连1152可包括扩散阻挡层(例如,镍)以防止铜扩散到焊料中,这提供了更稳健并且性能更优的互连。
在一些实现中,两个毗邻高纵横比互连之间的间距可以是大约300微米(μm)或更小。在一些实现中,两个毗邻高纵横比互连之间的间距可以是大约100微米(μm)或更大。
用于制造包括高纵横比互连的封装的示例性序列
在一些实现中,制造包括至少一个高纵横比互连的封装包括若干工艺。图12(其包括图12A-12D)解说了用于提供或制造包括至少一个高纵横比互连的封装(例如,晶片级封装)的示例性序列。在一些实现中,图12A-12D的序列可被用于提供或制造图3、5的封装和/或本公开中所描述的其他封装。
应当注意,图12A-12D的序列可组合一个或多个阶段,以便简化和/或阐明用于提供或制造包括至少一个高纵横比互连的封装的序列。在一些实现中,可变化或修改这些工艺的顺序。
图12A的阶段1解说了在提供基板(例如,基板1202)之后的状态。不同的实现可将不同的材料用于基板(例如,硅基板、玻璃基板、陶瓷基板)。基板可以是晶片。
阶段2解说了在基板上提供(例如,形成)至少一个下级电介质层1240之后的状态。至少一个下级电介质层1240可包括若干下级金属层(例如,M1金属层、M2金属层、M3金属层、M4金属层、M5金属层、M6金属层、M7金属层)。出于清楚的目的,未示出这些下级金属层。下级金属层可定义至少一个下级互连(例如,管芯互连)。这些下级互连可包括迹线、通孔和/或焊盘。下级金属层和至少一个下级电介质层可以是管芯的内部部分的一部分,如图3中提到的。可使用不同的工艺来形成下级金属层。
阶段3解说了在至少一个下级电介质层1240之上提供(例如,形成)至少一个焊盘(例如,焊盘1242)之后的状态。在一些实现中,焊盘1242耦合到下级金属层(未示出)中的一者。在一些实现中,焊盘1242是顶部金属层。在一些实现中,焊盘1242是铝焊盘。然而,不同的实现可将不同的材料用于焊盘1242。不同实现可使用不同的工艺在至少一个下级电介质层1240之上形成焊盘1242。例如,在一些实现中,可使用光刻、蚀刻和/或镀敷工艺在至少一个下级电介质层1240之上提供焊盘1242。
阶段4解说了在至少一个下级电介质层1240上形成钝化层(例如,钝化层1206)之后的状态。不同的实现可将不同的材料用于钝化层。如阶段4中所示,在至少一个下级电介质层1240上提供钝化层1206,以使得焊盘1242的至少一部分被暴露。在一些实现中,可形成一个以上钝化层,如图3和5中提到的。在一些实现中,阶段4解说了在提供或制造管芯(例如,裸管芯)之后的状态。
图12B的阶段5解说了在钝化层1206和焊盘1242上提供第一绝缘层(例如,第一绝缘层1260)之后的状态。不同的实现可将不同的材料用于第一绝缘层1260。例如,第一绝缘层1260可以是聚酰亚胺层(PI)、聚苯并恶唑(PBO)和/或其他聚合物层。
阶段6解说了在第一绝缘层1260中提供、创建和/或形成腔(例如,腔1209)之后的状态。如阶段6中进一步所示,在焊盘1242之上形成腔1209。不同的实现可以不同方式来形成腔1209。例如,可通过蚀刻第一绝缘层1260来形成腔1209。
阶段7解说了在形成第一重分布金属层(例如,第一重分布金属层1262)之后的状态。具体而言,在焊盘1242和第一绝缘层1260之上形成第一重分布金属层1262。如阶段7中所示,第一重分布金属层1262耦合到焊盘1242。在一些实现中,第一重分布金属层1262是铜层。可使用一个或多个镀敷工艺来形成第一重分布金属层1262。
图12C的阶段8解说了在第一绝缘层1260和第一重分布金属层1262上提供(例如,形成)第二绝缘层(例如,第二绝缘层1264)之后的状态。不同的实现可将不同的材料用于第二绝缘层1264。例如,第二绝缘层1264可以是聚酰亚胺层(PI)、聚苯并恶唑(PBO)和/或其他聚合物层。第一绝缘层1260、第一重分布金属层1262、以及第二绝缘层1264可以是封装的重分布部分1270的一部分。
阶段9解说了在第二绝缘层1264中提供、创建和/或形成腔(例如,腔1213)之后的状态。不同的实现可以不同方式来形成腔1213。例如,可通过蚀刻第二绝缘层1264来形成腔1213。
阶段10解说了在腔1213中形成焊料互连(例如,焊料互连1280)之后的状态。可在腔1213中和第一重分布金属层1262的被暴露部分上形成焊料互连1280。可使用丝网印刷工艺在第一重分布金属层1262之上在腔1213中形成焊料互连1280。然而,不同的实现可以不同方式提供焊料互连。
图12D的阶段11解说了在将至少一个高纵横比(HAR)互连(例如,互连1208)耦合到第一重分布金属层1262之后的状态。可使用回流工艺将互连1208通过焊料互连1280耦合到封装。互连1208可以是包括大约至少1:2的高纵横比的预先形成或预先制造的互连。互连的纵横比可被定义为宽度(例如,直径)与高度比。在至少图7和9中解说并描述了可在阶段11中使用的互连的示例,诸如高纵横比互连700和900。如阶段11中所示,焊料互连1280帮助提供互连1208与第一重分布金属层1262之间的耦合。在一些实现中,阶段11解说了封装1250(例如,晶片级封装),该封装1250包括基板1202、内部部分1204、重分布部分1207、以及至少一个高纵横比互连1208。基板1202和内部部分1204可形成封装1250的管芯1205(例如,裸管芯)。在一些实现中,若干高纵横比(HAR)互连耦合到封装1250(例如,晶片级封装)。
还要注意,可在晶片上制造(例如,并发地制造)若干封装,其中每个封装包括若干高纵横比(HAR)互连。晶片随后被切单成具有高纵横比(HAR)互连的个体封装。这些被切单的封装随后可耦合到印刷电路板(PCB)。
用于制造包括高纵横比互连的封装的方法的示例性流程图
在一些实现中,提供包括至少一个高纵横比互连的封装包括若干工艺。图13解说了用于提供或制造包括至少一个高纵横比互连的封装(例如,晶片级封装)的方法1300的示例性流程图。在一些实现中,图13的方法1300可被用于提供或制造图3、5的封装和/或本公开中所描述的其他封装。
应当注意,图13的序列可组合一个或多个工艺,以便简化和/或阐明用于提供或制造包括至少一个高纵横比互连的封装的方法。在一些实现中,可变化或修改这些工艺的顺序。
该方法(在1305处)提供基板。不同的实现可将不同的材料用于基板(例如,硅基板、玻璃基板、陶瓷基板)。基板可以是基板302或基板1202。基板可以是晶片。
该方法(在1310处)在基板上形成若干下级金属层和至少一个下级电介质层。不同实现可形成不同数目的下级金属层和下级电介质层(例如,M1金属层、M2金属层、M3金属层、M4金属层、M5金属层、M6金属层、M7金属层)。至少一个电介质层可以是至少一个电介质层340或至少一个下级电介质层1240。下级金属层可定义至少一个下级互连(例如,管芯互连)。这些下级互连可包括迹线、通孔和/或焊盘。下级金属层和至少一个下级电介质层可以是管芯的内部部分的一部分,如图3中提到的。可使用不同的工艺来形成下级金属层。
该方法(在1315处)在下级金属层和至少一个电介质层上形成至少一个焊盘。在一些实现中,焊盘被形成为使得该焊盘耦合到下级金属层中的一者。在一些实现中,焊盘是顶部金属层。在一些实现中,焊盘是铝焊盘。然而,不同的实现可将不同的材料用于焊盘。不同实现可使用不同工艺来形成焊盘。焊盘可以是焊盘342或焊盘1242。
该方法(在1320处)在下级金属层和至少一个电介质层上形成至少一个钝化层。不同的实现可将不同的材料用于钝化层。钝化层可以是第一钝化层344、第二钝化层346或钝化层1206。在一些实现中,形成下级金属层、至少一个电介质层、至少一个焊盘、和/或至少钝化层形成、定义了管芯的内部部分(例如,内部部分304)。在一些实现中,提供基板、形成金属层和电介质层、形成焊盘、以及形成钝化层提供并形成管芯(例如,裸管芯)。
该方法(在1325处)形成封装的重分布部分。在一些实现中,(在1325处)形成重分布部分包括:形成至少一个绝缘层和至少一个重分布金属层。图12B-12C的阶段5-9解说了形成重分布部分的示例,包括形成至少一个绝缘层和至少一个重分布金属层。重分布部分可以是重分布部分306、重分布部分506或重分布部分1270。
该方法(在1330处)在重分布部分的重分布金属层上提供焊料互连。在一些实现中,可在绝缘层的腔中和重分布金属层的被暴露部分上形成焊料互连。可使用丝网印刷工艺在重分布金属层上形成焊料互连。不同的实现可以不同方式形成焊料互连。焊料互连可以是焊料互连380或焊料互连1280。
该方法(在1335处)将至少一个高纵横比互连耦合到重分布金属层。高纵横比互连可以是具有大约至少1:2的高纵横比的预先形成或预先制造的互连。互连的纵横比可被定义为宽度(例如,直径)与高度比。在至少图7和9中解说并描述了可使用的互连的示例,诸如高纵横比互连700和900。
还要注意,图12的序列被可用于在晶片上制造(例如,并发地制造)若干管芯和封装,其中每个封装包括若干高纵横比(HAR)互连。晶片随后被切单(例如,切割)成具有高纵横比(HAR)互连的个体封装。这些被切单的封装随后可耦合到印刷电路板(PCB)。
包括高纵横比(HAR)互连的示例性封装
图14解说了包括多个高纵横比互连的封装1400的高级剖面图。封装1400可以是晶片级封装(WLP)。
封装1400(例如,器件封装)包括管芯1405(例如,裸管芯)、重分布部分1406、以及多个高纵横比(HAR)互连1408。管芯1405可包括如图3和5中所描述的基板302和内部部分304。管芯1405可类似于管芯305。
重分布部分1406耦合到管芯1405。重分布部分1406可类似于如图3和5中所描述的重分布部分306或重分布部分506。多个高纵横比(HAR)互连1408通过多个焊料互连1410耦合到重分布部分1406。多个高纵横比(HAR)互连1408可类似于本公开中所描述的任何高纵横比(HAR)互连,诸如举例而言,高纵横比(HAR)互连308、高纵横比(HAR)互连700和高纵横比(HAR)互连900。
图15解说了包括多个高纵横比互连的封装1500的高级剖面图。封装1500可以是晶片级封装(WLP)。封装1500类似于图14的封装1400,不同之处在于封装1500包括包封层1507。包封层1507可至少部分地包封管芯1405。包封层1507至少部分地耦合到重分布部分1406。
图16解说了包括多个高纵横比互连的封装1600的高级剖面图。封装1600可以是芯片规模封装(CSP)。封装1600包括封装基板1602、管芯1604(例如,裸管芯)、多个焊球1606、包封层1607、多个高纵横比互连1608以及多个焊料互连1610。
管芯1604可以是裸管芯。管芯1604通过多个焊球1606耦合到封装基板1602。包封层1607至少部分地包封管芯1604。多个高纵横比互连1608通过多个焊料互连1610耦合到封装基板1602。在一些实现中,多个高纵横比互连1608以类似于高纵横比互连308如何耦合到重分布部分(例如,重分布部分306、重分布部分506)的方式,通过多个焊料互连1610耦合到封装基板1602。封装基板1602包括至少一个电介质层1650和多个互连1660。在一些实现中,封装基板1602具有大约150微米(μm)的厚度。
本公开描述了各种管芯和裸管芯。要注意,不同的实现可使用管芯或裸管芯的不同变型和设计。
用于制造包括管芯和高纵横比互连的封装的示例性序列
在一些实现中,提供包括管芯和至少一个高纵横比互连的封装包括若干工艺。图17解说了用于提供或制造包括管芯、封装基板、以及至少一个高纵横比互连的封装的示例性序列。在一些实现中,图17的序列可被用于提供或制造图16的封装和/或本公开中所描述的其他封装。
应当注意,图17的序列可组合一个或多个阶段,以便简化和/或阐明用于提供或制造包括至少一个高纵横比互连的封装的序列。在一些实现中,可变化或修改这些工艺的顺序。
图17的阶段1解说了在提供封装基板1602之后的状态。封装基板1602包括至少一个电介质层1650和若干互连1660(例如,迹线、通孔、焊盘)。
阶段2解说了在将管芯1604通过多个焊球1606耦合到封装基板1602之后的状态。管芯1604在封装基板1602的第一侧(例如,管芯侧)上耦合到该封装基板1602。在一些实现中,管芯1604可以不同方式耦合到封装基板1602。管芯1604可以是裸管芯。
阶段3解说了在管芯1604和封装基板1602之上形成包封层1607之后的状态。包封层1607可至少部分地包封管芯1604。包封层1607可包括模塑和/或树脂填料。
阶段4解说了在将若干高纵横比互连1608耦合到封装基板1602之后的状态。高纵横比互连1608可以是本公开中所描述的任何高纵横比互连。在一些实现中,执行回流工艺以使得焊料互连1610湿涂高纵横比互连1608和封装基板1602的互连(例如,焊盘)。可在将高纵横比互连1608耦合到封装基板1602之前在封装基板1602的互连(例如,焊盘)上形成焊料互连1610。高纵横比互连1608在封装基板1602的第二侧(例如,印刷电路板(PCB)侧)上耦合到封装基板1602。封装基板1602的第二侧可与封装基板的第一侧相对。阶段4解说了封装1600(例如,芯片规模封装),该封装1600包括封装基板1602、管芯1604、多个焊球1606、包封层1607、高纵横比互连1608、以及焊料互连1610。在一些实现中,封装1600是芯片规模封装(CSP)。
阶段5解说了在将封装1600通过若干高纵横比互连1608耦合到印刷电路板(PCB)1700之后的状态。具体而言,封装1600的封装基板1602通过若干高纵横比互连1608耦合到印刷电路板(PCB)1700。高纵横比互连1608通过焊料互连1610耦合到封装1600。例如,高纵横比互连1608可通过焊料互连1610耦合到封装基板1602的焊盘。高纵横比互连1608耦合到印刷电路板(PCB)1700的互连1738(例如,焊盘)和焊料互连1718。焊料可如何湿涂至高纵横比互连1608和焊盘的示例在图11中描述。高纵横比互连1608被配置成提供封装1600与印刷电路板(PCB)1700之间的高密度连接。在一些实现中,两个毗邻高纵横比互连之间的间距可以是大约300微米(μm)或更小。在一些实现中,两个毗邻高纵横比互连之间的间距可以是大约100微米(μm)或更大。在一些实现中,高纵横比互连1608可具有大约15微米(μm)或更大的宽度或直径。在一些实现中,高纵横比(HAR)互连1608可具有大约75微米(μm)或更小的高度。
示例性电子设备
图18解说了可集成有前述集成器件、半导体器件、集成电路(IC)封装、管芯、中介体、封装、晶片级封装、或层叠封装(PoP)中的任何一者的各种电子设备。例如,移动电话设备1802、膝上型计算机设备1804、以及固定位置终端设备1806可包括如本文所描述的集成器件1800。集成器件1800可以是例如本文所描述的集成电路、管芯、集成器件、集成器件封装、集成电路器件、层叠封装器件中的任何一种。图18中所解说的设备1802、1804、1806仅是示例性的。其它电子设备也能以集成器件1800为其特征,此类电子设备包括但不限于包含以下各项的设备(例如,电子设备)群组:移动设备、手持式个人通信系统(PCS)单元、便携式数据单元(诸如个人数字助理)、启用全球定位系统(GPS)的设备、导航设备、机顶盒、音乐播放器、视频播放器、娱乐单元、固定位置数据单元(诸如仪表读数装备)、通信设备、智能电话、平板计算机、计算机、可穿戴设备、服务器、路由器、实现在机动车辆(例如,自主车辆)中的电子设备、或者存储或检索数据或计算机指令的任何其它设备,或者其任何组合。
图3、4、5、6、7、8、9、10、11、12A-12C、13、14、15、16、17和/或18中所解说的组件、特征和/或功能中的一者或多者可以被重新编排和/或组合成单个组件、特征或功能,或实施在若干组件、或功能中。也可添加附加的元件、组件、和/或功能而不会脱离本公开。还应当注意,本公开中的图3、4、5、6、7、8、9、10、11、12A-12C、13、14、15、16、17和/或18及其对应描述不限于管芯和/或IC。在一些实现中,图3、4、5、6、7、8、9、10、11、12A-12C、13、14、15、16、17和/或18及其相应描述可被用于制造、创建、提供、和/或生产集成设备。在一些实现中,设备可包括管芯、管芯封装、集成电路(IC)、集成电路(IC)封装、器件封装、晶片、半导体器件、层叠封装结构、晶片级封装、和/或中介体。
措辞“示例性”在本文中用于表示“用作示例、实例或解说”。本文中描述为“示例性”的任何实现或方面不必被解释为优于或胜过本公开的其他方面。同样,术语“方面”不要求本公开的所有方面都包括所讨论的特征、优点或操作模式。术语“耦合”在本文中用于指代两个对象之间的直接或间接耦合。例如,如果对象A物理地接触对象B,且对象B接触对象C,则对象A和C可仍被认为是彼此耦合的——即便它们并非彼此直接物理接触。
还应注意,各种公开可能是作为被描绘为流程图、流图、结构图、或框图的过程来描述的。尽管流程图可能会把诸操作描述为顺序过程,但是这些操作中的许多操作能够并行或并发地执行。另外,这些操作的次序可被重新安排。过程在其操作完成时终止。
本文中所描述的本公开的各种特征可实现于不同系统中而不会脱离本公开。应注意,本公开的以上各方面仅是示例,且不应被解释成限定本公开。对本公开的各方面的描述旨在是解说性的,而非限定所附权利要求的范围。由此,本发明的教导可以现成地应用于其他类型的装置,并且许多替换、修改和变形对于本领域技术人员将是显而易见的。
Claims (30)
1.一种封装,包括:
管芯;
耦合到所述管芯的重分布部分;
耦合到所述封装的所述重分布部分的第一高纵横比(HAR)互连,其中,所述第一高纵横比(HAR)互连包括大约至少1:2的宽度与高度比;以及
耦合到所述第一高纵横比(HAR)互连和所述重分布部分的第一焊料互连。
2.如权利要求1所述的封装,其特征在于,所述第一高纵横比(HAR)互连是复合互连,所述复合互连包括:
第一传导核心;以及
第一传导层,所述第一传导层至少部分地包封所述第一传导核心。
3.如权利要求2所述的封装,其特征在于,所述第一传导层是扩散阻挡。
4.如权利要求2所述的封装,其特征在于,所述复合互连进一步包括第二传导层,所述第二传导层至少部分地包封所述第一传导层。
5.如权利要求2所述的封装,其特征在于,所述第一传导核心包括第一表面、第二表面和第三表面,其中,所述第一传导层至少部分地包封所述第一传导核心的所述第一表面、所述第二表面和所述第三表面。
6.如权利要求1所述的封装,其特征在于,所述重分布部分包括:
绝缘层;以及
重分布金属层,所述重分布金属层沿所述第一高纵横比(HAR)互连的横向横截平面围绕所述第一高纵横比(HAR)互连,其中,所述第一高纵横比(HAR)互连物理地接触所述重分布金属层。
7.如权利要求1所述的封装,其特征在于,所述重分布部分包括:
绝缘层;以及
至少部分地围绕所述第一高纵横比(HAR)互连的重分布金属层,其中,所述第一高纵横比(HAR)互连物理地接触所述绝缘层。
8.如权利要求1所述的封装,其特征在于,进一步包括第二高纵横比(HAR)互连,其中,所述第一高纵横比(HAR)互连与所述第二高纵横比(HAR)互连之间的间距是大约300微米(μm)或更小。
9.如权利要求1所述的封装,其特征在于,所述封装是晶片级封装(WLP)。
10.如权利要求1所述的封装,其特征在于,所述封装被纳入选自包括以下各项的组的设备中:音乐播放器、视频播放器、娱乐单元、导航设备、通信设备、移动设备、移动电话、智能电话、个人数字助理、固定位置终端、平板计算机、计算机、可穿戴设备、膝上型计算机、服务器、以及机动车辆中的设备,并且进一步包括所述设备。
11.一种器件,包括:
印刷电路板(PCB);
耦合到所述印刷电路板(PCB)的封装,所述封装包括:
管芯;
耦合到所述管芯的重分布部分;
耦合到所述封装的所述重分布部分和所述印刷电路板(PCB)的第一高纵横比(HAR)互连,其中,所述第一高纵横比(HAR)互连包括大约至少1:2的宽度与高度比;以及
耦合到所述第一高纵横比(HAR)互连和所述重分布部分的第一焊料互连;以及
耦合到所述第一高纵横比(HAR)互连和所述印刷电路板(PCB)的第二焊料互连。
12.如权利要求11所述的器件,其特征在于,所述第二焊料互连湿涂所述第一高纵横比(HAR)互连的高度的大约至少25%。
13.如权利要求11所述的器件,其特征在于,所述第一高纵横比(HAR)互连是复合互连,所述复合互连包括:
第一传导核心;以及
第一传导层,所述第一传导层至少部分地包封所述第一传导核心。
14.如权利要求13所述的器件,其特征在于,所述第一传导层是扩散阻挡。
15.如权利要求11所述的器件,其特征在于,所述封装进一步包括第二高纵横比(HAR)互连,其中,所述第一高纵横比(HAR)互连与所述第二高纵横比(HAR)互连之间的间距是大约300微米(μm)或更小。
16.如权利要求11所述的器件,其特征在于,所述器件被纳入选自包括以下各项的组的设备中:音乐播放器、视频播放器、娱乐单元、导航设备、通信设备、移动设备、移动电话、智能电话、个人数字助理、固定位置终端、平板计算机、计算机、可穿戴设备、膝上型计算机、服务器、以及机动车中的设备,并且进一步包括所述设备。
17.一种用于制造封装的方法,包括:
提供管芯;
在所述管芯之上形成重分布部分;
在所述重分布部分之上形成第一焊料互连;以及
使用所述第一焊料互连将第一高纵横比(HAR)互连耦合到所述封装的所述重分布部分,其中,所述第一高纵横比(HAR)互连包括大约至少1:2的宽度与高度比。
18.如权利要求17所述的方法,其特征在于,耦合所述第一高纵横比(HAR)互连包括:形成复合互连并将所述复合互连耦合到所述封装的所述重分布部分,其中形成所述复合互连包括:
形成第一传导核心;以及
形成第一传导层,所述第一传导层至少部分地包封所述第一传导核心。
19.如权利要求18所述的方法,其特征在于,所述第一传导层是扩散阻挡。
20.如权利要求17所述的方法,其特征在于,进一步包括:
在所述重分布部分之上形成第二焊料互连;以及
使用所述第二焊料互连将第二高纵横比(HAR)互连耦合到所述封装的所述重分布部分,其中,所述第一高纵横比(HAR)互连与所述第二高纵横比(HAR)互连之间的间距是大约300微米(μm)或更小。
21.一种封装,包括:
管芯;
耦合到所述管芯的多个焊球;
通过所述多个焊球耦合到所述管芯的封装基板;
耦合到所述封装基板的第一高纵横比(HAR)互连,其中,所述第一高纵横比(HAR)互连包括大约至少1:2的宽度与高度比;以及
耦合到所述第一高纵横比(HAR)互连和所述封装基板的第一焊料互连。
22.如权利要求21所述的封装,其特征在于,所述第一高纵横比(HAR)互连是复合互连,所述复合互连包括:
第一传导核心;以及
第一传导层,所述第一传导层至少部分地包封所述第一传导核心。
23.如权利要求22所述的封装,其特征在于,所述第一传导层是扩散阻挡。
24.如权利要求22所述的封装,其特征在于,所述复合互连进一步包括第二传导层,所述第二传导层至少部分地包封所述第一传导层。
25.如权利要求22所述的封装,其特征在于,所述第一传导核心包括第一表面、第二表面和第三表面,其中,所述第一传导层至少部分地包封所述第一传导核心的所述第一表面、所述第二表面和所述第三表面。
26.如权利要求21所述的封装,其特征在于,所述封装通过所述第一高纵横比(HAR)互连耦合到印刷电路板(PCB)。
27.如权利要求21所述的封装,其特征在于,进一步包括第二高纵横比(HAR)互连,其中,所述第一高纵横比(HAR)互连与所述第二高纵横比(HAR)互连之间的间距是大约300微米(μm)或更小。
28.如权利要求21所述的封装,其特征在于,所述封装是芯片规模封装(CSP)。
29.如权利要求21所述的封装,其特征在于,进一步包括包封层,所述包封层至少部分地包封所述管芯。
30.如权利要求21所述的封装,其特征在于,所述封装被纳入选自包括以下各项的组的设备中:音乐播放器、视频播放器、娱乐单元、导航设备、通信设备、移动设备、移动电话、智能电话、个人数字助理、固定位置终端、平板计算机、计算机、可穿戴设备、膝上型计算机、服务器、以及机动车辆中的设备,并且进一步包括所述设备。
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US201562164960P | 2015-05-21 | 2015-05-21 | |
US62/164,960 | 2015-05-21 | ||
US14/836,501 | 2015-08-26 | ||
US14/836,501 US20160343646A1 (en) | 2015-05-21 | 2015-08-26 | High aspect ratio interconnect for wafer level package (wlp) and integrated circuit (ic) package |
PCT/US2016/033643 WO2016187593A1 (en) | 2015-05-21 | 2016-05-20 | An integrated circuit package with a high aspect ratio interconnect soldered to a redistribution layer of a die or of a substrate and corresponding manufacturing method |
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CN107690699A true CN107690699A (zh) | 2018-02-13 |
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US (1) | US20160343646A1 (zh) |
CN (1) | CN107690699A (zh) |
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