CN103295986B - 形成用于堆叠封装件的连接件的机构 - Google Patents

形成用于堆叠封装件的连接件的机构 Download PDF

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Publication number
CN103295986B
CN103295986B CN201210189750.9A CN201210189750A CN103295986B CN 103295986 B CN103295986 B CN 103295986B CN 201210189750 A CN201210189750 A CN 201210189750A CN 103295986 B CN103295986 B CN 103295986B
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conducting element
semiconductor
moulding compound
semiconductor device
metal pad
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CN103295986A (zh
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陈玉芬
林俊宏
普翰屏
郑明达
吴凯强
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

本发明提供了形成用于堆叠封装件的连接件的机构。形成用于堆叠封装件的连接件的机构的所述实施例能够实现具有更细间距的更小连接件，该连接件实现了更小的封装件尺寸以及额外的连接。一个封装件上的导电元件部分地嵌入在该封装件的模塑料中从而与另一个封装件上的接触件或金属焊盘相接合。通过嵌入导电元件，可以将导电元件制造得更小并且在导电元件和模塑料之间不具有间隙。可以通过向连接件的最大宽度加入间隔边距来确定连接件的间距。其他封装件上的各种类型的接触件可以与导电元件相接合。

Description

形成用于堆叠封装件的连接件的机构
相关申请的交叉参考
本发明涉及以下于2011年9月8日提交的名称为“Packaging Methods andStructures Using a Die Attach Film(使用管芯接合膜的封装方法及结构)”的共同待决和普通转让的专利申请序列号第13/228,244号，将其全部内容结合到本文中。
技术领域
本发明涉及半导体器件封装，具体而言，涉及形成用于堆叠封装件的连接件的机构。
背景技术
半导体器件用于各种电子应用，举例来说，诸如个人电脑、手机、数码相机以及其他电子设备。通常通过在半导体衬底上方相继沉积绝缘层或介电层、导电层以及半导体层的材料，并且使用光刻来图案化各种材料层从而在其上形成电路部件和元件来制造半导体器件。
半导体工业通过不断减小最小部件尺寸来不断提高各种电子元件(例如，晶体管、二极管、电阻器、电容器等)的集成密度，这允许在给定的面积中集成更多的元件。在一些应用中，这些更小的电子元件同样需要比过去的封装件利用更少面积和/或更低高度的更小的封装件。
因此，新的封装技术(诸如，堆叠封装件(PoP))开始得到发展，其中，带有器件管芯的顶部封装件与带有另一个器件管芯的底部封装件相接合。通过采用新的封装技术，可以提高封装件的集成水平。这些用于半导体的相对新型的封装技术面临着制造挑战。
发明内容
为了解决上述技术问题，一方面，本发明提供了一种封装的半导体器件，包括：半导体管芯，嵌入模塑料中；导电元件，嵌入所述模塑料中，其中，所述导电元件暴露在所述模塑料的表面上；以及金属焊盘，其中，所述金属焊盘接触所述导电元件并且与所述半导体管芯中的器件电连接。
在所述的封装的半导体器件中，所述导电元件由焊料、焊料合金、金或金合金制成。
在所述的封装的半导体器件中，所述导电元件被配置成与另一个封装的半导体器件的接触件相接合。
所述的封装的半导体器件进一步包括：另一个金属焊盘，其中，所述另一个金属焊盘被配置成与衬底的接触件相接合。
在所述的封装的半导体器件中，所述导电元件具有与所述模塑料的表面齐平的平坦表面。
在所述的封装的半导体器件中，所述导电元件具有弯曲的表面。
在所述的封装的半导体器件中，所述导电元件的最大宽度在约100μm至约300μm的范围内。
所述的封装的半导体器件进一步包括：另一个导电元件，与所述导电元件相邻，其中，这两个导电元件的间距在约100μm至约500μm的范围内。
另一方面，本发明提供了一种半导体器件封装件，包括：第一半导体管芯封装件，带有嵌入模塑料中的导电元件，其中，所述导电元件暴露在所述模塑料的表面上，其中，所述模塑料覆盖至少第一半导体管芯；以及第二半导体管芯封装件，带有位于表面上的导电接触件，其中，所述第一半导体管芯封装件的所述导电元件与所述第二半导体管芯封装件的所述导电接触件接合以形成连接件。
在所述的半导体器件封装件中，在所述导电元件和所述模塑料之间不具有间隙。
所述的半导体器件封装件进一步包括：金属焊盘，嵌入所述第一半导体管芯封装件中，其中，所述导电元件接触所述金属焊盘，其中，所述金属焊盘与所述第一半导体管芯封装件中的第一半导体管芯中的器件电连接。
所述的半导体器件封装件进一步包括：金属焊盘，嵌入所述第一半导体管芯封装件中，其中，所述导电元件接触所述金属焊盘，其中，所述金属焊盘与所述第一半导体管芯封装件中的第一半导体管芯中的器件电连接，其中所述的半导体器件封装件进一步包括：另一个金属焊盘，其中，所述另一个金属焊盘被配置成与衬底的接触件相接合。
在所述的半导体器件封装件中，所述半导体器件封装件包括与所述连接件类似的另一个连接件，并且其中，这两个连接件的间距在约100μm至约500μm的范围内。
在所述的半导体器件封装件中，所述第一半导体管芯封装件和所述第二半导体管芯封装件之间的距离在约100μm至约300μm的范围内。
所述的半导体器件封装件进一步包括：金属焊盘，嵌入所述第一半导体管芯封装件中，其中，所述导电元件接触所述金属焊盘，其中，所述金属焊盘与所述第一半导体管芯封装件中的第一半导体管芯中的器件电连接，其中，所述金属焊盘包括凸块下金属化(UBM)层，并且其中，所述导电元件接触所述UBM层。
在所述的半导体器件封装件中，所述第二半导体管芯封装件的所述导电接触件包括焊球或铜柱。
在所述的半导体器件封装件中，所述第二半导体管芯封装件的所述导电接触件包括多于一个铜柱。
又一方面，本发明提供了一种形成半导体器件封装件的方法，包括：制备带有嵌入模塑料中的导电元件的第一半导体管芯封装件，其中，在所述模塑料的表面上暴露出所述导电元件；提供第一半导体管芯封装件；提供第二半导体管芯封装件；以及将所述第一半导体管芯封装件的所述导电元件接合至所述第二半导体管芯封装件上的接触件。
在所述的方法中，制备所述第一半导体管芯封装件包括：在第一半导体管芯上的金属焊盘上方放置导电元件，其中，将金属焊盘连接至所述第一半导体管芯上的器件；以及平坦化嵌入的导电元件和所述模塑料以暴露出嵌入的所述导电元件。
所述的方法进一步包括：提供衬底；以及将与所述模塑料的所述表面相对的表面上的导电接触件接合至所述衬底上的电终端。
附图说明
为了更全面地理解本发明及其优点，现将结合附图所进行的以下描述作为参考，其中：
图1A示出了根据一些实施例的封装件的透视图。
图1B示出了根据一些实施例沿着线P-P截取的图1A的封装件的一部分的截面图。
图1C示出了根据一些实施例的图1B的部分150的放大截面图。
图1D示出了根据一些实施例的通过使用激光钻孔形成带有导电物体的连接件而形成的开口。
图2A示出了根据一些实施例的带有嵌入模塑料内部的导电元件的管芯封装件。
图2B示出了根据一些实施例部分地去除模塑料以暴露出导电元件。
图2C示出了根据一些实施例的带有嵌入模塑料中的导电元件的管芯封装件。
图3A-图3F示出了根据一些实施例基于形成连接件的三种工艺顺序加工的封装件的截面图。
图4A示出了根据一些实施例的位于金属焊盘上方的焊球。
图4B示出了根据一些实施例的最大焊球高度和直径作为凸块下金属化(UBM)层的尺寸的函数的图表。
图5示出了根据一些实施例的回流过的连接件的高度作为预回流焊球的暴露宽度的函数的图表。
图6A和图6B示出了根据一些实施例的用于对其连接件进行应力模拟的两个示例性封装件。
图7A-图7C示出了封装件上的接触件的多个示例性实施例。
除非另有说明，在不同附图中相应的标号和符号通常是指相应的部分。绘制附图用于清楚地示出实施例的相关方面并且不必按比例进行绘制。
具体实施方式
在下面详细论述本发明各实施例的制造和使用。然而，应该理解，本发明提供了许多可以在各种具体环境中实现的可应用的发明构思。所论述的具体实施例仅是制造和使用本发明的示例性具体方式，而不用于限制本发明的范围。
图1A示出了根据一些实施例的封装件100的透视图，该封装件100具有封装件110，封装件110与另一个封装件120相接合，而另一个封装件120进一步与衬底130相接合。每个封装件(诸如，封装件110或封装件120)均包括至少一个半导体管芯(未示出)。半导体管芯包括如应用于半导体集成电路制造的衬底，并且集成电路可以形成在其中和/或其上。半导体衬底被定义为是指包含半导体材料的任何结构，包括但不限于：体硅、半导体晶圆、绝缘体上硅(SOI)衬底或硅锗衬底。也可以使用包括III族、IV族和V族元素的其他半导体材料。衬底130可以进一步包括多个隔离部件(未示出)，诸如浅沟槽隔离(STI)部件或硅的局部氧化(LOCOS)部件。隔离部件可以限定并隔离各种微电子元件。可以在衬底130中形成的各种微电子元件的实例包括晶体管(例如，金属氧化物半导体场效应晶体管(MOSFET)、互补金属氧化物半导体(CMOS)晶体管、双极结型晶体管(BJT)、高电压晶体管、高频晶体管、p沟道和/或n沟道场效应晶体管(PFET/NFET)等)；电阻器；二极管；电容器；电感器；熔丝；以及其他适合的元件。实施各种工艺来形成各种微电子元件，包括沉积、蚀刻、注入、光刻、退火以及其他适合的工艺。将微电子元件互连起来以形成集成电路器件，诸如逻辑器件、存储器器件(例如，SRAM)、RF器件、输入/输出(I/O)器件、芯片上系统(SoC)器件、它们的组合以及其他适当类型的器件。
衬底130可以由半导体晶圆或晶圆的一部分制成。在一些实施例中，衬底130包括硅、砷化镓、绝缘体上硅(“SOI”)或其他类似的材料。在一些实施例中，衬底130还包括诸如电阻器、电容器、电感器等无源器件或诸如晶体管的有源器件。在一些实施例中，衬底130包括另外的集成电路。衬底130可以进一步包括衬底通孔(TSV)并且可以是中介层。另外，衬底130可以由其他材料制成。例如，在一些实施例中，衬底130是多层电路板。在一些实施例中，衬底130还包括双马来酰亚胺三嗪(BT)树脂、FR-4(由编织玻璃纤维布和环氧树脂粘合剂组成的耐燃性复合材料)、陶瓷、玻璃、塑料、胶带、薄膜或其他可以承载用于接收导电终端的导电焊盘或接合盘(lands)的支撑材料。
封装件110通过连接件115接合至封装件120，以及封装件120通过连接件125接合至衬底130。图1B示出了根据一些实施例沿着线P-P截取的图1A的封装件的一部分的截面图。图1B示出了靠近封装件100的边缘的连接件115和125。在一些实施例中，靠近封装件120的中心具有连接件125。根据一些实施例，图1B中的区域150用矩形标记，并且区域150的细节在图1C示出。
图1C示出了根据一些实施例的图1B的区域150的细节。封装件110包括半导体管芯区域A，该半导体管芯区域A具有被模塑料111覆盖的半导体管芯(未示出)。根据一些实施例，模塑料111最初是液体形式并且在被分配到半导体管芯上之后进行干燥，从而覆盖至少一部分的半导体管芯。例如，模塑料111最初可以包括环氧树脂、填充剂、溶剂等。在一些实施例中，可以通过传递模塑法来形成模塑料111，其中，在将量好的模塑材料(通常是热固性塑料)涂敷在衬底上之前将其预加热成液体形式。在涂敷模塑料之后对其进行加热以完成模塑工艺。可以使用各种树脂作为模塑料材料。
封装件110还包括再分布区域B，该区域具有互连结构，诸如，在封装件中的半导体管芯与连接件115之间形成连接的一个或多个再分补层(RDL)。类似地，封装件120包括半导体管芯区域A*，该区域具有嵌入模塑料121中的半导体管芯(未示出)。封装件120还包括再分布区域B*，该区域也具有互连结构，诸如，在封装件中的半导体管芯与连接件125之间形成连接的一个或多个再分布层(RDL)。
形成封装件110和120的示例性机构可以在于2011年9月8日提交的名称为“Packaging Methods and Structures Using a Die Attach Film”的美国专利申请序列号第13/228,224号中找到，该专利申请以其全文结合在本申请中。
图1C示出连接件115与封装件110的金属焊盘112以及封装件120的金属焊盘122相接触，以及连接件125与封装件120的金属焊盘123以及衬底130的金属焊盘131相接触。金属焊盘112与封装件110中的半导体管芯(未示出)中的器件电连接。金属焊盘122与封装件120中的半导体管芯(未示出)中的器件电连接。图1C示出部分连接件115嵌入封装件120的模塑料121中。根据一些实施例，通过激光钻孔形成用于嵌入连接件115的开口。图1D示出了根据一些实施例的通过使用激光钻孔去除模塑料121而形成的用于嵌入连接件115的开口114。为了易于在开口中放置导电元件(诸如焊球)，开口114具有顶部较大而底部较小的截面轮廓。在一些实施例中，由于激光钻孔的工艺局限性，开口114的顶部的宽度W在约0.2mm至约0.4mm的范围内。在形成开口114之后，在开口114中放置导电物体116(用虚线示出)，诸如焊球。导电物体116的直径小于开口114的宽度W。如图1D所示，开口的顶部和导电物体116之间的距离是距离“G”。在回流之后，导电物体116与封装件110的金属焊盘112上方的导电材料相接触，从而形成了连接件115。图1C示出连接件115在回流之后与金属焊盘122相接触并且与模塑料121的顶面具有间隙“O”。在一些其他实施例中，导电物体116与在其表面上方不具有另一种导电材料的金属焊盘112直接接触，从而形成了连接件115。
连接件115的间距P受到开口114的宽度W的限制。在一些实施例中，开口中最宽的宽度W在约0.23mm至约0.50mm的范围内。在一些实施例中，间距P在约0.35mm至约0.6mm的范围内。在一些实施例中，高度H被设定成足以保持用于形状因数的整个封装件的高度较低。封装件110和120之间的高度C也受到放置在开口114中的连接件的尺寸的影响。在一些实施例中，高度C在约0.25mm至约0.35mm的范围内。
对于先进的封装，期望减小连接件之间的间距P来实现更小的封装件尺寸和额外的连接。因此，期望用于形成具有更小间距P的连接件115的新机构。图2A示出了根据一些实施例的带有嵌入模塑料121′内部的导电元件117′的管芯封装件120′。在封装件120′的区域B*上形成模塑料121′之前，在金属焊盘122上形成或设置导电元件117′。例如，可以将导电元件117′电镀在金属焊盘122上并且回流成球状。随后，在导电元件117′上方形成模塑料121′。可选地，可以将金属球放置在金属焊盘122上，然后与金属焊盘122相接合以形成导电元件117′。导电元件117′可以由具有低电阻率的任何导电材料制成。例如，它们可以由焊料、焊料合金、金、金合金等制成。焊料合金中包括的示例性元素可以包括Sn、Pb、Ag、Cu、Ni、铋(Bi)或它们的组合。
图2B示出根据一些实施例部分地去除模塑料121′以暴露出导电元件117′。去除工艺160可以是任何适用的工艺，诸如研磨、抛光等。暴露的导电元件117′具有宽度W1。因为导电元件117′在暴露出来之前嵌入模塑料121′中，所以不需要激光钻孔来形成用于导电元件117′的开口。结果，在模塑料121′的顶面和导电元件117′之间没有间隙，而在图1C中所示的情况下具有间隙“O”。另外，导电元件117′的尺寸(或宽度)W1可以小于导电元件116，因为其不再受到由于激光钻孔限制的开口114的尺寸的影响。结果，间距P1可以比图1C中的间距P更小。在一些实施例中，间距P1在约100μm至约500μm的范围内。在一些实施例中，宽度W1在约100μm至约400μm的范围内，其等于或小于上述图1D中的开口的宽度W。
在可选的实施例中，导电元件117″可以部分地嵌入模塑料中，并且在一些实施例中如图2C中所示，可以暴露出一部分导电元件117″。在形成模塑料121″期间可以将模具或薄膜压到模塑料121″和导电元件117″上，从而能够暴露出一部分导电元件117″。暴露的导电元件117″的宽度是W2。由于导电元件117″嵌入模塑料121″中，所以导电元件117″的间距P2也小于上述图1C的间距P。在一些实施例中，间距P2在约100μm至约500μm的范围内。在一些实施例中，宽度W2在约100μm至约400μm的范围内。
图3A示出了根据一些实施例的带有接触件104A的封装件110A以及带有导电元件117A的封装件120A。接触件104A形成在金属焊盘112A上方并且由(一种或多种)导电材料制成。在一些实施例中，接触件104A由焊料制成。在一些实施例中，通过图2A和图2B中所述的工艺形成封装件120A的导电元件117A。根据一些实施例，如图3B所示，接触件104A和导电元件117A通过回流接合在一起，从而形成连接件115A。连接件115A的高度为HA。
图3C示出了根据一些实施例的带有接触件104B的封装件110B以及带有导电元件117B的封装件120B。接触件104B形成在金属焊盘112B上方并且由(一种或多种)导电材料制成。在一些实施例中，接触件104B由焊料制成。在一些实施例中，通过图2C中所述的工艺形成封装件120B的导电元件117B。根据一些实施例，如图3D所示，接触件104B和导电元件117B通过回流接合在一起，从而形成连接件115B。连接件115B的高度为HB。
在一些可选的实施例中，根据一些实施例，如图3E中所示，封装件110C在金属焊盘112C上不具有接触件(诸如，接触件104B)。如图3F所示，导电元件117C直接与金属焊盘112C相接触，从而形成连接件115C。连接件115C的高度为HC。
图4A示出了根据一些实施例在回流之后位于金属焊盘405上方的焊球401。金属焊盘405的宽度为约200μm，并且其包括凸块下金属化(UBM)层402。UBM层402可以包含粘着层和/或润湿层。在一些实施例中，UBM层402还可以充当扩散阻挡层。在一些实施例中，UBM层402由钛(Ti)、氮化钛(TiN)、氮化钽(TaN)、钽(Ta)等制成。在一些实施例中，UBM层402进一步包括铜晶种层。
在一些实施例中，UBM层402的厚度在约0.05μm至约0.5μm的范围内。通过在UBM层402上方回流直径为约250μm的圆焊球来形成焊球401。如图4A所示，焊料将遍及UBM层402的表面并且表面张力使得焊球401具有为约246μm的直径。焊球401的高度为约216μm。可以通过模拟工具(诸如，SURFACE EVOLVER或ANSYS FLUENT)来模拟UBM层上的回流过的焊球的轮廓。SURFACE EVOLVER是用于研究通过表面张力和其他能量而成形的表面的交互程序，并且受到各种因素的制约。SURFACEEVOLVER是在明尼苏达大学(UNIVERSITY OF MINNESOTA)的几何学中心(THE GEOMETRY CENTER)开发出来的。ANSYS FLUENT是由ANSYS INC.(CANONSBURG，PENNSYLVANIA)所有的模拟工具。这些模拟工具可以用于模拟具有不同宽度和高度的焊球。
图4B示出了根据一些实施例的模拟(回流过)的焊球高度作为直径(即，最大宽度)和UBM尺寸(或宽度)的函数的图表。曲线410示出了当焊球(在回流前)的直径与下面的UBM层的宽度(或尺寸)相同时各种UBM尺寸的球高度。曲线410示出当直径为200μm的焊球经过回流接合至直径为200μm的UBM层(形状为圆形)时，回流过的球高度为152μm。当球在回流前的直径为250μm时，回流后(在250μmUBM层上)的高度为186μm。曲线420示出当直径为200μm的焊球经过回流接合至直径为200μm的UBM层(形状为圆形)时，回流过的球的宽度为218μm。当球在回流前的直径为250μm时，回流后(在250μmUBM层上)的最大宽度为274μm。对于曲线410和420，由于回流前的球尺寸与UBM层的宽度(或尺寸)相关，所以曲线410和420是线性的。
图4B还示出了数据411，该数据是接合至直径为150μm的UBM层的回流前直径为250μm的球在回流后的球高度。数据411表明高度为223μm。图4B还示出了数据412，其是数据412的回流过的焊球的最大宽度。数据412表明最大宽度为256μm。数据411和412表明高度和直径也取决于预回流球的尺寸。
回流后的最大球宽度数据有助于确定防止短路所需的最小间距。可以将边距(margin)加入到最大宽度以达到连接件的最小间距。根据一些实施例，曲线450示出了间距的示例性曲线。将边距(M)加入到最大连接件宽度，并且总宽度为最小间距。边距M可以随着球尺寸(预回流)而改变。在一些实施例中，边距M是回流焊球的最大宽度的百分数。在一些实施例中，边距M在约5％至约70％最大宽度的范围内。在一些其他实施例中，边距M在约5％至约30％最大宽度的范围内。
图5示出了根据一些实施例的回流过的连接件115B的模拟高度HB作为预回流焊球的暴露宽度(或直径)W2(如图2C所示)的函数的图表。图5中的实心三角形的数据是由封装件120B和封装件110B所形成的连接件的数据。实心三角形的数据在曲线510上。得到曲线510数据的嵌入在封装件120B中的焊球具有250μm的直径，而UBM层也具有250μm的直径。得到曲线510数据的封装件110B的焊球具有200μm的直径，而UBM层的直径为250μm。该数据表明高度HB随着嵌入的焊球的暴露宽度W2的增大而减小。
曲线520包括用于表示在直径为200μm的UBM层上的直径为250μm的嵌入的焊球的空心三角形的数据，其中UBM层的直径200μm小于曲线510中的250μm。得到曲线520的封装件110B的焊球的焊球直径也是200μm。曲线520几乎与曲线510重叠，这表明当差值为50μm时不同的UBM宽度的影响最小。
图5还示出了当封装件110C在每个金属焊盘112C上都不具有焊球时图3F的连接件115C的数据511。得到数据511的封装件120C也具有在直径为200μm的UBM层上的直径为250μm的焊球。在封装件120C上没有焊球的情况下，连接件115C的高度降低了约80μm(与曲线510和520相比)。图5还示出了具有实心正方形的数据的曲线530。得到曲线530数据的封装件120B中的嵌入的焊球具有250μm的直径，并且UBM层也具有200μm的直径。得到曲线530的封装件120B上的预回流焊球小于曲线510和520的封装件120B上的预回流焊球。得到曲线530数据的封装件110B的焊球在直径为250μm的UBM层上具有200μm的直径。曲线530的封装件110B上的焊球与曲线510和520的封装件110B上的焊球类似。由于封装件120B上的焊球尺寸减小，曲线530上的数据低于曲线510和520上的数据。
如上所述，为了实现小形状因数期望具有较低的整体封装件高度。图5示出嵌入的焊球的较大的暴露宽度导致较低的连接高度。因此，为了降低连接件高度，可以增大暴露的嵌入的焊球的宽度。对于上述封装件而言，当暴露宽度等于或大于约100μm时，整体连接高度等于或小于约300μm。
图6A示出了根据一些实施例的具有封装件120A″的封装件100A″，封装件120A″带有嵌入的焊球。封装件100A″与上述封装件100类似，除了封装件120A″具有与图2C、图3C和图3E类似的嵌入在模塑料中的焊球，而不是在图1B中的激光钻孔中放置焊球。图6B示出了根据一些实施例的具有封装件120B″的封装件100B″，封装件120B″带有嵌入的焊球。封装件100B″与封装件100A″类似，除了封装件110B″上的焊球的体积是封装件110A″上的焊球的体积的两倍。因此，图6B的高度HB″大于图6A的高度HA″。应力模拟表明如果将角部连接件125A″处的应力用作参考值(应力比为1)，那么连接件115A″的应力比(或SR)为1.2。相比之下，图6B的角部连接件125B″的应力比为1.17，其高于图6A的角部连接件125A″的应力比1。另外，角部连接件115B″的应力比为0.85，其低于连接件115A″的应力比1.2。
两个结构之间的应力比的不同是由于封装件110B″(2X封装件110A″的焊料体积)的额外的焊料体积以及比HA″更大的高度HB″引起的。在一些实施例中，封装件110A″或110B″上的焊球中的焊料材料的体积被设定成优化生产合格率。例如，如果存在由于角部连接件的高应力导致的焊球在角部连接件(诸如，125B″)上断裂的风险，期望选择图6A中的结构，该结构具有更小的封装件110A″上的焊料体积以及更低的堆叠封装件高度HA″。另一方面，如果角部连接件125B″的焊料断裂不是关注的问题，而连接件115A″的焊料断裂是问题，则应该选择图6B中的结构。因为图6B在连接件115A″上具有较低的应力。通过使用ANSYS应力模拟器来模拟出上述应力结果。
上面图3A-图3D和图6A-图6B中所描述的封装件结构示出了：上封装件110A、110B、110A″和110B″具有接触件104，该接触件104是焊球并且与下封装件120A、120B、120A″和120B″的导电元件117′、117″相接合。然而，接触件104可以由其他导电材料和形状制成。例如，根据一些实施例，如图7A所示，接触件104*可以是铜柱。根据一些实施例，铜柱104*可以形成在UBM层102*上，该UBM层102*覆盖金属焊盘112*。在一些实施例中，铜柱104*的宽度(W*)在约100μm至约250μm的范围内。在一些实施例中，铜柱104*的高度(H*)在约10μm至约200μm的范围内。可选地，根据一些实施例，如图7B所示，接触件104**可以是宽度小于UBM层102*的宽度的铜柱。根据一些实施例，在UBM层102**上可以具有两个或更多个这样较小的铜柱，该UBM层102**覆盖金属焊盘112**。图7C示出了根据一些实施例的铜柱104**的各种俯视图。如图7C所示，可以存在具有各种形状的接触件104的两个或更多个接触件104**。例如，接触件104**可以是圆柱、伸长柱或带有圆角的方柱。图7C中示出的实施例仅是实例。其他结构也是可能的。例如，UBM层102**可以不是圆形的并且可以具有其他形状。
形成堆叠封装件的连接件的机构的所述实施例实现了具有更细间距的更小连接件，其与现有连接件相比实现了更小的封装件尺寸以及额外的连接。在一个封装件上的导电元件部分地嵌入该封装件的模塑料中，从而与另一个封装件上的接触件或金属焊盘相接合。通过嵌入导电元件，导电元件可以制造得更小并且在导电元件和模塑料之间不具有间隙。可以通过向连接件的最大宽度加入间隔边距(space margin)来确定连接件的间距。其他封装件上的各种类型的接触件可以与导电元件相接合。
在一些实施例中，提供了一种封装的半导体器件。该封装的半导体器件包括嵌入模塑料中的半导体管芯，以及嵌入模塑料中的导电元件。导电元件暴露在模塑料的表面上。封装的半导体器件还包括金属焊盘。金属焊盘接触导电元件并且与半导体管芯中的器件电连接。
在一些其他实施例中，提供了一种半导体器件封装件。该半导体器件封装件包括带有嵌入模塑料中的导电元件的第一半导体管芯封装件。导电元件暴露在模塑料的表面上，并且模塑料覆盖至少第一半导体管芯。半导体器件封装件还包括带有位于表面上的导电接触件的第二半导体管芯封装件。第一半导体管芯封装件的导电元件与第二半导体管芯封装件的导电接触件接合以形成连接件。
在又一些其他实施例中，提供了一种形成半导体器件封装件的方法。该方法包括制备带有嵌入模塑料中的导电元件的第一半导体管芯封装件，并且在模塑料的表面上暴露出导电元件。该方法还包括提供第一半导体管芯封装件。该方法进一步包括提供第二半导体管芯封装件，并且将第一半导体管芯封装件的导电元件接合至第二半导体管芯封装件上的接触件。
尽管已经详细地描述了本发明的实施例及其优势，但应该理解，可以在不背离所附权利要求限定的本发明的精神和范围的情况下，在其中进行各种改变、替换和更改。例如，本领域技术人员将很容易理解，本文描述的部件、功能、工艺和材料可以发生改变并且仍在本发明的范围内。而且，本申请的范围并不仅限于说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的特定实施例。作为本领域普通技术人员根据本发明的公开内容将很容易理解，根据本发明可以利用现有的或今后开发的用于执行与本文所述相应实施例基本上相同的功能或者获得基本上相同的结果的工艺、机器、制造、材料组分、装置、方法或步骤。因此，所附权利要求预期在其范围内包括这样的工艺、机器、制造、材料组分、装置、方法或步骤。

Claims (18)

1.一种封装的半导体器件，包括：
半导体管芯，嵌入模塑料中；
导电元件，嵌入所述模塑料中，其中，所述导电元件暴露在所述模塑料的表面上，所述导电元件和所述模塑料的顶面之间不具有间隙；
金属焊盘，其中，所述金属焊盘接触所述导电元件并且与所述半导体管芯中的器件电连接，以及
封装件，包括从所述封装件的表面伸出的至少一个接触件，所述至少一个接触件包括从同一凸块下金属化(UBM)层延伸的多个导电柱，其中，所述导电元件与所述至少一个接触件接合。
2.根据权利要求1所述的封装的半导体器件，其中，所述导电元件由焊料、金或金合金制成。
3.根据权利要求1所述的封装的半导体器件，其中，所述导电元件被配置为通过所述至少一个接触件与所述封装件的金属焊盘接合。
4.根据权利要求1所述的封装的半导体器件，进一步包括：
另一个金属焊盘，其中，所述另一个金属焊盘被配置成与衬底的接触件相接合。
5.根据权利要求1所述的封装的半导体器件，其中，所述导电元件具有与所述模塑料的表面齐平的平坦表面。
6.根据权利要求1所述的封装的半导体器件，其中，所述导电元件具有弯曲的表面。
7.根据权利要求1所述的封装的半导体器件，其中，所述导电元件的最大宽度在100μm至300μm的范围内。
8.根据权利要求1所述的封装的半导体器件，进一步包括：
另一个导电元件，与所述导电元件相邻，其中，这两个导电元件的间距在100μm至500μm的范围内。
9.一种半导体器件封装件，包括：
第一半导体管芯封装件，带有嵌入模塑料中的导电元件，其中，所述导电元件暴露在所述模塑料的表面上，其中，所述模塑料覆盖至少第一半导体管芯，并且在所述导电元件和所述模塑料的顶面之间不具有间隙；以及
第二半导体管芯封装件，带有位于表面上的导电接触件，所述导电接触件包括从第一凸块下金属化(UBM)层延伸的多个导电柱，其中，所述第一半导体管芯封装件的所述导电元件与所述第二半导体管芯封装件的所述导电接触件接合以形成连接件。
10.根据权利要求9所述的半导体器件封装件，进一步包括：
金属焊盘，嵌入所述第一半导体管芯封装件中，其中，所述导电元件接触所述金属焊盘，其中，所述金属焊盘与所述第一半导体管芯封装件中的第一半导体管芯中的器件电连接。
11.根据权利要求10所述的半导体器件封装件，进一步包括：
另一个金属焊盘，其中，所述另一个金属焊盘被配置成与衬底的接触件相接合。
12.根据权利要求9所述的半导体器件封装件，其中，所述半导体器件封装件包括与所述连接件类似的另一个连接件，并且其中，这两个连接件的间距在100μm至500μm的范围内。
13.根据权利要求9所述的半导体器件封装件，其中，所述第一半导体管芯封装件和所述第二半导体管芯封装件之间的距离在100μm至300μm的范围内。
14.根据权利要求10所述的半导体器件封装件，其中，所述金属焊盘包括第二凸块下金属化(UBM)层，并且其中，所述导电元件接触所述第二凸块下金属化(UBM)层。
15.根据权利要求9所述的半导体器件封装件，其中，所述第二半导体管芯封装件的所述导电接触件包括多于一个铜柱。
16.一种形成半导体器件封装件的方法，包括：
制备带有嵌入模塑料中的导电元件的第一半导体管芯封装件，其中，在所述模塑料的表面上暴露出所述导电元件，并且在所述导电元件和所述模塑料的顶面之间不具有间隙；
提供第一半导体管芯封装件；
提供第二半导体管芯封装件；以及
将所述第一半导体管芯封装件的所述导电元件接合至所述第二半导体管芯封装件上的接触件，所述接触件包括从同一凸块下金属化(UBM)层延伸的多个导电柱。
17.根据权利要求16所述的方法，其中，制备所述第一半导体管芯封装件包括：
在第一半导体管芯上的金属焊盘上方放置导电元件，其中，将金属焊盘连接至所述第一半导体管芯上的器件；以及
平坦化嵌入的导电元件和所述模塑料以暴露出嵌入的所述导电元件。
18.根据权利要求16所述的方法，进一步包括：
提供衬底；以及
将与所述模塑料的所述表面相对的表面上的导电接触件接合至所述衬底上的电终端。
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