KR100568006B1 - 플립 칩 패키지의 오목형 솔더 범프 구조 형성 방법 - Google Patents

플립 칩 패키지의 오목형 솔더 범프 구조 형성 방법 Download PDF

Info

Publication number
KR100568006B1
KR100568006B1 KR1020030090682A KR20030090682A KR100568006B1 KR 100568006 B1 KR100568006 B1 KR 100568006B1 KR 1020030090682 A KR1020030090682 A KR 1020030090682A KR 20030090682 A KR20030090682 A KR 20030090682A KR 100568006 B1 KR100568006 B1 KR 100568006B1
Authority
KR
South Korea
Prior art keywords
solder
chip
substrate
photoresist
concave
Prior art date
Application number
KR1020030090682A
Other languages
English (en)
Other versions
KR20050058722A (ko
Inventor
이인영
김구성
정세영
박선영
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Priority to KR1020030090682A priority Critical patent/KR100568006B1/ko
Priority to US10/897,124 priority patent/US20050127508A1/en
Publication of KR20050058722A publication Critical patent/KR20050058722A/ko
Application granted granted Critical
Publication of KR100568006B1 publication Critical patent/KR100568006B1/ko
Priority to US11/785,980 priority patent/US20070205512A1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/0502—Disposition
    • H01L2224/05026—Disposition the internal layer being disposed in a recess of the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05124—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
    • H01L2224/05572—Disposition the external layer being disposed in a recess of the surface the external layer extending out of an opening
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05655—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05671—Chromium [Cr] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13005—Structure
    • H01L2224/13007—Bump connector smaller than the underlying bonding area, e.g. than the under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13113—Bismuth [Bi] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13116—Lead [Pb] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13139—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13155—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/13164—Palladium [Pd] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/13169—Platinum [Pt] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/13599—Material
    • H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/13599—Material
    • H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13601—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13611—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/13599—Material
    • H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13601—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13613—Bismuth [Bi] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/13599—Material
    • H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13601—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13616—Lead [Pb] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/13599—Material
    • H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13639—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/13599—Material
    • H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13644—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/13599—Material
    • H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13647—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/13599—Material
    • H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13655—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/1605—Shape
    • H01L2224/16057—Shape in side view
    • H01L2224/16058—Shape in side view being non uniform along the bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H01L2224/81815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01024—Chromium [Cr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0367—Metallic bump or raised conductor not used as solder bump
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/0465—Shape of solder, e.g. differing from spherical shape, different shapes due to different solder pads
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)

Abstract

본 발명은 플립 칩 패키지의 오목형 솔더 범프 구조 형성 방법에 관한 것으로서, 가운데가 오목한 오목형 솔더 범프 구조는 칩과 기판 사이의 언더필 공정이 가능할 만큼의 범프 높이를 가지면서 솔더 범프의 크기나 솔더 범프간 거리의 영향을 받지 않으므로 미세 피치의 플립 칩 패키지를 구현할 수 있다. 본 발명에 따르면, 반도체 칩의 칩 패드 위에 금속 기둥을 형성하고 금속 기둥의 표면에 솔더를 도금한 후, 솔더가 미리 도포된 기판의 기판 패드 위에 솔더가 도금된 금속 기둥을 위치시키고 솔더를 리플로우하면, 용융 솔더의 표면 장력에 의하여 가운데가 오목한 형태의 오목형 솔더 범프가 형성된다.
플립 칩(flip chip), 솔더 범프(solder bump), 언더필(underfill), 미세 피치(fine pitch), 표면 장력(surface tension)

Description

플립 칩 패키지의 오목형 솔더 범프 구조 형성 방법{Forming Method for Concave Solder Bump Structure of Flip Chip Package}
도 1은 종래 기술에 따른 플립 칩 패키지의 솔더 범프 구조를 나타내는 단면도이다.
도 2는 도 1에 도시된 솔더 범프의 제조 과정을 나타내는 단면도이다.
도 3a와 도 3b는 종래 기술에 따른 솔더 범프 구조의 다른 예를 나타내는 단면도이다.
도 4는 본 발명의 실시예에 따른 플립 칩 패키지의 오목형 솔더 범프 구조를 나타내는 단면도이다.
도 5a 내지 도 5k는 본 발명의 실시예에 따른 오목형 솔더 범프의 제조 방법을 순서대로 나타내는 단면도이다.
<도면에 사용된 주요 참조 번호의 설명>
10: 반도체 칩(semiconductor chip)
12: 칩 패드(chip pad)
14: 불활성층(passivation layer)
16: 하부 범프 금속층(under bump metallurgy; UBM)
20: 기판(substrate)
22: 기판 패드(substrate pad)
24: 보호막(protective layer)
30: 솔더 범프(solder bump)
32: 솔더(solder)
40: 언더필 물질(underfill material)
50: 포토레지스트(photoresist)
52, 54: 개구부(opening)
60: 금속 기둥(metal column)
70: 오목형 솔더 범프(concave solder bump)
72: 솔더(solder)
본 발명은 반도체 패키지 기술에 관한 것으로서, 보다 구체적으로는 플립 칩 패키지의 솔더 범프 구조 형성 방법에 관한 것이다.
집적회로 칩의 동작 속도가 높아지고 입출력 핀 수가 많아짐에 따라, 기존의 와이어 본딩(wire bonding) 기술은 한계에 이르렀다. 따라서, 최근에는 와이어 본딩 방식을 대체할 수 있는 플립 칩(flip chip) 방식이 주목을 받고 있다. 플립 칩 기술은 반도체 칩의 입출력 패드에 형성된 솔더 범프(solder bump)로 특징지어질 수 있다. 솔더 범프의 일반적인 구조가 도 1에 도시되어 있다.
도 1을 참조하면, 반도체 칩(10)의 활성면에는 칩 패드(12)와 불활성층(14)이 형성되고, 칩 패드(12) 위에 솔더 범프(30)가 형성된다. 칩 패드(12)와 솔더 범프(30) 사이에는 하나 이상의 하부 범프 금속층(16, UBM)이 형성된다. 기판(20)에는 기판 패드(22)와 보호막(24)이 형성되고, 기판 패드(22)에는 미리 솔더가 발라져 있다.
솔더 범프(30)는 반도체 칩(10)과 기판(20)을 전기적, 기계적으로 연결시킨다. 즉, 솔더 범프(30)는 전기적 신호의 이동 경로로서의 역할과 기계적 접합부로서의 역할을 한다. 그런데 플립 칩 패키지에서의 솔더 범프(30)는 크기가 작기 때문에 접합 강도를 높이기 위하여 칩(10)과 기판(20) 사이의 공간에는 일반적으로 언더필 물질(40, underfill material)이 개재된다.
언더필 물질(40)은 모세관 작용에 의하여 칩(10)과 기판(20) 사이의 공간으로 흘러 들어와 그 공간을 채우게 된다. 따라서, 언더필 공정이 효과적으로 진행되기 위해서는 솔더 범프(30)가 어느 정도 이상(즉, 언더필이 가능할 정도)의 높이를 가져야 한다. 그런데, 원하는 높이의 솔더 범프(30)를 얻으려면 솔더 범프(30)의 제조 과정에서 버섯 형태로 솔더를 과다 도금하는 것이 불가피하다.
도 2는 솔더 범프의 제조 과정 중의 일부를 나타내고 있다. 도 2를 참조하면, 솔더 범프(도 1의 30)를 제조하기 위해서는 포토레지스트(50, photoresist) 안에 솔더(32)를 도금하고 포토레지스트(50)를 제거한 후, 하부 범프 금속층(16)을 식각하고 솔더(32)를 리플로우(reflow)하는 과정을 거친다. 그런데 원하는 크기의 솔더 범프를 얻기 위해서는 도 2에 도시된 바와 같이 버섯 형태로 솔더(32)를 과다 도금해야 한다. 이때, 인접한 솔더(32)와 솔더(32)가 서로 접촉하면 안되므로 어느 정도의 거리 여유(b)를 두고 공정을 진행해야 한다.
따라서, 종래의 솔더 범프 구조는 그 제조 과정에서 솔더(32)가 버섯 형태로 만들어지기 때문에 솔더의 크기(a)가 커질 뿐만 아니라, 솔더(32)와 솔더(32) 사이에 거리 여유(b)를 두어야 하기 때문에, 결국 솔더 범프의 피치(pitch, 도 2의 d)를 미세하게 구현하기가 매우 어렵다.
하부 범프 금속층의 크기(도 1의 16번의 폭 또는 도 2의 c)를 감소시킬 경우 범프 피치(d) 감소에 어느 정도 효과가 있겠지만 여전히 솔더의 과다 크기(a)와 솔더간 거리 여유(b)의 한계 때문에 미세 피치의 구현은 어려운 실정이다. 솔더 범프의 높이를 낮출 경우 솔더의 크기(a)가 줄어들어 범프 피치(d) 감소가 가능하겠지만, 이 역시 언더필 공정으로 인한 제약 때문에 한계가 있다.
도 3a와 도 3b는 종래 기술에 따른 솔더 범프 구조의 다른 예를 나타내는 단면도이다. 도 3a에 도시된 바와 같이, 포토레지스트(50)의 높이를 증가시키면 솔더(32)의 형태가 버섯 형태로 되지 않으므로 범프 피치(e)를 감소시킬 수 있다. 그러나, 솔더(32)를 리플로우한 후의 범프(30) 형태가 도 3b에 도시된 바와 같이 가운데가 볼록한 구형이 되기 때문에, 인접한 범프(30) 사이의 간격(f)이 좁아지게 된다. 따라서, 볼록한 솔더 범프(30)의 형태 때문에 미세 피치를 구현하기에는 여전히 미흡한 실정이다.
본 발명은 전술한 종래 기술에서의 문제점을 해결하기 위한 것으로, 본 발명 의 목적은 칩과 기판 사이의 접합 강도를 높이기 위한 언더필 공정을 진행할 수 있을 만큼의 범프 높이를 가지면서 미세 피치의 구현이 가능한 플립 칩 패키지의 솔더 범프 구조와 그 제조 방법을 제공하고자 하는 것이다.
이러한 목적을 달성하기 위하여, 본 발명은 가운데가 오목한 오목형 솔더 범프 구조와 그 제조 방법을 제공한다.
본 발명에 따른 오목형 솔더 범프 구조는, 활성면에 형성된 복수개의 칩 패드를 가지는 반도체 칩과, 칩 패드에 대응하여 복수개의 기판 패드를 가지는 기판과, 칩 패드와 기판 패드 사이에 각각 형성되며 가운데가 오목한 형태를 가지는 복수개의 솔더 범프를 포함한다.
본 발명에 따른 오목형 솔더 범프 구조는 각각의 솔더 범프 내부에 수직 방향으로 형성된 금속 기둥을 더 포함하는 것이 바람직하며, 솔더 범프와 칩 패드 사이에 형성된 하부 범프 금속층을 더 포함하는 것이 바람직하다.
본 발명에 따른 오목형 솔더 범프 구조의 제조 방법은, 반도체 칩의 칩 패드 위에 금속 기둥을 형성하는 단계와, 금속 기둥의 표면에 솔더를 형성하는 단계와, 기판의 기판 패드 위에 솔더가 형성된 금속 기둥을 위치시키는 단계와, 솔더를 리플로우하여 가운데가 오목한 형태의 오목형 솔더 범프를 형성하는 단계를 포함한다.
본 발명에 따른 오목형 솔더 범프의 제조 방법에 있어서, 금속 기둥의 형성 단계는 반도체 칩 위에 포토레지스트를 도포하는 단계와, 포토레지스트에 개구부를 형성하는 단계와, 개구부 안에 금속 물질을 채워 넣는 단계를 포함하는 것이 바람직하다. 이때, 포토레지스트는 양성 포토레지스트인 것이 바람직하다. 또한, 솔더의 형성 단계는 포토레지스트에 제2 개구부를 형성하여 금속 기둥을 노출시키는 단계와, 노출된 금속 기둥의 표면에 솔더를 도금하는 단계를 포함하는 것이 바람직하다. 기판의 기판 패드 위에 금속 기둥을 위치시키기 전에 기판 패드 위에 솔더를 미리 도포하는 것이 바람직하며, 반도체 칩의 칩 패드 위에 금속 기둥을 형성하기 전에 칩 패드 위에 하부 범프 금속층을 미리 형성하는 것이 바람직하다.
이하, 첨부 도면을 참조하여 본 발명의 바람직한 실시예를 보다 상세하게 설명하도록 한다. 첨부 도면에 있어서 일부 구성요소는 도면의 명확한 이해를 돕기 위해 다소 과장되거나 개략적으로 도시되거나 또는 생략되었으며, 각 구성요소의 실제 크기가 전적으로 반영된 것은 아니다. 또한, 도면을 통틀어 동일한 구성요소 또는 대응하는 구성요소는 동일한 참조 번호를 사용하였다. 특히, 첨부 도면은 하나 또는 두 개의 솔더 범프 구조만을 도시하고 있으나, 도시된 솔더 범프 구조가 칩 활성면 전체에 걸쳐 규칙적으로 배열되는 것은 자명하다.
실시예
도 4는 본 발명의 실시예에 따른 플립 칩 패키지의 오목형 솔더 범프 구조를 나타내는 단면도이다. 도 4를 참조하면, 반도체 칩(10)의 활성면에는 복수개의 칩 패드(12)가 형성되고 칩 패드(12)를 제외한 나머지 부분을 불활성층(14)이 덮고 있다. 칩 패드(12)의 표면에는 하나 이상의 하부 범프 금속층(16, UBM)이 형성되며, 하부 범프 금속층(16)은 칩 패드(12) 주위의 불활성층(14)까지 연장되어 있다. 반 도체 칩(10)의 활성면과 마주보는 쪽에는 기판(20)이 위치하며, 기판(20)에는 복수개의 기판 패드(22)가 형성되고 기판 패드(22)를 제외한 나머지 부분을 보호막(24)이 덮고 있다. 칩 패드(12)와 기판 패드(22)는 각각 서로 대응하는 위치에 형성된다.
서로 대응하는 칩 패드(12)와 기판 패드(22) 사이에는 솔더 범프(70)가 형성된다. 또한, 솔더 범프(70)의 내부에는 수직 방향으로 금속 기둥(60)이 형성된다. 솔더 범프(70)는 가운데가 오목한 형태를 가지는 오목형 솔더 범프이다. 솔더 범프(70)는 반도체 칩(10)과 기판(20)을 전기적, 기계적으로 연결시키면서, 전기적 신호의 이동 경로로서의 역할과 기계적 접합부로서의 역할을 한다. 도면에 도시되지는 않았지만, 솔더 범프(70)의 접합 강도를 높이기 위하여 칩(10)과 기판(20) 사이의 공간에 언더필 물질(underfill material)을 삽입할 수 있다.
본 발명의 솔더 범프(70)는 오목한 형태를 가지기 때문에 솔더 범프(70)의 형태가 미세 피치의 플립 칩 패키지를 구현하는데 장애가 되지 않는다. 오히려, 솔더 범프(70)의 가로 폭보다 하부 범프 금속층(16)의 크기가 더 크므로, 하부 범프 금속층(16)의 크기를 줄임으로써 초미세 피치(ultra fine pitch)의 플립 칩 패키지를 구현하는 것이 가능해진다.
한편, 솔더 범프(70) 내부에 형성된 금속 기둥(60)은 칩(10)과 기판(20) 사이의 간격을 일정하게 유지시켜 주는 역할을 하므로 언더필 공정이 가능해진다. 또한, 금속 기둥(60)은 솔더 범프(70)의 접합 강도를 향상시킬 뿐만 아니라, 열적 스트레스에 의한 범프 크랙(bump crack) 전파를 억제하는 효과가 있다.
이상 설명한 오목형 솔더 범프의 구조는 다음과 같은 제조 방법에 의하여 형성된다. 도 5a 내지 도 5k는 본 발명의 실시예에 따른 오목형 솔더 범프의 제조 방법을 순서대로 나타내는 단면도이다. 이하 설명되어질 제조 방법으로부터 솔더 범프의 구조 또한 보다 명확해질 것이다.
먼저, 도 5a에 도시된 바와 같이, 반도체 칩(10)의 칩 패드(12)와 불활성층(14) 위에 하부 범프 금속층(16)을 형성한다. 칩 패드(12)와 불활성층(14)은 통상적인 웨이퍼 제조 공정을 통하여 반도체 칩(10)의 활성면에 형성되어 있다. 반도체 칩(10)은 웨이퍼로부터 분리된 단일 칩 또는 웨이퍼 상의 칩이 모두 가능하다. 칩 패드(12)는 통상적으로 알루미늄(Al)으로 이루어지며, 불활성층(14)은 실리콘 질화막, 실리콘 산화막, 폴리이미드(polyimide) 등으로 이루어진다. 하부 범프 금속층(16)은 접착층, 확산 방지층, 솔더 웨팅층(solder wetting layer) 등으로 작용하며, 예컨대 크롬(Cr), 구리(Cu), 니켈(Ni), 티타늄-텅스텐(TiW), 니켈-바나듐(NiV) 등의 다양한 금속을 스퍼터링(sputtering) 방법으로 증착하여 형성한다.
이어서, 도 5b에 도시된 바와 같이, 하부 범프 금속층(16) 위에 포토레지스트(50)를 도포한다. 이때 도포되는 포토레지스트(50)의 두께는 추후 단계에서 형성되는 금속 기둥과 솔더 범프의 높이를 결정지으며, 궁극적으로 칩과 기판 사이의 거리를 결정한다. 포토레지스트(50)는 음성(negative) 포토레지스트도 사용할 수 있지만, 본 실시예에서는 양성(positive) 포토레지스트를 사용한다.
이어서, 도 5c에 도시된 바와 같이, 포토레지스트(50)를 노광하고 현상하여 칩 패드(12) 위의 하부 범프 금속층(16)을 노출시키는 제1 개구부(52)를 형성한다. 계속해서, 도 5d에 도시된 바와 같이, 제1 개구부(52) 안에 금속 물질을 채워 넣어 금속 기둥(60)을 형성한다. 금속 기둥(60)으로 사용될 수 있는 물질은 예를 들어 니켈(Ni), 구리(Cu), 팔라듐(Pd), 백금(Pt) 등이며, 전기도금 방법을 사용하여 금속 기둥(60)을 형성한다.
이어서, 도 5e에 도시된 바와 같이, 포토레지스트(50)를 재차 노광하고 현상하여 금속 기둥(60)이 완전히 노출되도록 제2 개구부(54)를 형성한다. 제2 개구부(54)는 추후 단계에서 하부 범프 금속층(16)의 최종 크기를 결정짓는다. 음성 포토레지스트가 사용되는 경우에는, 제1 개구부를 형성할 때 사용한 포토레지스트를 제거하고 제2 개구부를 형성하기 위하여 다시 새로운 포토레지스트를 도포하는 공정이 필요하다.
계속해서, 도 5f에 도시된 바와 같이, 제2 개구부(54) 안에 노출된 금속 기둥(60)의 표면과 하부 범프 금속층(16)의 표면에 솔더(72)를 도금한다. 이때 도금되는 솔더(72)의 양은 종래에 비하여 한결 적은 양이다. 종래 기술에서는 칩과 기판 사이의 거리가 솔더 범프의 크기, 즉 솔더의 양에 의하여 결정되었으나, 본 발명에서는 칩과 기판 사이의 거리가 금속 기둥(60)에 의하여 결정되기 때문이다. 솔더(72)로 사용될 수 있는 물질은 통상적으로 사용되는 주석(Sn)과 납(Pb) 뿐만 아니라, 니켈(Ni), 금(Au), 은(Ag), 구리(Cu), 비스무트(Bi) 등도 가능하다.
이어서, 도 5g에 도시된 바와 같이 포토레지스트를 제거하고, 도 5h에 도시된 바와 같이 솔더(72)를 마스크로 사용하여 외부로 노출된 하부 범프 금속층(16) 을 식각하여 제거한다. 계속해서 솔더(72)를 리플로우하면, 도 5i에 도시된 바와 같이 솔더(72)는 금속 기둥(60)을 중심으로 원추형이 된다.
이어서, 도 5j에 도시된 바와 같이, 원추형의 솔더(72)를 이용하여 칩(10)과 기판(20)을 접합시키고 솔더(72)를 리플로우한다. 이때 기판(20)의 기판 패드(22)에는 미리 솔더를 도포하는 것이 바람직하다. 솔더를 리플로우하게 되면, 도 5k에 도시된 바와 같이, 용융된 솔더의 표면 장력과 웨팅성에 의하여 가운데가 오목한 형태의 솔더 범프(70)가 형성된다.
이상 설명한 바와 같이, 본 발명의 솔더 범프 구조는 솔더 범프가 오목한 형태를 가지기 때문에 솔더 범프의 크기, 솔더 범프간 거리에 의하여 미세 피치의 플립 칩 패키지를 구현하는데 제약을 받지 않는다. 따라서, 솔더 범프가 형성되는 하부 범프 금속층의 크기를 줄임으로써 초미세 피치의 플립 칩 패키지를 구현하는 것이 가능해진다.
또한, 솔더 범프 내부에 금속 기둥을 형성함으로써 칩과 기판 사이의 간격을 일정하게 유지시켜 줄 수 있고, 솔더 범프의 크기에 상관없이 언더필 공정이 가능해진다. 금속 기둥은 솔더 범프의 접합 강도를 향상시킬 뿐만 아니라, 열적 스트레스에 의한 범프 크랙 전파를 억제하는 효과도 있다.
본 명세서와 도면에는 본 발명의 바람직한 실시예에 대하여 개시하였으며, 비록 특정 용어들이 사용되었으나, 이는 단지 본 발명의 기술 내용을 쉽게 설명하고 발명의 이해를 돕기 위한 일반적인 의미에서 사용된 것이지, 본 발명의 범위를 한정하고자 하는 것은 아니다. 여기에 개시된 실시예 외에도 본 발명의 기술적 사상에 바탕을 둔 다른 변형예들이 실시 가능하다는 것은 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자에게 자명한 것이다.

Claims (13)

  1. 삭제
  2. 삭제
  3. 삭제
  4. 삭제
  5. 삭제
  6. 삭제
  7. 칩 패드가 형성된 반도체 칩의 활성면에 포토레지스트를 도포하는 단계;
    상기 칩 패드를 노출시키도록 상기 포토레지스트에 제1개구부를 형성하는 단계;
    상기 개구부 안에 금속 물질을 채워 넣어 상기 칩 패드 위에 금속기둥을 형성하는 단계;
    상기 포토레지스트에 제2 개구부를 형성하여 상기 금속 기둥을 노출시키는 단계;
    상기 노출된 금속 기둥의 표면에 솔더를 도금하는 단계;
    기판의 기판 패드 위에 상기 솔더가 형성된 금속 기둥을 위치시키는 단계; 및
    상기 솔더를 리플로우하여 가운데가 오목한 형태의 오목형 솔더 범프를 형성하는 단계를 포함하는 플립 칩 패키지의 오목형 솔더 범프 구조 형성 방법.
  8. 삭제
  9. 제7 항에 있어서, 상기 포토레지스트는 양성 포토레지스트인 것을 특징으로 하는 플립 칩 패키지의 솔더 범프 구조 형성 방법.
  10. 삭제
  11. 제7 항에 있어서, 상기 기판의 기판 패드 위에 상기 금속 기둥을 위치시키기 전에 상기 기판 패드 위에 솔더를 미리 도포하는 것을 특징으로 하는 플립 칩 패키지의 오목형 솔더 범프 구조 형성 방법.
  12. 제7 항에 있어서, 상기 반도체 칩의 칩 패드 위에 상기 금속 기둥을 형성하기 전에 상기 칩 패드 위에 하부 범프 금속층을 미리 형성하는 것을 특징으로 하는 플립 칩 패키지의 오목형 솔더 범프 구조 형성 방법.
  13. 칩 패드가 형성된 반도체 칩의 활성면에 적어도 하나 이상의 하부 범프 금속층을 형성하는 단계;
    상기 하부 범프 금속층 위에 포토레지스트를 도포하는 단계;
    상기 칩 패드 위의 하부 범프 금속층을 노출시키도록 상기 포토레지스트에 제1 개구부를 형성하는 단계;
    상기 제1 개구부를 금속 물질로 채워 금속 기둥을 형성하는 단계;
    상기 금속 기둥이 노출되도록 상기 포토레지스트에 제2 개구부를 형성하는 단계;
    상기 제2 개구부 안에 노출된 상기 금속 기둥의 표면과 상기 하부 범프 금속층의 표면에 솔더를 도금하는 단계;
    상기 포토레지스트를 제거하는 단계;
    상기 솔더를 마스크로 사용하여 상기 하부 범프 금속층을 식각하는 단계;
    상기 솔더를 리플로우하는 단계;
    기판의 기판 패드 위에 상기 솔더가 형성된 금속 기둥을 위치시키는 단계; 및
    상기 솔더를 다시 리플로우하여 가운데가 오목한 형태의 오목형 솔더 범프를 형성하는 단계를 포함하는 플립 칩 패키지의 오목형 솔더 범프 구조 형성 방법.
KR1020030090682A 2003-12-12 2003-12-12 플립 칩 패키지의 오목형 솔더 범프 구조 형성 방법 KR100568006B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020030090682A KR100568006B1 (ko) 2003-12-12 2003-12-12 플립 칩 패키지의 오목형 솔더 범프 구조 형성 방법
US10/897,124 US20050127508A1 (en) 2003-12-12 2004-07-23 Solder bump structure for flip chip package and method for manufacturing the same
US11/785,980 US20070205512A1 (en) 2003-12-12 2007-04-23 Solder bump structure for flip chip package and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020030090682A KR100568006B1 (ko) 2003-12-12 2003-12-12 플립 칩 패키지의 오목형 솔더 범프 구조 형성 방법

Publications (2)

Publication Number Publication Date
KR20050058722A KR20050058722A (ko) 2005-06-17
KR100568006B1 true KR100568006B1 (ko) 2006-04-07

Family

ID=34651411

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020030090682A KR100568006B1 (ko) 2003-12-12 2003-12-12 플립 칩 패키지의 오목형 솔더 범프 구조 형성 방법

Country Status (2)

Country Link
US (2) US20050127508A1 (ko)
KR (1) KR100568006B1 (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101328551B1 (ko) 2006-10-02 2013-11-13 삼성전자주식회사 반도체 장치
US8922008B2 (en) 2012-05-07 2014-12-30 Samsung Electronics Co., Ltd. Bump structure, having concave lateral sides, semiconductor package having the bump structure, and method of forming the bump structure

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4489393B2 (ja) * 2003-08-21 2010-06-23 オリンパス株式会社 半導体装置
KR100541396B1 (ko) * 2003-10-22 2006-01-11 삼성전자주식회사 3차원 ｕｂｍ을 포함하는 솔더 범프 구조의 형성 방법
US7033864B2 (en) * 2004-09-03 2006-04-25 Texas Instruments Incorporated Grooved substrates for uniform underfilling solder ball assembled electronic devices
US20060055032A1 (en) * 2004-09-14 2006-03-16 Kuo-Chin Chang Packaging with metal studs formed on solder pads
JP4619223B2 (ja) * 2004-12-16 2011-01-26 新光電気工業株式会社 半導体パッケージ及びその製造方法
WO2007078148A2 (en) * 2006-01-04 2007-07-12 Industry-University Cooperation Foundation, Hanyang University Flip chip mount type of bump, manufacturing method thereof, and bonding method for flip chip using non conductive adhesive
TWI294677B (en) * 2006-03-31 2008-03-11 Ind Tech Res Inst Interconnect structure with stress buffering ability and the manufacturing method thereof
KR100834804B1 (ko) * 2006-12-21 2008-06-05 한국과학기술원 금속 스터드 스택 또는 칼럼을 이용한 플립칩 접속방법 및전자회로기판
KR100833593B1 (ko) * 2006-12-28 2008-05-30 주식회사 하이닉스반도체 플립 칩 패키지의 제조 방법
TW200836275A (en) * 2007-02-16 2008-09-01 Chipmos Technologies Inc Packaging conductive structure and method for manufacturing the same
DE102007028811A1 (de) * 2007-06-20 2008-12-24 Phoenix Contact Gmbh & Co. Kg Zwangsführung eines Verbindungsmaterials
US8039960B2 (en) * 2007-09-21 2011-10-18 Stats Chippac, Ltd. Solder bump with inner core pillar in semiconductor package
KR100921919B1 (ko) * 2007-11-16 2009-10-16 (주)화백엔지니어링 반도체 칩에 형성되는 구리기둥-주석범프 및 그의 형성방법
KR101214746B1 (ko) 2008-09-03 2012-12-21 삼성전기주식회사 웨이퍼 레벨 패키지 및 그 제조방법
TWI455263B (zh) * 2009-02-16 2014-10-01 Ind Tech Res Inst 晶片封裝結構及晶片封裝方法
US8823166B2 (en) 2010-08-30 2014-09-02 Taiwan Semiconductor Manufacturing Company, Ltd. Pillar bumps and process for making same
US20130119532A1 (en) * 2011-11-11 2013-05-16 Taiwan Semiconductor Manufacturing Company, Ltd. Bumps for Chip Scale Packaging
US8822327B2 (en) 2012-08-16 2014-09-02 Infineon Technologies Ag Contact pads with sidewall spacers and method of making contact pads with sidewall spacers
US9806045B2 (en) * 2013-08-29 2017-10-31 Taiwan Semiconductor Manufacturing Company Ltd. Interconnection structure including a metal post encapsulated by solder joint having a concave outer surface
KR102088531B1 (ko) * 2013-11-25 2020-03-12 에스케이하이닉스 주식회사 얇은 두께의 칩 내장형 패키지 및 그 제조 방법
US20160343646A1 (en) * 2015-05-21 2016-11-24 Qualcomm Incorporated High aspect ratio interconnect for wafer level package (wlp) and integrated circuit (ic) package
KR102457119B1 (ko) 2015-09-14 2022-10-24 삼성전자주식회사 반도체 패키지의 제조 방법
US9704818B1 (en) * 2016-07-06 2017-07-11 Nanya Technology Corporation Semiconductor structure and manufacturing method thereof
US10103114B2 (en) 2016-09-21 2018-10-16 Nanya Technology Corporation Semiconductor structure and manufacturing method thereof
US10269751B2 (en) 2016-11-03 2019-04-23 Nexperia B.V. Leadless package with non-collapsible bump
US10037957B2 (en) 2016-11-14 2018-07-31 Amkor Technology, Inc. Semiconductor device and method of manufacturing thereof
US10453811B2 (en) * 2016-11-29 2019-10-22 Taiwan Semiconductor Manufacturing Company, Ltd. Post passivation interconnect and fabrication method therefor
JP7100980B2 (ja) * 2018-01-22 2022-07-14 ローム株式会社 Ｌｅｄパッケージ
CN110610917B (zh) * 2019-10-23 2024-08-02 普冉半导体(上海)股份有限公司 一种晶圆级晶片尺寸封装的芯片结构
US11894331B2 (en) * 2021-08-30 2024-02-06 Taiwan Semiconductor Manufacturing Company, Ltd. Chip package structure, chip structure and method for forming chip structure

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2716336B2 (ja) * 1993-03-10 1998-02-18 日本電気株式会社 集積回路装置
US6121689A (en) * 1997-07-21 2000-09-19 Miguel Albert Capote Semiconductor flip-chip package and method for the fabrication thereof
FR2768859B1 (fr) * 1997-09-23 2003-03-07 Commissariat Energie Atomique Systeme de composants a hybrider autorisant un defaut de planeite
US6235996B1 (en) * 1998-01-28 2001-05-22 International Business Machines Corporation Interconnection structure and process module assembly and rework
US6372622B1 (en) * 1999-10-26 2002-04-16 Motorola, Inc. Fine pitch bumping with improved device standoff and bump volume
TWI248842B (en) * 2000-06-12 2006-02-11 Hitachi Ltd Semiconductor device and semiconductor module
US20020061665A1 (en) * 2000-07-03 2002-05-23 Victor Batinovich Method and apparatus for vertically stacking and interconnecting ball grid array (BGA) electronic circuit devices
JP2002134545A (ja) * 2000-10-26 2002-05-10 Oki Electric Ind Co Ltd 半導体集積回路チップ及び基板、並びにその製造方法
JP4744689B2 (ja) * 2000-12-11 2011-08-10 パナソニック株式会社 粘性流体転写装置及び電子部品実装装置
US7242099B2 (en) * 2001-03-05 2007-07-10 Megica Corporation Chip package with multiple chips connected by bumps
US6959856B2 (en) * 2003-01-10 2005-11-01 Samsung Electronics Co., Ltd. Solder bump structure and method for forming a solder bump

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101328551B1 (ko) 2006-10-02 2013-11-13 삼성전자주식회사 반도체 장치
US8922008B2 (en) 2012-05-07 2014-12-30 Samsung Electronics Co., Ltd. Bump structure, having concave lateral sides, semiconductor package having the bump structure, and method of forming the bump structure

Also Published As

Publication number Publication date
US20050127508A1 (en) 2005-06-16
KR20050058722A (ko) 2005-06-17
US20070205512A1 (en) 2007-09-06

Similar Documents

Publication Publication Date Title
KR100568006B1 (ko) 플립 칩 패키지의 오목형 솔더 범프 구조 형성 방법
KR100576156B1 (ko) 댐이 형성된 반도체 장치 및 그 반도체 장치의 실장 구조
US7271483B2 (en) Bump structure of semiconductor package and method for fabricating the same
US6417089B1 (en) Method of forming solder bumps with reduced undercutting of under bump metallurgy (UBM)
KR100804392B1 (ko) 반도체 패키지 및 그 제조 방법
KR100306842B1 (ko) 범프 패드에 오목 패턴이 형성된 재배치 웨이퍼 레벨 칩 사이즈 패키지 및 그 제조방법
US7462942B2 (en) Die pillar structures and a method of their formation
US7056818B2 (en) Semiconductor device with under bump metallurgy and method for fabricating the same
US7358174B2 (en) Methods of forming solder bumps on exposed metal pads
US20060246706A1 (en) Conductive bump structure for semiconductor device and fabrication method thereof
US7125745B2 (en) Multi-chip package substrate for flip-chip and wire bonding
US7446422B1 (en) Wafer level chip scale package and manufacturing method for the same
US20060038291A1 (en) Electrode structure of a semiconductor device and method of manufacturing the same
US6921716B2 (en) Wafer bumping process
US20080224325A1 (en) Wiring board, mounting structure for electronic components, and semiconductor device
US7300864B2 (en) Method for forming solder bump structure
WO2007064073A1 (en) Bump with multiple vias for semiconductor package, method of fabrication method thereof, and semiconductor package using the same
US7341949B2 (en) Process for forming lead-free bump on electronic component
KR101416596B1 (ko) 반도체 패키지 및 그 제조방법
US6956293B2 (en) Semiconductor device
JP2012190939A (ja) 半導体装置およびその製造方法
KR20090117380A (ko) 반도체 디바이스 및 그 제조 방법
KR101418440B1 (ko) 반도체 패키지 및 그 제조방법
KR100693207B1 (ko) 플립 칩 기법을 이용한 이미지 센서 패키지 및 그 제조 방법
US20050275097A1 (en) Method of forming a solder bump and the structure thereof

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee