EP3360154A2 - Verfahren zum verbinden einer substratanordnung mit einem elektronikbauteil mit verwendung eines auf eine kontaktierungsmaterialschicht aufgebrachten vorfixiermittels, entsprechende substratanordnung und verfahren zu ihrem herstellen - Google Patents
Verfahren zum verbinden einer substratanordnung mit einem elektronikbauteil mit verwendung eines auf eine kontaktierungsmaterialschicht aufgebrachten vorfixiermittels, entsprechende substratanordnung und verfahren zu ihrem herstellenInfo
- Publication number
- EP3360154A2 EP3360154A2 EP16777954.5A EP16777954A EP3360154A2 EP 3360154 A2 EP3360154 A2 EP 3360154A2 EP 16777954 A EP16777954 A EP 16777954A EP 3360154 A2 EP3360154 A2 EP 3360154A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- substrate
- material layer
- contacting material
- electronic component
- carrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/303—Assembling printed circuits with electric components, e.g. with resistors with surface mounted components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/25—Arrangements for cooling characterised by their materials
- H10W40/255—Arrangements for cooling characterised by their materials having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/02—Manufacture or treatment of conductive package substrates serving as an interconnection, e.g. of metal plates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/04—Manufacture or treatment of leadframes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/098—Applying pastes or inks, e.g. screen printing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/456—Materials
- H10W70/457—Materials of metallic layers on leadframes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/6875—Shapes or dispositions thereof being on a metallic substrate, e.g. insulated metal substrates [IMS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/013—Manufacture or treatment of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/303—Assembling printed circuits with electric components, e.g. with resistors with surface mounted components
- H05K3/305—Affixing by adhesive
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by conductive adhesives
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
- H10P72/7418—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding of passive members, e.g. a chip mounting substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7432—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7434—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/744—Details of chemical or physical process used for separating the auxiliary support from a device or a wafer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/013—Manufacture or treatment of die-attach connectors
- H10W72/01321—Manufacture or treatment of die-attach connectors using local deposition
- H10W72/01323—Manufacture or treatment of die-attach connectors using local deposition in liquid form, e.g. by dispensing droplets or by screen printing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/013—Manufacture or treatment of die-attach connectors
- H10W72/01321—Manufacture or treatment of die-attach connectors using local deposition
- H10W72/01325—Manufacture or treatment of die-attach connectors using local deposition in solid form
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/013—Manufacture or treatment of die-attach connectors
- H10W72/01331—Manufacture or treatment of die-attach connectors using blanket deposition
- H10W72/01333—Manufacture or treatment of die-attach connectors using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/013—Manufacture or treatment of die-attach connectors
- H10W72/01331—Manufacture or treatment of die-attach connectors using blanket deposition
- H10W72/01336—Manufacture or treatment of die-attach connectors using blanket deposition in solid form, e.g. by using a powder or by laminating a foil
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/013—Manufacture or treatment of die-attach connectors
- H10W72/01365—Thermally treating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/0711—Apparatus therefor
- H10W72/07141—Means for applying energy, e.g. ovens or lasers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07302—Connecting or disconnecting of die-attach connectors using an auxiliary member
- H10W72/07304—Connecting or disconnecting of die-attach connectors using an auxiliary member the auxiliary member being temporary, e.g. a sacrificial coating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07331—Connecting techniques
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07331—Connecting techniques
- H10W72/07336—Soldering or alloying
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07331—Connecting techniques
- H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/321—Structures or relative sizes of die-attach connectors
- H10W72/325—Die-attach connectors having a filler embedded in a matrix
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
- H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the invention relates to a method for producing a
- Substrate assembly for connection to an electronic component. Furthermore, the invention relates to a substrate arrangement for connection to a
- the invention relates to a method for connecting an electronic component to a substrate arrangement.
- pre-applied contacting agent such.
- Sintered paste are attached, during transport from the place of placement to the place of sintering slip.
- a further disadvantage of the known prior art is that a contacting material to be applied to a substrate is often applied in compliance with distances to the component edge, and / or to form a non-uniform, ramp-like structure.
- a full surface coating with a Contact material is according to known methods not or only to a very limited extent possible because z. B. when spraying sintering paste special requirements are placed on the sintering paste and the full-surface
- Coating is often associated with high spray losses.
- the largest possible surface with contacting material should be able to be efficiently coated or produced. From this surface, the components are to be cut out so that the contacting material protrudes on all sides as possible up to the edge of the component.
- Substrate assembly is formed such that a populated, but not soldered or sintered or glued component on the substrate assembly has sufficient transport strength. Besides, one is
- the substrate assembly has a large surface of bonding material.
- the invention is based on the idea of specifying a method for producing a substrate arrangement for connection to an electronic component, comprising the following steps: Providing a substrate having a first side and a second side,
- the substrate arrangement produced with the aid of the method according to the invention serves for the subsequent connection to an electronic component.
- the substrate may be a metal sheet or a metal sheet
- Metal band section in particular around a copper sheet or around a
- Copper band section act. Furthermore, it is possible that the substrate is a leadframe or a DCB substrate or a PCB substrate. As a copper sheet is also a sheet to understand, which consists of a copper alloy material. A copper tape portion may be such a tape portion made of a copper alloy material.
- the metal sheet or the metal strip section in particular the copper sheet or the copper strip section, is not prestructured. Only a lengthening and / or structuring of the margins can in the zu
- the substrate or a substrate blank to be provided may be provided on at least one side, in particular with a material which is gold (Au) or nickel-gold (NiAu) or silver (Ag) or nickel-silver (NiAg) or nickel-palladium-gold (NiPdAu). comprises, coated, in particular be galvanized.
- the material is chemically deposited on at least one side of the substrate or the substrate blank.
- the substrate it is possible for the substrate to be in front of
- the substrate blank may be a metal strip or sheet metal, in particular a copper strip or copper sheet. It is also possible that the substrate blank is a copper alloy strip or sheet.
- a full-area metal strip in particular copper strip, to be provided and galvanized on one side, endlessly on one side, in particular endlessly on one side.
- Substrate blank in particular of the metal strip, in particular of the
- Copper strip is separated and galvanized individually, for example, in a rack electroplating.
- the substrate On the first side of the substrate, which is, for example, the coated side or the coated side of the substrate
- a contacting material layer is applied.
- the contacting material layer should preferably be applied to the first side of the substrate over the whole area or almost over the whole area.
- At least one substrate may be positioned to apply the contacting material layer in a pressure nest. It is possible that several substrates are positioned in a pressure nest. Furthermore, it is possible that
- the contacting material which is a sintering paste, in particular a silver-containing sintering paste, or a solder or a conductive adhesive or an adhesive film, serves for the actual bonding of the substrate to the electronic component.
- Prefixing only serves for pre-fixing or for temporary attachment of the substrate to the electronic component or the electronic component to the substrate. Due to the Vorfixierens or pinning sufficient transportability of the component from the place of placement to the location of the sintering is caused.
- the prefixing agent is a temporary fixing agent.
- the prefixing agent is a fixing agent, which allows a temporary fixation of a substrate arrangement or a substrate with an electronic component.
- the prefixing agent is applied at least in sections to a side of the contacting material layer facing away from the substrate.
- Vorfixierstoff can, for example, be sprinkled on the contacting material layer, drizzled, sprayed, dispenst, jetted or applied by means of a transfer process.
- the substrate need not additionally be provided with a prefixed agent. In other words, no substrate section needs to be kept ready for application of a prefixing agent or kept free of the contacting material layer. This leads to a material savings in terms of
- the contacting material layer applied to the substrate may have a layer thickness of 10 to 150 ⁇ m, in particular of 30 to 100 ⁇ m, in particular of 40 to 80 ⁇ m.
- the contacting material layer applied to the substrate and the prefixing agent applied to the contacting material layer are preferably dried after application.
- the substrate preferably has no lateral edge after the application of a contacting material layer. In this case, the substrate is provided over its entire surface with a contacting material layer. In addition, it is possible that the substrate has a lateral edge to which no
- Contacting material layer is applied, wherein the edge has such a width, in particular at most 20% of the total width of the substrate, in particular at most 10% of the total width of the substrate, in particular at most 5% of the total width of the substrate, in particular at most 1% of the total width of the substrate , is.
- Substrate assembly produced with as little non-usable edge. In other words, the first side of the substrate with as much
- Contacting material layer is formed.
- the contacting material layer applied to the substrate and that applied to the contacting material layer is formed.
- Drying process suspended. Drying may be at 80-150 ° C
- Object temperature can be carried out for 2-30 min. If drying or pre-drying is performed, the thickness of the applied pre-fixing agent and the thickness of the applied contacting material layer due to the drying or predrying is reduced.
- the substrate with applied contacting material layer and applied prefixing agent can be positioned on a carrier such that the first side of the substrate is arranged facing the carrier, wherein the prefixing agent and optionally
- the contacting material layer is or are at least adhesively bonded to the carrier.
- the substrate can thus be applied to a support such that the substrate assembly, which is a substrate
- a Greetician layer Prefix, a Greticiansmaterial layer and optionally comprises a carrier to another production site or to another
- Processing device can be transported. It is possible that only the prefixing agent is adhesively bonded to the carrier. For example, there may be a small distance between the carrier and the contacting material layer.
- the carrier serves to ensure that the substrate arrangement of a first
- Production site can be transported to another production facility or from a first manufacturing device to another manufacturing device.
- the support may be, for example, a carrier film, in particular a carrier film with a low adhesive force.
- the substrate provided with a bonding material layer and the prefixing agent may be adhered to this UV tape.
- at least some of the lateral edge (s) of the substrate preferably in the state connected to the carrier, can be separated off and / or the substrate, preferably in the state connected to the carrier, structured and / or singulated.
- the end part geometry, ie the final geometry of the substrate adapter or the substrate arrangement can therefore according to the
- a substrate adapter is produced, the substrate of which is preferably completely on the first side with a
- Contacting material layer is provided or on the first side over the entire surface has a bonding material layer. The unusable edge of the substrate assembly or substrate adapter is removed.
- a plurality of substrate arrangements can be produced from an initially larger substrate arrangement by singulation. It is also possible to structure the substrate, for example to adapt the substrate or the substrate arrangement to the geometry of the component to be connected. Preferably, the separation of the lateral edge and / or takes place
- the contacting material layer and / or the prefixing agent can at least partially be separated off and / or structured and / or singulated. If the contacting material layer is separated and / or structured and / or singulated, which can be achieved by, for example, printing the
- a contacting material layer having a base area of about 180 mm ⁇ 180 mm or 190 mm ⁇ 190 mm can be applied to a substrate with the dimensions 200 mm ⁇ 200 mm. After the lateral edge has been cut off, it is thus possible to produce a substrate adapter with dimensions of not more than 190 mm ⁇ 190 mm, such a substrate having a full surface area
- the contacting material of the contacting material layer preferably comprises a sintering aid and metal particles, in particular silver particles.
- Sintering aids are organic compounds.
- the contacting material may comprise binders and / or fatty acids.
- the binders are in particular polymers such as cellulose derivatives, for example methyl cellulose, ethyl cellulose, ethyl methyl cellulose, carboxy cellulose and hydroxypropyl cellulose.
- the fatty acids may in particular be caprylic acid (octanoic acid), capric acid (decanoic acid), lauric acid (dodecanoic acid), myristic acid
- sintering aid accordingly comprises the fatty acids and / or binders present in the contacting material and / or organic
- the contacting material of the contacting material layer is preferably a sintering paste, in particular a silver sintering paste.
- the prefixing agent preferably comprises the same
- Sintering aid Metal particles, especially silver particles, are preferably not included in the prefixing agent. Since the contacting material and the prefixing agent preferably comprise the same sintering aid, it does not occur in a prefixing or during application of the prefixing agent to the contacting material layer Contamination in the contacting material layer in the form of another prefixing agent, such as. B. adhesive. Unwanted contaminants in the
- the invention is further based on the idea to provide a substrate assembly for connection to an electronic component, wherein the
- Substrate assembly is preferably prepared by a method according to the invention mentioned above.
- the substrate arrangement according to the invention comprises a substrate, in particular a metal sheet or a metal strip section, preferably a copper sheet or a copper strip section, or a
- Leadframe or DCB substrate or a PCB substrate is, with a first side and a second side, wherein on the first side of the substrate at least partially a contacting material layer is applied, wherein on a side facing away from the substrate side of the contacting material layer at least partially a prefixing agent is applied.
- the contacting material of the contacting material layer comprises
- Prefixing agent in a preferred embodiment of the invention comprises the same sintering aid.
- Sintering aids are to be understood as meaning the fatty acids and / or binders and / or organic compounds which are used in the
- the binders are in particular polymers such as cellulose derivatives, for example methyl cellulose, ethyl cellulose, ethyl methyl cellulose, carboxy cellulose and hydroxypropyl cellulose.
- the fatty acids may in particular be caprylic acid (octanoic acid), capric acid (decanoic acid), lauric acid (dodecanoic acid), myristic acid
- the substrate is coated on at least one side, in particular with material comprising gold (Au) or nickel-gold (NiAu) or silver (Ag) or nickel-silver (NiAg) or nickel-palladium-gold (NiPdAu), in particular galvanized.
- material comprising gold (Au) or nickel-gold (NiAu) or silver (Ag) or nickel-silver (NiAg) or nickel-palladium-gold (NiPdAu), in particular galvanized.
- the described material is chemically deposited on at least one side of the substrate.
- the substrate arrangement has a carrier, which is designed in particular as a carrier film, wherein the carrier with the
- Prefixant is at least adherent. It is possible that too
- the substrate is disposed in relation to the carrier such that the first side of the substrate is disposed facing the carrier.
- the carrier serves to transport the substrate arrangement from a first production site to a further production site or from a first production device to a further production device.
- the carrier may be, for example, a carrier film with a low adhesive force. Furthermore, it is possible that the carrier is a UV tape.
- Substrate has a lateral edge on which nomaschine istsmaterial- layer is applied, wherein the edge has such a width, in particular at most 20% of the total width of the substrate, in particular at most 10% of the total width of the substrate, in particular at most 5% of the total width of the substrate , in particular at most 1% of the total width of the substrate.
- the invention is further based on the idea of specifying a method for connecting an electronic component to a substrate arrangement.
- the substrate arrangement may in particular be a substrate arrangement according to the invention and / or a substrate arrangement produced by means of the described method according to the invention.
- the method according to the invention for connecting an electronic component to a substrate arrangement comprises the steps:
- the positioning of the substrate arrangement and of the electronic component relative to each other such that a / the first side of the substrate is arranged facing the electronic component can firstly be carried out in such a way that the
- Substrate assembly is placed on the electronic component.
- Substrate arrangement is applied.
- the substrate arrangement comprises a carrier or is arranged on a carrier, the substrate is applied together with the carrier
- a prefixing of the substrate arrangement with the electronic component is preferably carried out.
- This prefixing is applied at least in sections with the aid of the first side of the substrate Vorfixierstoffs performed.
- a prefixing is applied at least in sections with the aid of the first side of the substrate Vorfixierstoffs performed.
- Heat load Preferably, a temperature of 100-150 ° C. is applied so that the prefixing agent is activated via the applied heat and thus the substrate arrangement can be prefixed to the electronic component. Due to the prefixing, such a transporting strength can be associated with respect to the prefixed with the substrate assembly
- Electronic component can be achieved that the electronic component can not be shaken loose due to the feed of a conveyor belt. Rather, the electronic component remains in the prefixed position.
- Contacting material layer and the applied prefixing agent of a / the carrier can be effected by means of a nozzle.
- the substrate can be applied together with the
- Contacting material layer and the applied prefixing agent are applied to an electronic component. This can be done in one step, i. H. after detaching from the carrier, the substrate can immediately on the
- the electronic component may be a semiconductor or a DCB substrate or a PCB substrate.
- the bonding of the substrate arrangement to the electronic component can be done, for example, by means of
- the substrate assembly is sintered with the electronic component and / or pressed and / or soldered and / or glued.
- the substrate assembly is sintered with the electronic component.
- the substrate arrangement has the contacting material layer, in particular in the form of silver-sintered paste.
- prefixing agent in connection with the method according to the invention for connecting an electronic component to a substrate arrangement, reference is made to the explanations already given regarding the prefixing agent. Also with regard to the arrangement of the prefixing agent and the Contact material layer to each other is referred to the explanations already given.
- the substrate arrangement fixed to the electronic component is preferably transported in a process oven for connecting the substrate arrangement to the electronic component.
- the process furnace may be, for example, a
- Fig. 1-5 individual steps of the method for producing a
- 6a-8 show individual steps of a method according to the invention for connecting an electronic component to a substrate arrangement according to a first embodiment
- FIGS. 9-11 show individual steps of a method according to the invention for connecting an electronic component to a substrate arrangement according to a further embodiment.
- like reference numerals are used for like and equivalent parts.
- a substrate 11 is shown.
- the substrate 11 has a first side 12 and a second side 13.
- the substrate 11 is preferably a copper tape section. It is also possible that
- Copper alloy strip sections are used.
- the substrate 11 is coated on one or both sides 12 and 13.
- the first side 12 and / or the second side 13 is coated with gold or nickel-gold or silver or nickel-silver or nickel-palladium-gold, in particular galvanized.
- the first side 12 of the substrate 11 is formed parallel to the opposite second side 13 of the substrate 11 in the illustrated example.
- Fig. 2 it is shown that on the side 12 of the substrate 10 a
- the contacting material of the contacting material layer 15 is preferably a sintering paste, in particular a silver sintering paste.
- a sintering paste usually consists of
- Sintering aids and metal particles are silver particles.
- the sintering aids are organic compounds and / or fatty acids and / or binders.
- the contacting material layer 15 can be applied to the first side 12 of the substrate 11 by means of a printing method.
- Contacting material layer 15 applied. Due to the selected application technique, for example in the printing process, however, narrow edges 19 remain on the substrate 11 or on the first side 12 of the substrate 11, which do not have a contacting material layer 15.
- the edge 19 preferably has such a width b R , which is in particular at most 5% of the total width b s of the substrate 11. As shown in FIG. 3, the first side 16 of FIG.
- the first side 16 of the contacting material layer 15 is the side facing away from the substrate 11 or from the first side 12 of the substrate 11
- Vorfixiermittel 18 is in the form of teardrop-shaped elements or
- the prefixing agent 18 comprises the same sintering aid as the contacting material of the contacting material layer 15. Due to this, when contacting the substrate assembly 10 with a
- the substrate arrangement 10 comprises according to FIG. 3, the substrate 11, the
- the substrate 11 is applied with
- Contacting material layer 15 and applied prefixing agent 18 are positioned on a carrier 20 such that the first side 12 of the substrate 11 is arranged facing the carrier 20, wherein the prefixing agent 18 is at least adhesively bonded to the carrier 20.
- the carrier 20 may be a carrier foil.
- a wafer frame is covered with a UV tape, so that the substrate 11 together with the
- the substrate arrangement 10 ⁇ comprises in the illustration according to FIG. 4 thus the carrier 20, the substrate 11 and the
- Fig. 5 it is shown that the substrate assembly 10 ⁇ is brought into a desired end part geometry.
- a laser for example, the
- the substrate 11 is singulated in the state connected to the carrier 20.
- ⁇ cut-outs 25 are placed such that the substrate assembly 10 is divided ⁇ in three individual geometries or three smaller substrate assemblies 10 ".
- An isolated substrate arrangement 10 is released from the carrier 20 with the aid of a nozzle 40, as shown in FIG. 6a
- Substrate arrangement 10 is, for example, the left one
- Substrate arrangement 10 "of Fig. 5. The adhesive bond between the
- Vorfixierstoff 18 and the carrier 20 is solved by applying a tensile force on the substrate assembly 10 ", so that the substrate assembly 10" can be applied to the electronic component 30 in turn by means of the nozzle 40.
- the substrate assembly 10 "and the electronic component 30 become one another positioned such that the first side 12 of the substrate 11 is arranged facing the electronic component 30.
- the substrate arrangement 10" is thus moved on the first side by means of the prefixing means 18 Prefixed on page 31 of the electronic component 30.
- the prefixing can be achieved by slight application of pressure and / or by means of
- the second side 32 of the electronic component 30 is free of further layers and / or components in the exemplary embodiment shown.
- the electronic component 30 is shown connected to the substrate assembly state.
- the prefixing agent 18 is used in connecting the
- Substrate assembly 10 with the electronic component 30, in particular during
- Contacting material layer 15 is included, this is not contaminated. In other words, after the processing, the prefixing agent or the pre-applied adhesive is inactive and no longer present.
- FIGs. 9-11 is a second embodiment relating to a method for connecting at least one electronic component to one
- Substrate assembly 10 shown. The illustrated method steps are typically preceded by the method steps illustrated in FIGS. 1-3, wherein the substrate 13 may also be a lead frame, a DCB or a PCB.
- the application of the electronic components 30 and 30 ⁇ takes place by means of placement process.
- the electronic components 30 and 30 ⁇ are each with the first sides 31 of
- Vorfixierstoff 18 can take place. As shown in Fig. 10, the electronic components are held for further processing by the Vorfixierstoff 18 or through pre-applied adhesive 30 and 30 ⁇ .
- the bonding can be done by soldering or pressing or sintering or gluing. It is conceivable that in a process oven, for. In one
- the substrate assembly 10 with the electronic components 30 and 30 ⁇ is sintered.
- the prefixing agent 18 is almost completely removed, in particular burned off and / or melted off. After processing, the pre-applied adhesive is inactive and no longer present.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Die Bonding (AREA)
- Wire Bonding (AREA)
- Laminated Bodies (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
Description
Claims
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP21177341.1A EP3940758A3 (de) | 2015-10-08 | 2016-09-28 | Verfahren zum sinterverbinden einer substratanordnung mit einem elektronikbauteil mit verwendung eines auf eine sinterkontaktierungsmaterialschicht aufgebrachten vorfixiermittels, entsprechende substratanordnung und verfahren zu ihrer herstellung |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP15188966.4A EP3154079A1 (de) | 2015-10-08 | 2015-10-08 | Verfahren zum verbinden einer substratanordnung mit einem elektronikbauteil mit verwendung eines auf eine kontaktierungsmaterialschicht aufgebrachten vorfixiermittels, entsprechende substratanordnung und verfahren zu ihrem herstellen |
| PCT/EP2016/073102 WO2017060140A2 (de) | 2015-10-08 | 2016-09-28 | Verfahren zum herstellen einer substratanordnung, substratanordnung und verfahren zum verbinden einer substratanordnung mit einem elektronikbauteil |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP21177341.1A Division EP3940758A3 (de) | 2015-10-08 | 2016-09-28 | Verfahren zum sinterverbinden einer substratanordnung mit einem elektronikbauteil mit verwendung eines auf eine sinterkontaktierungsmaterialschicht aufgebrachten vorfixiermittels, entsprechende substratanordnung und verfahren zu ihrer herstellung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP3360154A2 true EP3360154A2 (de) | 2018-08-15 |
Family
ID=54292653
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP15188966.4A Withdrawn EP3154079A1 (de) | 2015-10-08 | 2015-10-08 | Verfahren zum verbinden einer substratanordnung mit einem elektronikbauteil mit verwendung eines auf eine kontaktierungsmaterialschicht aufgebrachten vorfixiermittels, entsprechende substratanordnung und verfahren zu ihrem herstellen |
| EP21177341.1A Pending EP3940758A3 (de) | 2015-10-08 | 2016-09-28 | Verfahren zum sinterverbinden einer substratanordnung mit einem elektronikbauteil mit verwendung eines auf eine sinterkontaktierungsmaterialschicht aufgebrachten vorfixiermittels, entsprechende substratanordnung und verfahren zu ihrer herstellung |
| EP16777954.5A Withdrawn EP3360154A2 (de) | 2015-10-08 | 2016-09-28 | Verfahren zum verbinden einer substratanordnung mit einem elektronikbauteil mit verwendung eines auf eine kontaktierungsmaterialschicht aufgebrachten vorfixiermittels, entsprechende substratanordnung und verfahren zu ihrem herstellen |
Family Applications Before (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP15188966.4A Withdrawn EP3154079A1 (de) | 2015-10-08 | 2015-10-08 | Verfahren zum verbinden einer substratanordnung mit einem elektronikbauteil mit verwendung eines auf eine kontaktierungsmaterialschicht aufgebrachten vorfixiermittels, entsprechende substratanordnung und verfahren zu ihrem herstellen |
| EP21177341.1A Pending EP3940758A3 (de) | 2015-10-08 | 2016-09-28 | Verfahren zum sinterverbinden einer substratanordnung mit einem elektronikbauteil mit verwendung eines auf eine sinterkontaktierungsmaterialschicht aufgebrachten vorfixiermittels, entsprechende substratanordnung und verfahren zu ihrer herstellung |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US10622331B2 (de) |
| EP (3) | EP3154079A1 (de) |
| JP (1) | JP6664751B2 (de) |
| KR (1) | KR102085191B1 (de) |
| CN (1) | CN108604555B (de) |
| TW (2) | TWI652744B (de) |
| WO (1) | WO2017060140A2 (de) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3553812B1 (de) * | 2018-04-11 | 2025-12-31 | Heraeus Electronics GmbH & Co. KG | Substratanordnung zur verbindung mit einem elektronikbauteil |
| WO2019208072A1 (ja) * | 2018-04-27 | 2019-10-31 | 日東電工株式会社 | 半導体装置製造方法 |
| EP3611761A1 (de) * | 2018-08-13 | 2020-02-19 | Heraeus Deutschland GmbH & Co KG | Verfahren und metallsubstrat zum kontaktieren eines leistungshalbleiters durch ein kontaktierungsmittel mit zumindest einem kontaktierungsfreien bereich als belastungsreduzierende struktur |
| EP3627544A1 (de) * | 2018-09-20 | 2020-03-25 | Heraeus Deutschland GmbH & Co. KG | Substratanordnung zum verbinden mit zumindest einem elektronikbauteil und verfahren zum herstellen einer substratanordnung |
| DE102018221148A1 (de) | 2018-12-06 | 2020-06-10 | Heraeus Deutschland GmbH & Co. KG | Verfahren zum Herstellen eines Substratadapters und Substratadapter zum Verbinden mit einem Elektronikbauteil |
| US11497112B2 (en) | 2020-12-11 | 2022-11-08 | Toyota Motor Engineering & Manufacturing North America, Inc. | Driver board assemblies and methods of forming a driver board assembly |
| DE102021207267A1 (de) | 2021-07-09 | 2023-01-12 | Heraeus Deutschland GmbH & Co. KG | Als temporäres Fixiermittel verwendbare Zusammensetzung |
| JP7790187B2 (ja) * | 2022-02-15 | 2025-12-23 | 日本電気株式会社 | 半導体装置の製造装置、製造方法及び製造プログラム並びに半導体装置 |
| EP4443487A1 (de) | 2023-04-04 | 2024-10-09 | Heraeus Electronics GmbH & Co. KG | Substratanordnung mit oberflächenstruktur |
| EP4443488A1 (de) | 2023-04-04 | 2024-10-09 | Heraeus Electronics GmbH & Co. KG | Substratanordnung mit oberflächenstruktur |
| DE102023124260B3 (de) | 2023-09-08 | 2024-12-05 | Danfoss Silicon Power Gmbh | Baugruppe aufweisend eine Fixierschnittstelle zum Anhaften mindestens eines elektronischen Bauteils an eine Befestigungsseite eines Basiselements oder eine Sinterungsschicht vor einem Sintern und Verfahren zur Herstellung |
| EP4700826A1 (de) | 2024-08-23 | 2026-02-25 | Heraeus Electronics GmbH & Co. KG | Substratanordnung, verfahren zur herstellung einer elektronischen baugruppe und elektronische baugruppe |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012073972A1 (ja) * | 2010-12-01 | 2012-06-07 | 日立化成工業株式会社 | 接着剤層付き半導体ウェハ、半導体装置の製造方法及び半導体装置 |
| DE102012202281A1 (de) * | 2012-02-15 | 2013-08-22 | Infineon Technologies Ag | Halbleiteranordnung für Druckkontaktierung |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3928753B2 (ja) * | 1996-08-06 | 2007-06-13 | 日立化成工業株式会社 | マルチチップ実装法、および接着剤付チップの製造方法 |
| US20050127134A1 (en) * | 2003-09-15 | 2005-06-16 | Guo-Quan Lu | Nano-metal composite made by deposition from colloidal suspensions |
| JP2006202938A (ja) * | 2005-01-20 | 2006-08-03 | Kojiro Kobayashi | 半導体装置及びその製造方法 |
| DE102006033073B3 (de) * | 2006-07-14 | 2008-02-14 | Danfoss Silicon Power Gmbh | Verfahren zur Schaffung einer hitze- und stoßfesten Verbindung des Baugruppen-Halbleiters und zur Drucksinterung vorbereiteter Halbleiterbaustein |
| DE102008034946B4 (de) * | 2008-07-26 | 2016-05-19 | Semikron Elektronik Gmbh & Co. Kg | Herstellungsverfahren eines Edelmetallverbindungsmittels |
| JP5158904B2 (ja) * | 2010-03-19 | 2013-03-06 | 古河電気工業株式会社 | 導電接続部材、及び導電接続部材の作製方法 |
| DE102010021765B4 (de) | 2010-05-27 | 2014-06-12 | Semikron Elektronik Gmbh & Co. Kg | Herstellungsverfahren zur Anordnung zweier Verbindungspartner mittels einer Niedertemperatur Drucksinterverbindung |
| DE102010021764B4 (de) * | 2010-05-27 | 2014-09-25 | Semikron Elektronik Gmbh & Co. Kg | Verfahren zur Niedertemperatur Drucksinterverbindung zweier Verbindungspartner |
| DE102010030317B4 (de) * | 2010-06-21 | 2016-09-01 | Infineon Technologies Ag | Schaltungsanordnung mit Shuntwiderstand |
| DE102010044329A1 (de) | 2010-09-03 | 2012-03-08 | Heraeus Materials Technology Gmbh & Co. Kg | Kontaktierungsmittel und Verfahren zur Kontaktierung elektrischer Bauteile |
| HUE028880T2 (en) | 2011-09-20 | 2017-01-30 | Heraeus Deutschland Gmbh & Co Kg | Paste and process for connecting electronic components with a carrier |
| JP5971909B2 (ja) * | 2011-09-21 | 2016-08-17 | 古河電気工業株式会社 | 導電性ペースト、及び該導電性ペーストを焼成して得られる接合体 |
| DE102012201935A1 (de) * | 2012-02-09 | 2013-08-14 | Robert Bosch Gmbh | Verbindungsanordnung eines elektrischen und/oder elektronischen Bauelements |
| DE102012202727B4 (de) * | 2012-02-22 | 2015-07-02 | Vectron International Gmbh | Verfahren zur Verbindung eines ersten elektronischen Bauelements mit einem zweiten Bauelement |
| DE112012006750B4 (de) * | 2012-07-30 | 2026-01-08 | Erich Thallner | Substratverbund, Verfahren und Vorrichtung zum Bonden von Substraten |
| DE102012109156A1 (de) * | 2012-09-27 | 2014-03-27 | Osram Opto Semiconductors Gmbh | Bauteilanordnung und Verfahren zum Herstellen von elektrischen Bauteilen |
| WO2014061545A1 (ja) | 2012-10-15 | 2014-04-24 | 積水化学工業株式会社 | 有機無機ハイブリッド粒子、導電性粒子、導電材料及び接続構造体 |
| JP5664679B2 (ja) * | 2013-03-07 | 2015-02-04 | 三菱マテリアル株式会社 | パワーモジュール用基板の製造方法 |
| DE102014104272A1 (de) * | 2014-03-26 | 2015-10-01 | Heraeus Deutschland GmbH & Co. KG | Träger und Clip jeweils für ein Halbleiterelement, Verfahren zur Herstellung, Verwendung und Sinterpaste |
| DE102014109766B3 (de) * | 2014-07-11 | 2015-04-02 | Heraeus Deutschland GmbH & Co. KG | Verfahren zum Herstellen eines Substratadapters, Substratadapter und Verfahren zum Kontaktieren eines Halbleiterelements |
| DE202015001441U1 (de) * | 2015-02-24 | 2015-03-18 | Vincotech Gmbh | Leistungshalbleitermodul mit kombinierten Dickfilm- und Metallsinterschichten |
-
2015
- 2015-10-08 EP EP15188966.4A patent/EP3154079A1/de not_active Withdrawn
-
2016
- 2016-09-28 US US15/766,234 patent/US10622331B2/en active Active
- 2016-09-28 JP JP2018517696A patent/JP6664751B2/ja active Active
- 2016-09-28 WO PCT/EP2016/073102 patent/WO2017060140A2/de not_active Ceased
- 2016-09-28 KR KR1020187012302A patent/KR102085191B1/ko not_active Expired - Fee Related
- 2016-09-28 EP EP21177341.1A patent/EP3940758A3/de active Pending
- 2016-09-28 EP EP16777954.5A patent/EP3360154A2/de not_active Withdrawn
- 2016-09-28 CN CN201680059144.1A patent/CN108604555B/zh active Active
- 2016-10-06 TW TW105132378A patent/TWI652744B/zh not_active IP Right Cessation
- 2016-10-06 TW TW107142487A patent/TWI709180B/zh not_active IP Right Cessation
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012073972A1 (ja) * | 2010-12-01 | 2012-06-07 | 日立化成工業株式会社 | 接着剤層付き半導体ウェハ、半導体装置の製造方法及び半導体装置 |
| DE102012202281A1 (de) * | 2012-02-15 | 2013-08-22 | Infineon Technologies Ag | Halbleiteranordnung für Druckkontaktierung |
Also Published As
| Publication number | Publication date |
|---|---|
| EP3154079A1 (de) | 2017-04-12 |
| TW201724295A (zh) | 2017-07-01 |
| KR20180059913A (ko) | 2018-06-05 |
| KR102085191B1 (ko) | 2020-03-05 |
| EP3940758A2 (de) | 2022-01-19 |
| WO2017060140A2 (de) | 2017-04-13 |
| US10622331B2 (en) | 2020-04-14 |
| CN108604555B (zh) | 2022-03-08 |
| CN108604555A (zh) | 2018-09-28 |
| JP6664751B2 (ja) | 2020-03-13 |
| TWI709180B (zh) | 2020-11-01 |
| US20180286831A1 (en) | 2018-10-04 |
| JP2018530166A (ja) | 2018-10-11 |
| EP3940758A3 (de) | 2022-08-10 |
| WO2017060140A3 (de) | 2017-06-01 |
| TWI652744B (zh) | 2019-03-01 |
| TW201909292A (zh) | 2019-03-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP3360154A2 (de) | Verfahren zum verbinden einer substratanordnung mit einem elektronikbauteil mit verwendung eines auf eine kontaktierungsmaterialschicht aufgebrachten vorfixiermittels, entsprechende substratanordnung und verfahren zu ihrem herstellen | |
| DE102013216633B4 (de) | Vorgesinterte Halbleiterchip-Struktur und Verfahren zum Herstellen | |
| EP3103138B1 (de) | Verfahren zum montieren eines elektrischen bauelements, bei der eine haube zum einsatz kommt | |
| DE102010021764B4 (de) | Verfahren zur Niedertemperatur Drucksinterverbindung zweier Verbindungspartner | |
| DE102015107724B4 (de) | Verfahren zum Herstellen einer Substratanordnung, Substratanordnung, Verfahren zum Verbinden eines Elektronikbauteils mit einer Substratanordnung und Elektronikbauteil | |
| DE1591186B1 (de) | Verfahren zum simultanen Herstellen von Zufuehrungs-verbindungen mittels Kontaktbruecken auf Festkoerperbauelementen mit Hilfe von abziehbildartigen Vorrichtungen | |
| DE102008048869A1 (de) | Vorrichtung und Verfahren zum Verbinden zweier Verbindungspartner | |
| EP3123500A1 (de) | Träger und clip jeweils mit sinterbarer, verfestigter paste zur verbindung mit einem halbleiterelement, entsprechende sinterpaste und entsprechendes herstellungsverfahren und verwendung | |
| EP3026702B1 (de) | Verfahren zum herstellen eines halbleiterelements mit substratadapter und halbleiterelement mit substratadapter | |
| DE102008033651B4 (de) | Verfahren zur Herstellung eines Leistungshalbleitermoduls | |
| EP2847787A1 (de) | Zweistufiges verfahren zum fügen eines halbleiters auf ein substrat mit verbindungsmaterial auf silberbasis | |
| DE102014109766B3 (de) | Verfahren zum Herstellen eines Substratadapters, Substratadapter und Verfahren zum Kontaktieren eines Halbleiterelements | |
| EP2498283B1 (de) | Verfahren zur Herstellung eines Leistungshalbleitersubstrates | |
| EP3086361A2 (de) | Verfahren zum herstellen einer substratanordnung mit einem vorfixiermittel, entsprechende substratanordnung, verfahren zum verbinden eines elektronikbauteils mit einer substratanordnung mit anwendung eines auf dem elektronikbauteil und/oder der substratanordnung aufgebrachten vorfixiermittels und mit einer substratanordnung verbundenes elektronikbauteil | |
| EP2263825B1 (de) | Verfahren zur herstellung von werkstücken aus einer materialplatte | |
| WO2003085702A1 (de) | Verfahren zum verarbeiten von elektrischen bauelementen, insbesondere von halbleiterchips, sowie vorrichtung zum durchführen des verfahrens | |
| EP3675153A1 (de) | Verfahren zum herstellen eines substratadapters und substratadapter zum verbinden mit einem elektronikbauteil | |
| DE10312109A1 (de) | Herstellung von Lotkontakten auf einem Wafer unter Verwendung einer strukturierten Lotfolie | |
| DE102014106763B4 (de) | Verfahren zur Herstellung eines Halbleitermoduls | |
| DE102015108512A1 (de) | Verfahren zur Herstellung einer stoffschlüssigen Verbindung und Bestückungsautomat |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: UNKNOWN |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE |
|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE |
|
| 17P | Request for examination filed |
Effective date: 20180508 |
|
| AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
|
| AX | Request for extension of the european patent |
Extension state: BA ME |
|
| DAV | Request for validation of the european patent (deleted) | ||
| DAX | Request for extension of the european patent (deleted) | ||
| RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: BACHMANN, CHRISTIAN Inventor name: MIRIC, ANTON Inventor name: OSTERWALD, FRANK Inventor name: HINRICH, ANDREAS Inventor name: BECKER, MARTIN Inventor name: PAULSEN, LARS Inventor name: SCHEFUSS, FRANK Inventor name: ULRICH, HOLGER Inventor name: RUDZKI, JACEK Inventor name: DUCH, SUSANNE Inventor name: BENNING, DAVID Inventor name: SCHAEFER, MICHAEL |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: EXAMINATION IS IN PROGRESS |
|
| 17Q | First examination report despatched |
Effective date: 20210125 |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
| 18D | Application deemed to be withdrawn |
Effective date: 20210605 |