EP2812912A2 - Système de connexion d'un composant électrique et/ou électronique - Google Patents

Système de connexion d'un composant électrique et/ou électronique

Info

Publication number
EP2812912A2
EP2812912A2 EP13702765.2A EP13702765A EP2812912A2 EP 2812912 A2 EP2812912 A2 EP 2812912A2 EP 13702765 A EP13702765 A EP 13702765A EP 2812912 A2 EP2812912 A2 EP 2812912A2
Authority
EP
European Patent Office
Prior art keywords
layer
connection
solder
electronic component
electrical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP13702765.2A
Other languages
German (de)
English (en)
Inventor
Christiane FRUEH
Andreas Fix
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP2812912A2 publication Critical patent/EP2812912A2/fr
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/0008Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/19Soldering, e.g. brazing, or unsoldering taking account of the properties of the materials to be soldered
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0244Powders, particles or spheres; Preforms made therefrom
    • B23K35/025Pastes, creams, slurries
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/30Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
    • B23K35/3006Ag as the principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/30Structure, shape, material or disposition of the layer connectors prior to the connecting process of a plurality of layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2103/00Materials to be soldered, welded or cut
    • B23K2103/08Non-ferrous metals or alloys
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2103/00Materials to be soldered, welded or cut
    • B23K2103/50Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26
    • B23K2103/56Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26 semiconducting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers
    • H01L2224/26122Auxiliary members for layer connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
    • H01L2224/26125Reinforcing structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers
    • H01L2224/26152Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/26155Reinforcing structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/27011Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/273Manufacturing methods by local deposition of the material of the layer connector
    • H01L2224/2731Manufacturing methods by local deposition of the material of the layer connector in liquid form
    • H01L2224/2732Screen printing, i.e. using a stencil
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/2901Shape
    • H01L2224/29016Shape in side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29075Plural core members
    • H01L2224/29076Plural core members being mutually engaged together, e.g. through inserts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29105Gallium [Ga] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29113Bismuth [Bi] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29118Zinc [Zn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29124Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29139Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/30Structure, shape, material or disposition of the layer connectors prior to the connecting process of a plurality of layer connectors
    • H01L2224/3051Function
    • H01L2224/30515Layer connectors having different functions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201Structure
    • H01L2224/32012Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32013Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201Structure
    • H01L2224/32012Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32014Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/325Material
    • H01L2224/32505Material outside the bonding interface, e.g. in the bulk of the layer connector
    • H01L2224/32507Material outside the bonding interface, e.g. in the bulk of the layer connector comprising an intermetallic compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83194Lateral distribution of the layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • H01L2224/8382Diffusion bonding
    • H01L2224/83825Solid-liquid interdiffusion
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8384Sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83909Post-treatment of the layer connector or bonding area
    • H01L2224/8392Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83909Post-treatment of the layer connector or bonding area
    • H01L2224/83948Thermal treatments, e.g. annealing, controlled cooling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83909Post-treatment of the layer connector or bonding area
    • H01L2224/83951Forming additional members, e.g. for reinforcing, fillet sealant
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0103Zinc [Zn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01031Gallium [Ga]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0105Tin [Sn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01083Bismuth [Bi]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01327Intermediate phases, i.e. intermetallics compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3512Cracking

Definitions

  • the invention relates to a connection arrangement of at least one electrical and / or electronic component with a joining partner, a composite element and a method for forming the
  • a base part e.g. Substrate or the like
  • the fixing of the electrical components is effected, for example, by a connecting layer, such as e.g. an adhesive, solder or sintered layer.
  • a connecting layer such as e.g. an adhesive, solder or sintered layer. Due to the difference between room, joining and operating temperature, the stiffness of the connecting layer and the greatly different expansion coefficients of, for example, IC and substrate, however, very high mechanical or thermo-mechanical stresses can arise in the electronic components. This can lead to a so-called "shell fracture" on the electronic component, in particular in the case of thermal loads, in which partial areas of the surface of the electronic component are broken off. This can lead to very short life of such electronic
  • Compound layer and the electronic component can already degrade in the enclosed by the round recesses area of the substrate.
  • the introduction of the dimples is an additional manufacturing step to
  • the arrangement described in this way is completely coated together with the bonding connections from the outside with a metal oxide film (SnO, AIO).
  • the thus coated assembly is further encapsulated by a polymeric material.
  • the metal oxide coating causes a stress reduction for the semiconductor chip.
  • Such a coating is expensive because it has to be applied over the entire assembly.
  • the application of the coating on the arrangement as a spatial structure is very complicated and difficult.
  • only methods can be used in which the areas adjacent to the arrangement can be omitted before such a coating.
  • the invention is based on the object to form a connection arrangement of an electrical and / or electronic component such that the component, in particular a semiconductor chip, temperature change resistant during operation, in particular within a circuit arrangement of a motor vehicle, can be used.
  • connection arrangement of at least one electrical and / or electronic component and by a
  • connection arrangement comprises at least one electrical and / or electronic component.
  • the at least one electrical and / or electronic component has at least one connection surface, which is connected in a material-locking manner by means of a connection layer to a joining partner.
  • the bonding layer may be, for example, an adhesive, solder, weld, sintered compound or other known compound which
  • connection arrangement Characteristic of the connection arrangement according to the invention is that a reinforcing layer is arranged cohesively adjacent to the connection layer.
  • the reinforcing layer has a higher one for this purpose
  • connection layer Elastic modulus, as the connecting layer.
  • the reinforcing layer accordingly prevents supercritical expansion of the connecting layer or of the at least one electrical and / or electronic component connected to the connecting layer.
  • a particularly large protective effect is given by the fact that the reinforcing layer is formed like a frame by an outer and an inner boundary and surrounds at least with its outer boundary, the connection surface of the at least one electrical and / or electronic component.
  • Frame-like in this context means in particular that the
  • Reinforcing layer by its outer and / or its inner boundary at least in one plane, in particular in a substantially parallel plane to the connection surface of the at least one electrical and / or electronic component, closed circumferential course.
  • the outer and / or inner boundary preferably extend substantially parallel to the outer contour of the connection surface.
  • the connection surface can also have a circular, oval or otherwise different base surface. It is particularly advantageous if the reinforcing layer is designed to be interruption-free. In this manner, different dimensions of the at least one electrical and / or electronic component, the connection layer and the joining partner, for example a carrier substrate, can be applied to them
  • connection layer can be prevented.
  • the reinforcing layer acts through the frame-like formation like a stiff belt, which can absorb forces, but does not allow deformations.
  • connection layer a
  • the reinforcement layer is arranged in this area region on the connection layer. It is particularly advantageous if the reinforcing layer arranged on this surface area extends with its inner boundary at least to the connection surface of the at least one electrical and / or electronic component. Furthermore, it is advantageous if, in this arrangement, the reinforcing layer is formed at least in regions such that the reinforcing layer additionally surrounds a housing of the at least one electrical and / or electronic component, at least over a minimum height.
  • the reinforcing layer limits the lateral extent of the connecting layer with its inner boundary.
  • the inner boundary of the reinforcing layer encloses the
  • Connecting layer at least partially or preferably completely over their
  • a partial limitation over the layer thickness of the connecting layer can be embodied, for example, such that the reinforcing layer is arranged adjacent to the connecting layer on the joining partner and has a lower layer thickness than the one
  • Connection layer to be arranged at least partially spatially integrated.
  • the side of the reinforcing layer pointing in the direction of the connecting surface of the at least one electrical and / or electronic component and / or the side of the reinforcing layer facing in the direction of the joining partner is at least partially, preferably completely, remote from the
  • Connection layer arranged reinforcing layer given improved possibility, both the vulnerable edge region of the pad and the housing of the at least one electrical and / or electronic
  • connection arrangement provides that the inner boundary of the reinforcing layer extends at least partially - preferably completely - to within the connection area of the at least one electrical and / or electronic component.
  • connection surface in the overlapping region is connected in a materially bonded manner to the reinforcement layer.
  • edge region of the connecting surface of the at least one electrical and / or electronic component is fixed directly to the reinforcing layer, so that the expansion possibilities of the Total construction element on the low expansion possibility of
  • Reinforcing layer are limited. As a result, the risk of crack formation and propagation within the component is maximally reduced.
  • the reinforcing layer is preferably dependent on the selected
  • connection layer For example, care must be taken that a cohesive connection can be formed between the connection layer and the reinforcement layer and preferably also between the connection surface of the at least one electrical and / or electronic component and / or the joining partner.
  • a cohesive connection can be formed between the connection layer and the reinforcement layer and preferably also between the connection surface of the at least one electrical and / or electronic component and / or the joining partner.
  • the connecting layer and the joining partner are absorbed by the reinforcing layer.
  • care must furthermore be taken that the reinforcing layer has a greater modulus of elasticity than the connecting layer.
  • connection arrangement provides a reinforcing layer, which comprises at least one intermetallic phase.
  • Intermetallic phases have a large covalent
  • a preferred connection arrangement according to the invention has a
  • Connecting layer which comprises at least one metal, for example a metallic sintered compound, in particular of silver.
  • the reinforcing layer is formed from a solder material, in particular a tin, bismuth, zinc, gallium or aluminum-based solder material, wherein after a temperature treatment of the bonding layer and / or the solder material, the reinforcing layer comprises or at least one intermetallic phase at least one metallic phase is formed and thus completely replaces the previous solder material.
  • the connecting layer for example embodied as a sintered shaped part
  • the solder layer in the form of a
  • connection arrangement is formed, which is then arranged to form the connection arrangement according to the invention between the at least one electrical and / or electronic component and the joining partner.
  • the solder layer is embodied like a frame within the composite element and arranged on the connection layer and / or arranged adjacent to the connection layer such that its inner boundary limits the lateral surface extent of the connection layer.
  • Connecting arrangement can be prepared in advance. Furthermore, ease of handling and placement are comparable to any electrical and / or electronic component.
  • the temperature treatment is preferably oriented according to the required solder profile. Overall, therefore, a very simple and cost-effective way is given, a temperature-resistant intermetallic phase by conventional
  • connection arrangement is particularly suitable for semiconductor components, for example made of silicon, in particular with a flat pad, for example IGBT, MOSFET, DIODEN and semiconductor chip.
  • Such components are fastened by means of the connection layer, for example on a DBC substrate (direct copper bonded), a metal stamped grid, an organic or ceramic circuit carrier or an IMS substrate (insulated metal substrates) as a joining partner.
  • the bonding layer in particular as a sintered layer, preferably has a layer thickness of 10 to 500 ⁇ m, in particular 10 to 300 ⁇ m, particularly preferably 10 to 100 ⁇ m.
  • the reinforcing layer may be in their
  • Layer thickness similar to the connection layer are performed. If a solder layer is selected as reinforcement layer, which in particular is replaced by a temperature treatment by at least one intermetallic phase should, smaller layer thicknesses are preferred, for example, 0.5 to 100 .mu.m, in particular 0.5 to 60 .mu.m, more preferably 1 pm to 30 pm.
  • connecting materials may be used which, among other things, allow the use of the formed connection assembly at high operating temperatures.
  • FIG. 1a shows schematically a first embodiment of the connection arrangement according to the invention in a side view
  • FIG. 1 b schematically the embodiment of FIG. La in a plan view
  • FIG. 2a shows a schematic representation of a second embodiment of the connection arrangement according to the invention in a side view
  • FIG. 2b shows schematically a third embodiment of the connection arrangement according to the invention in a side view
  • FIG. 2c shows schematically a fourth embodiment of the connection arrangement according to the invention in a side view.
  • connection arrangement 100 a circuit substrate 40, for example a DBC substrate, is provided.
  • a semiconductor chip 10 is materially connected to the DBC substrate.
  • the semiconductor chip 10 faces on the DBC substrate 40
  • connection surface 11 is used for example for electrical contacting of the semiconductor chip 10 and / or for the heat dissipation. For cohesive connection is between the
  • a sintered layer 20 made of silver can be in the form of a paste, for example, and can be applied to the DBC substrate 40 by means of known paste printing methods.
  • the sintered layer 20 may be formed as a sintered molded part and in the then firmly present and to the
  • Pad 11 adapted form are placed on the DBC substrate 40.
  • the sintered layer 20 is formed such that one of the pad 11 facing upper
  • Surface region 21 protrudes beyond the connection surface 11 of the semiconductor chip 10. As can be seen in the plan view in FIG. 1b, this surface region 21 projects generally on the side of the semiconductor chip 10. Furthermore, a tin-based solder layer 30 - for example made of this area region 21
  • solder layer 30 with an inner
  • the inner boundary 35 of the solder layer 30 extends as far as the connection area 11. Furthermore, the housing of the semiconductor chip 10 is surrounded by the solder layer 20 at the level of the layer thickness s.
  • the arrangement thus formed, in particular the sintered layer 20 and / or the solder layer 30, is heat-treated.
  • the temperature treatment is preferably carried out in the region of the melting temperature of the solder layer 30.
  • Boundary areas i. within the area 21, and form a
  • Reinforcing layer 30 ' comprising at least one intermetallic phase, from.
  • Ag3Sn forms as an intermetallic phase.
  • SnCu0.7 as solder material
  • both Ag3Sn and Cu6Sn5 form as intermetallic phases.
  • the solder layer 30 very thin with, for example, 50 ⁇ m, the metals and / or metal alloys of both layers 20, 30 can diffuse very far into the solder layer 30 during the temperature treatment.
  • a duration of the temperature treatment is selected, in which the solder layer 30 is substantially replaced by the formed at least one intermetallic phase and in this way the total
  • FIGS. 2a-2c show further exemplary embodiments of the invention
  • solder layer 30 is laterally adjacent to
  • Sintered layer 20 is applied to the DBC substrate.
  • the reinforcing layer 30 'formed after the temperature treatment bonds with both the sintered layer 20 and the DBC substrate.
  • the inner boundary 35 limits the lateral surface extent of the sintered layer 20.
  • Connecting arrangement 300 corresponding to FIG. 2b is similar to the second one Embodiment.
  • the sintered layer 20 in the third embodiment is made substantially flush with the connection surface 11 or the housing of the semiconductor chip 10.
  • the solder layer 30 is formed in its layer thickness at least in the region of the housing of the semiconductor chip 10 such that at least a minimum height of
  • Temperature treatment is then surrounded by the reinforcing layer 30 'on the other side.
  • the solder layer 30 is integrated within the sintered layer 20.
  • the side of the solder layer 30 facing the connection surface 11 ends flush with the sinter layer 20, which at least over the layer thickness s of the solder layer 30 through the inner layer
  • Limitation 35 is limited. Furthermore, the side of the solder layer 30 facing away from the connection surface is covered by the sintering layer 20. After the temperature treatment, the formed reinforcing layer 30 'integrally bonds both to the sintered layer 20 and to the surface area reaching into the connecting surface 11.
  • solder layer can in principle only after the formation of the cohesive connection of the electrical and / or electronic
  • Component such as the semiconductor chip 10, with the joining partner, for example, with the DBC substrate 40, applied and / or arranged.
  • solder layer 30 to the sintered layer 20 in the form of a
  • solder layer 30 Sinter molding or the lateral placement of the solder layer 30 adjacent to the connection layer 20 such that the solder layer 30 with its inner
  • Limiting 35 limits the lateral surface extent of the connection layer 20, can also already before the formation of the connection assembly 100, 200, 300, 400 carried out to form a composite element.
  • the composite element is arranged between the at least one electrical and / or electronic component, for example the semiconductor chip 10, and the joining partner, for example the DBC substrate, and then the temperature treatment for forming the reinforcing layer 30 'is carried out.
  • connection layer 20 may be a solder layer, for example, a tin, bismuth, zinc, gallium or aluminum-based soft solder.
  • the reinforcing layer 30 ' may be formed from a metal layer, in particular tin, silver, copper, zinc, bismuth, gallium and / or aluminum, which is applied, for example, by a chemical and / or physical coating process.
  • materials for the connection layer 20 and the reinforcement layer 30 ' may be selected such that, due to a temperature treatment and the diffusion processes occurring between the two layers 20, 30, the reinforcement layer 30' comprises at least one intermetallic phase.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Casings For Electric Apparatus (AREA)
  • Die Bonding (AREA)

Abstract

L'invention concerne un système de connexion (100, 200, 300, 400) comprenant au moins un composant électrique et/ou électronique (1). Ledit au moins un composant électrique et/ou électronique (10) présente au moins une surface de raccordement (11) qui peut être reliée par liaison de matière à un partenaire d'assemblage (40) au moyen d'une couche de connexion (20). Ladite couche de connexion (20) peut être par exemple une connexion par collage, par brasage, par soudage, par frittage ou un autre mode de connexion connu, qui assemble des partenaires d'assemblage de manière à former un assemblage par liaison de matière. Une couche de renforcement (30') est en outre disposée par liaison de matière de manière adjacente à la couche de connexion (20). Ladite couche de renforcement (30') présente un module d'élasticité supérieur à celui de la couche de connexion (20). On obtient une action protectrice particulièrement élevée lorsque la couche de renforcement (30') est conçue sous forme de cadre par une délimitation extérieure et une délimitation intérieure (36, 35) et entoure par sa délimitation extérieure (36) la surface de raccordement (11) dudit au moins un composant électrique et/ou électronique (10).
EP13702765.2A 2012-02-09 2013-01-25 Système de connexion d'un composant électrique et/ou électronique Pending EP2812912A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102012201935A DE102012201935A1 (de) 2012-02-09 2012-02-09 Verbindungsanordnung eines elektrischen und/oder elektronischen Bauelements
PCT/EP2013/051400 WO2013117438A2 (fr) 2012-02-09 2013-01-25 Système de connexion d'un composant électrique et/ou électronique

Publications (1)

Publication Number Publication Date
EP2812912A2 true EP2812912A2 (fr) 2014-12-17

Family

ID=47666103

Family Applications (1)

Application Number Title Priority Date Filing Date
EP13702765.2A Pending EP2812912A2 (fr) 2012-02-09 2013-01-25 Système de connexion d'un composant électrique et/ou électronique

Country Status (5)

Country Link
US (2) US9177934B2 (fr)
EP (1) EP2812912A2 (fr)
CN (1) CN104094387B (fr)
DE (1) DE102012201935A1 (fr)
WO (1) WO2013117438A2 (fr)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102011083931A1 (de) * 2011-09-30 2013-04-04 Robert Bosch Gmbh Schichtverbund aus einem elektronischen Substrat und einer Schichtanordnung umfassend ein Reaktionslot
WO2014152533A1 (fr) * 2013-03-15 2014-09-25 Conformis, Inc. Composants pour implant du genou à stabilisation postérieure et instruments associés
JP2015115481A (ja) * 2013-12-12 2015-06-22 株式会社東芝 半導体部品および半導体部品の製造方法
US9875987B2 (en) 2014-10-07 2018-01-23 Nxp Usa, Inc. Electronic devices with semiconductor die attached with sintered metallic layers, and methods of formation of such devices
US9589860B2 (en) * 2014-10-07 2017-03-07 Nxp Usa, Inc. Electronic devices with semiconductor die coupled to a thermally conductive substrate
US9698116B2 (en) 2014-10-31 2017-07-04 Nxp Usa, Inc. Thick-silver layer interface for a semiconductor die and corresponding thermal layer
DE102015200989A1 (de) * 2015-01-22 2016-07-28 Robert Bosch Gmbh Verbindungsanordnung zwischen einem Trägerelement und einem elektronischen Schaltungsbauteil und Schaltungsträger
DE102015113421B4 (de) * 2015-08-14 2019-02-21 Danfoss Silicon Power Gmbh Verfahren zum Herstellen von Halbleiterchips
EP3154079A1 (fr) * 2015-10-08 2017-04-12 Heraeus Deutschland GmbH & Co. KG Procédé de connexion d'un agencement de substrat avec un composant électronique utilisant un moyen de pré-fixation sur une couche de matériau de contact, agencement de substrat correspondant et procédé de sa fabrication
KR20170059833A (ko) * 2015-11-23 2017-05-31 삼성전기주식회사 스트립기판 및 그 제조 방법
US10969118B2 (en) 2016-05-26 2021-04-06 Electrolux Home Products, Inc. Steam cooking appliance
US9941210B1 (en) 2016-12-27 2018-04-10 Nxp Usa, Inc. Semiconductor devices with protruding conductive vias and methods of making such devices
DE102018221148A1 (de) * 2018-12-06 2020-06-10 Heraeus Deutschland GmbH & Co. KG Verfahren zum Herstellen eines Substratadapters und Substratadapter zum Verbinden mit einem Elektronikbauteil
DE102019207341A1 (de) * 2019-05-20 2020-11-26 Robert Bosch Gmbh Elektronikbaugruppe und Elektronikanordnung
CN113133327B (zh) * 2019-10-31 2024-01-26 京东方科技集团股份有限公司 承接背板及其制备方法、背板
DE102020117678B3 (de) 2020-07-03 2021-08-12 Infineon Technologies Ag Halbleitervorrichtung mit heterogener lötstelle und verfahren zu ihrer herstellung
EP4208797A4 (fr) * 2020-09-02 2024-05-22 Qualcomm Incorporated Techniques d'économie d'énergie dans des dispositifs informatiques par commande de bus de communication
NL2027068B1 (en) * 2020-12-08 2022-07-07 Stichting Chip Integration Tech Centre Integrated circuit comprising improved die attachment layer
EP4047648A1 (fr) * 2021-02-18 2022-08-24 Siemens Aktiengesellschaft Module de puissance comprenant un composant de puissance connecté à un substrat par frittage et brasage et procédé de fabrication correspondant
DE102023202634A1 (de) 2023-03-23 2024-09-26 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren zur Herstellung eines Leitungsmoduls mit angesintertem Kühlkörper

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5244566A (en) * 1975-10-06 1977-04-07 Mitsubishi Electric Corp Method of alloying semiconductor pellet
JPS5966131A (ja) * 1982-10-08 1984-04-14 Nec Corp 半導体ペレツトの取付け構造
EP1039526A2 (fr) * 1999-03-24 2000-09-27 Ford Motor Company Procédé et article pour attacher un composant électronique opérant à haute température
JP2007109834A (ja) * 2005-10-13 2007-04-26 Fuji Electric Holdings Co Ltd 半導体装置およびその製造方法
US20110084384A1 (en) * 2009-10-14 2011-04-14 Renesas Electronics Corporation Semiconductor device and method for manufacturing the same

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0545009Y2 (fr) * 1987-04-06 1993-11-16
JPH01293539A (ja) * 1988-05-23 1989-11-27 Fuji Xerox Co Ltd 半導体装置におけるバンプの形成方法
JP2503282B2 (ja) * 1989-12-08 1996-06-05 富士通株式会社 受光素子キャリア及び該キャリアを有する受光モジュ―ル
JP2956617B2 (ja) * 1996-10-31 1999-10-04 日本電気株式会社 樹脂封止型半導体装置
JP2001230351A (ja) * 2000-02-14 2001-08-24 Shibafu Engineering Corp 電子モジュール用接合材料、モジュール型半導体装置及びその製造方法
DE102004058878A1 (de) * 2004-12-06 2006-06-14 Infineon Technologies Ag Halbleiterbauelement und Verfahren zum Herstellen eines Halbleiterbauelements
JP2007201314A (ja) * 2006-01-30 2007-08-09 Toyota Central Res & Dev Lab Inc 半導体装置
US8283756B2 (en) * 2007-08-20 2012-10-09 Infineon Technologies Ag Electronic component with buffer layer
JP2010171271A (ja) 2009-01-23 2010-08-05 Renesas Technology Corp 半導体装置およびその製造方法
US20110303448A1 (en) * 2010-04-23 2011-12-15 Iowa State University Research Foundation, Inc. Pb-Free Sn-Ag-Cu-Al or Sn-Cu-Al Solder
US8513798B2 (en) * 2010-09-09 2013-08-20 Infineon Technologies Ag Power semiconductor chip package
WO2012061182A1 (fr) * 2010-11-03 2012-05-10 3M Innovative Properties Company Dispositif souple à del avec pastille sans soudures de fils
US8736052B2 (en) * 2011-08-22 2014-05-27 Infineon Technologies Ag Semiconductor device including diffusion soldered layer on sintered silver layer
US8957521B2 (en) * 2011-12-27 2015-02-17 Panasonic Intellectual Property Management Co., Ltd. Mounted structure

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5244566A (en) * 1975-10-06 1977-04-07 Mitsubishi Electric Corp Method of alloying semiconductor pellet
JPS5966131A (ja) * 1982-10-08 1984-04-14 Nec Corp 半導体ペレツトの取付け構造
EP1039526A2 (fr) * 1999-03-24 2000-09-27 Ford Motor Company Procédé et article pour attacher un composant électronique opérant à haute température
JP2007109834A (ja) * 2005-10-13 2007-04-26 Fuji Electric Holdings Co Ltd 半導体装置およびその製造方法
US20110084384A1 (en) * 2009-10-14 2011-04-14 Renesas Electronics Corporation Semiconductor device and method for manufacturing the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2013117438A2 *

Also Published As

Publication number Publication date
US9177934B2 (en) 2015-11-03
US20160064350A1 (en) 2016-03-03
WO2013117438A3 (fr) 2013-10-03
DE102012201935A1 (de) 2013-08-14
CN104094387A (zh) 2014-10-08
WO2013117438A2 (fr) 2013-08-15
CN104094387B (zh) 2017-08-08
US20150014865A1 (en) 2015-01-15

Similar Documents

Publication Publication Date Title
WO2013117438A2 (fr) Système de connexion d'un composant électrique et/ou électronique
DE102009002065B4 (de) Lot mit intermetallische Phase aufweisenden Teilchen, Verfahrenzur Herstellung eines solchen Lots, Leistungshalbleitermodulmit stabiler Lötverbindung und Verfahren zur Herstellungeines solchen Leistungshalbleitermoduls
DE10013189B4 (de) Substrat für ein Leistungsmodul
DE112015006049B4 (de) Halbleiterbauteil und Verfahren zum Herstellen eines Halbleiterbauteils
DE102014213564B4 (de) Halbleitervorrichtung und Verfahren zu ihrer Herstellung
EP3103138B1 (fr) Procédé de montage d'un composant électrique en utilisant un capot
DE102012222791A1 (de) Verfahren zur Kontaktierung eines Halbleiters und Halbleiterbauelement mit erhöhter Stabilität gegenüber thermomechanischen Einflüssen
EP2761056B1 (fr) Assemblage stratifié constitué d'une feuille support et d'un ensemble stratifié comprenant une couche frittable constituée d'au moins une poudre métallique et une couche de métal d'apport
DE102014206608A1 (de) Verfahren zum Montieren eines elektrischen Bauelements, bei der eine Haube zum Einsatz kommt, und zur Anwendung in diesem Verfahren geeignete Haube
DE102010044709A1 (de) Leistungshalbleitermodul mit Metallsinter-, vorzugsweise Silbersinterverbindungen sowie Herstellungsverfahren
DE102009055691A1 (de) Leistungshalbleitermodul
DE102012211952B4 (de) Leistungshalbleitermodul mit mindestens einem stressreduzierenden Anpasselement
DE102017004626A1 (de) Bleifreie Lötfolie zum Diffusionslöten
DE2248303C2 (de) Halbleiterbauelement
DE102019211109A1 (de) Verfahren und Entwärmungskörper-Anordnung zur Entwärmung von Halbleiterchips mit integrierten elektronischen Schaltungen für leistungselektronische Anwendungen
DE102007021073B4 (de) Verfahren zum Herstellen einer Schaltungsanordnung
DE102004050792A1 (de) Bauelemente-Modul für Hochtemperaturanwendungen und Verfahren zum Herstellen eines derartigen Bauelemente-Moduls
DE102008055137A1 (de) Elektrisches oder elektronisches Verbundbauteil sowie Verfahren zum Herstellen eines elektrischen oder elektronischen Verbundbauteils
DE102010001666A1 (de) Elektrisches oder elektronisches Verbundbauteil
US9381595B2 (en) Pb-free solder and electronic component built-in module
DE102014206606A1 (de) Verfahren zum Montieren eines elektrischen Bauelements auf einem Substrat
DE10103084B4 (de) Halbleitermodul und Verfahren zu seiner Herstellung
DE102014115202B4 (de) Verfahren zum verlöten mindestens eines substrats mit einer trägerplatte
DE102009002100A1 (de) Elektrisches Bauelement
WO2008071576A2 (fr) Ensemble de circuits et procédé de production d'un ensemble de circuits

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20140909

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

DAX Request for extension of the european patent (deleted)
STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: EXAMINATION IS IN PROGRESS

PUAG Search results despatched under rule 164(2) epc together with communication from examining division

Free format text: ORIGINAL CODE: 0009017

17Q First examination report despatched

Effective date: 20190405

B565 Issuance of search results under rule 164(2) epc

Effective date: 20190405

RIC1 Information provided on ipc code assigned before grant

Ipc: H01L 23/488 20060101ALI20190402BHEP

Ipc: H01L 21/60 20060101AFI20190402BHEP

Ipc: B23K 35/30 20060101ALI20190402BHEP

Ipc: B23K 35/02 20060101ALI20190402BHEP

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: EXAMINATION IS IN PROGRESS

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: ROBERT BOSCH GMBH

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: EXAMINATION IS IN PROGRESS

P01 Opt-out of the competence of the unified patent court (upc) registered

Effective date: 20230509