EP2266149A1 - Verfahren zur unterfüllung von flip-chip-leds - Google Patents

Verfahren zur unterfüllung von flip-chip-leds

Info

Publication number
EP2266149A1
EP2266149A1 EP09722834A EP09722834A EP2266149A1 EP 2266149 A1 EP2266149 A1 EP 2266149A1 EP 09722834 A EP09722834 A EP 09722834A EP 09722834 A EP09722834 A EP 09722834A EP 2266149 A1 EP2266149 A1 EP 2266149A1
Authority
EP
European Patent Office
Prior art keywords
underfill material
led
led die
submount
underfill
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP09722834A
Other languages
English (en)
French (fr)
Other versions
EP2266149B1 (de
Inventor
Grigoriy Basin
Frederic Diana
Paul S. Martin
Dima Simonian
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Lumileds LLC
Original Assignee
Koninklijke Philips Electronics NV
Philips Lumileds Lighing Co LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=40677561&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=EP2266149(A1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Koninklijke Philips Electronics NV, Philips Lumileds Lighing Co LLC filed Critical Koninklijke Philips Electronics NV
Publication of EP2266149A1 publication Critical patent/EP2266149A1/de
Application granted granted Critical
Publication of EP2266149B1 publication Critical patent/EP2266149B1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/56—Materials, e.g. epoxy or silicone resin
EP09722834.0A 2008-03-17 2009-03-13 Unterfüllungsverfahren für flip-chip-led Active EP2266149B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/050,082 US20090230409A1 (en) 2008-03-17 2008-03-17 Underfill process for flip-chip leds
PCT/IB2009/051055 WO2009115968A1 (en) 2008-03-17 2009-03-13 Underfill process for flip-chip leds

Publications (2)

Publication Number Publication Date
EP2266149A1 true EP2266149A1 (de) 2010-12-29
EP2266149B1 EP2266149B1 (de) 2017-08-23

Family

ID=40677561

Family Applications (1)

Application Number Title Priority Date Filing Date
EP09722834.0A Active EP2266149B1 (de) 2008-03-17 2009-03-13 Unterfüllungsverfahren für flip-chip-led

Country Status (9)

Country Link
US (2) US20090230409A1 (de)
EP (1) EP2266149B1 (de)
JP (1) JP5372133B2 (de)
KR (1) KR101524004B1 (de)
CN (1) CN102084505B (de)
BR (1) BRPI0909788B1 (de)
RU (1) RU2502157C2 (de)
TW (1) TWI463701B (de)
WO (1) WO2009115968A1 (de)

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US8796075B2 (en) 2011-01-11 2014-08-05 Nordson Corporation Methods for vacuum assisted underfilling
CN102610703A (zh) * 2011-01-20 2012-07-25 陈惠美 光电元件的封装方法
US8952402B2 (en) * 2011-08-26 2015-02-10 Micron Technology, Inc. Solid-state radiation transducer devices having flip-chip mounted solid-state radiation transducers and associated systems and methods
US10043960B2 (en) * 2011-11-15 2018-08-07 Cree, Inc. Light emitting diode (LED) packages and related methods
CN102593317B (zh) * 2011-12-20 2014-12-24 西安炬光科技有限公司 一种高功率高亮度led光源封装结构及其封装方法
JP6470677B2 (ja) 2012-03-30 2019-02-13 コーニンクレッカ フィリップス エヌ ヴェＫｏｎｉｎｋｌｉｊｋｅ Ｐｈｉｌｉｐｓ Ｎ．Ｖ． 封止された半導体発光デバイス
JP5962285B2 (ja) 2012-07-19 2016-08-03 日亜化学工業株式会社 発光装置およびその製造方法
JP2014179569A (ja) * 2013-03-15 2014-09-25 Nichia Chem Ind Ltd 発光装置およびその製造方法
US9022607B2 (en) 2012-10-18 2015-05-05 Avago Technologies General Ip (Singapore) Pte. Ltd. Leadframe-based surface mount technology segmented display design and method of manufacture
SG11201601050PA (en) 2013-09-10 2016-03-30 Heptagon Micro Optics Pte Ltd Compact opto-electronic modules and fabrication methods for such modules
CN104600186A (zh) * 2013-10-31 2015-05-06 展晶科技(深圳)有限公司 发光二极管封装体的制造方法
US9653443B2 (en) * 2014-02-14 2017-05-16 Taiwan Semiconductor Manufacturing Company, Ltd. Thermal performance structure for semiconductor packages and method of forming same
US10056267B2 (en) 2014-02-14 2018-08-21 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate design for semiconductor packages and method of forming same
JP2015220342A (ja) * 2014-05-19 2015-12-07 住友電気工業株式会社 光半導体装置の製造方法及び光半導体装置の製造装置
US11311967B2 (en) * 2014-08-19 2022-04-26 Lumileds Llc Sapphire collector for reducing mechanical damage during die level laser lift-off
KR102572643B1 (ko) * 2015-05-13 2023-08-31 루미리즈 홀딩 비.브이. 다이 레벨의 레이저 리프트-오프 중에 기계적 손상을 줄이기 위한 사파이어 수집기
US9831104B1 (en) * 2015-11-06 2017-11-28 Xilinx, Inc. Techniques for molded underfill for integrated circuit dies
WO2017202331A1 (en) * 2016-05-25 2017-11-30 Chen-Fu Chu Methods of filling organic or inorganic liquid in assembly module
DE102017104851A1 (de) 2017-03-08 2018-09-13 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung von zumindest einem optoelektronischen Bauelement und optoelektronisches Bauelement
CN108630645A (zh) * 2017-03-17 2018-10-09 永道无线射频标签(扬州)有限公司 一种芯片和天线基材的接合结构及其制备方法
US11024611B1 (en) * 2017-06-09 2021-06-01 Goertek, Inc. Micro-LED array transfer method, manufacturing method and display device
US10672957B2 (en) 2017-07-19 2020-06-02 Cree, Inc. LED apparatuses and methods for high lumen output density
CN107424964A (zh) * 2017-07-27 2017-12-01 武汉市三选科技有限公司 底部填充组成物及使用其之底部填充方法与电子组装组件
JP7266178B2 (ja) * 2017-11-24 2023-04-28 日亜化学工業株式会社 半導体装置の製造方法
KR20190084807A (ko) * 2018-01-09 2019-07-17 서울바이오시스 주식회사 발광 장치
JP7236807B2 (ja) * 2018-01-25 2023-03-10 浜松ホトニクス株式会社 半導体装置、及び半導体装置の製造方法
US10453827B1 (en) 2018-05-30 2019-10-22 Cree, Inc. LED apparatuses and methods
US11101410B2 (en) 2018-05-30 2021-08-24 Creeled, Inc. LED systems, apparatuses, and methods
US20210399041A1 (en) * 2020-06-18 2021-12-23 Seoul Semiconductor Co., Ltd. Light emitting module having a plurality of unit pixels, method of fabricating the same, and displaying apparatus having the same
US20220149246A1 (en) * 2020-11-12 2022-05-12 Seoul Semiconductor Co., Ltd. Light emitting module and method of manufacturing the same and display apparatus having the same
CN113524473B (zh) * 2021-07-09 2023-10-20 苏州晶方半导体科技股份有限公司 光学基板的切割方法

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Also Published As

Publication number Publication date
CN102084505A (zh) 2011-06-01
KR20100129771A (ko) 2010-12-09
WO2009115968A1 (en) 2009-09-24
TW200950158A (en) 2009-12-01
CN102084505B (zh) 2013-05-01
US20110223696A1 (en) 2011-09-15
BRPI0909788B1 (pt) 2019-11-05
RU2010142267A (ru) 2012-04-27
JP5372133B2 (ja) 2013-12-18
EP2266149B1 (de) 2017-08-23
BRPI0909788A2 (pt) 2015-10-06
JP2011514688A (ja) 2011-05-06
TWI463701B (zh) 2014-12-01
US8273587B2 (en) 2012-09-25
US20090230409A1 (en) 2009-09-17
KR101524004B1 (ko) 2015-05-29
RU2502157C2 (ru) 2013-12-20

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