EP2018671B1 - Low optical loss electrode structures for leds - Google Patents

Low optical loss electrode structures for leds Download PDF

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EP2018671B1
EP2018671B1 EP06802931.3A EP06802931A EP2018671B1 EP 2018671 B1 EP2018671 B1 EP 2018671B1 EP 06802931 A EP06802931 A EP 06802931A EP 2018671 B1 EP2018671 B1 EP 2018671B1
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electrode
semiconductor
layer
led
dielectric material
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French (fr)
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EP2018671A4 (en
EP2018671A1 (en
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Frank T. Shum
William W. So
Steven D. Lester
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Bridgelux Inc
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Bridgelux Inc
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    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present invention relates generally to light emitting diodes (LEDs).
  • the present invention relates more particularly to electrode structures that mitigate optical losses and thus tend to enhance the brightness and/or the efficiency of LEDs.
  • LEDs Light emitting diodes
  • VCRs video recorders
  • Such contemporary LEDs have proven generally suitable for their intended purposes, they possess inherent deficiencies that detract from their overall effectiveness and desirability. For example, the light output of such contemporary LEDs is not as great as is sometimes desired. This limits the ability of contemporary LEDs to function in some applications, such as providing general illumination, e.g., ambient lighting. Even high power contemporary LEDs do not provide sufficient illumination for such purposes.
  • Efficiency of LEDs is a measure of the amount of light provided as compared to the electrical power consumed.
  • Contemporary LEDs are not as efficient as they can be because some of the light generated thereby is lost due to internal absorption. Such internal absorption limits the amount of light that can be extracted from an LED and thus undesirably reduces the efficiency thereof.
  • DE 10 2004 040277 A1 which describes a method for producing a reflective layer system and a reflective layer system for application to a III/V compound semiconductor material, wherein a first layer, containing phosphosilicate glass, is applied directly to the semiconductor substrate. Disposed thereon is a second layer, containing silicon nitride. A metallic layer is then applied thereto.
  • EP 1 583 159 A2 which describes a luminous lamination structure including a first layer made of n-type nitride semiconductor and a second layer made of p-type nitride semiconductor and disposed over the first layer wherein a luminous region is defined between the first and second layers.
  • the second layer is removed to expose the first layer in a first area which is a partial surface of the first layer.
  • a p-side electrode is disposed on a surface of the second layer and electrically connected to the second layer.
  • An insulating film covers the p-side electrode.
  • An n-side electrode electrically connected to the first layer is disposed in the first area.
  • a reflection film disposed on the insulating film extends to the n-side electrode and electrically connected to the n-side electrode.
  • the reflection film is made of silver containing alloy or silver.
  • the current invention concerns a semiconductor LED having an electrode structure according to claim 1 and a method of fabricating the same according to claim 17.
  • the electrode can be formed upon a semiconductor material that emits light having a central wavelength ⁇ . This light is emitted in all directions.
  • a comparatively thick, optically transmissive dielectric material can be formed upon the semiconductor material.
  • a portion of the electrode can be formed over the comparatively thick dielectric material.
  • Another portion of the same electrode can be in electric contact with the semiconductor material. The electrode cooperates with the thick dielectric to enhance reflection such that light emitted in the direction of the electrode is reflected back into the semiconductor material and thus has another opportunity to be extracted from the LED.
  • wavelength ( ⁇ ) refers to the wavelength of light inside of the material that the light is traveling within. Thus, if light within a semiconductor material is being referred to, for example, then the wavelength of this light is its wavelength within the semiconductor material.
  • the thick dielectric thickness can be greater than 1 ⁇ 2 ⁇ , where ⁇ is the Wavelength of light inside of the thick dielectric material.
  • the thick dielectric material can have an index of refraction that is lower than that of the semiconductor material and that is greater than or equal 1.0
  • the light emitting semiconductor material can comprise AIGaAs, AlInGaP, AlInGaN, and/or GaAsP, for example. Other materials can similarly be suitable.
  • the optically transmissive thick dielectric layer can be a comparatively thick layer of material such as silicon dioxide, silicon monoxide, MgF 2 and siloxane polymers, and/or air, for example. Other materials can similarly be suitable.
  • the ohmic contact layer can comprise indium tin oxide (ITO), nickel oxide, and/or RuO 2 , for example. Other materials can similarly be suitable.
  • ITO indium tin oxide
  • RuO 2 nickel oxide
  • Other materials can similarly be suitable.
  • the ohmic contact layer can be part of the semiconductor device comprising of a heavily doped layer.
  • the current spreading layer can be composed of indium tin oxide, nickel oxide, RuO 2 , for example. Other materials can similarly be suitable.
  • a series of one or more pairs of DBR dielectric layers can be formed between the thick dielectric layer and the metal electrode such that each DBR dielectric layer of this pair can be optically transmissive, of different indices of refraction from each other, and/or odd multiples of about 1 ⁇ 4 ⁇ thick.
  • Each layer of the pairs of DBR dielectric material can comprise titanium dioxide TiO 2 , Ti 3 O5, Ti 2 O 3 , TiO, ZrO 2 , TiO 2 ZrO 2 Nb 2 O 5 , CeO 2 , ZnS, Al2O 3 , SiN niobium pentoxide (Nb 2 O 5 ), tantalum pentoxide (Ta 2 O 5 ), siloxane polymers SiO, SiO 2 , and/or MgF 2 , for example. Other materials can similarly be suitable.
  • the metal electrode can be comprise one or more metal layers, wherein each metal layer can be selected from a group consisting of Al, Ag, Rh, Pd, Cu, Au, Cr, Ti, Pt nickel/gold alloys, chrome/gold alloys, silver/aluminum mixtures and combinations thereof. Other materials can similarly be suitable.
  • the LED can have either a vertical or lateral structure.
  • a portion of the metal electrode can form an area for wire bonding.
  • a portion of the metal electrode can make an electrical contact to the semiconductor material at the edges of the thick dielectric material.
  • a portion of the metal electrode makes an electrical contact to the semiconductor material through openings in the thick dielectric material.
  • a reflective electrode structure for an LED comprises a metal electrode.
  • a GaN material emits light about some central wavelength A.
  • a comparatively thick silicon dioxide material can be formed upon the GaN material.
  • a portion of the electrode can be formed over the thick dielectric material.
  • Another portion of the same electrode can be in ohmic contact with a semiconductor material.
  • the thick dielectric can have a thickness greater than 1/2 ⁇ . Both the dielectric material and the metal electrode can make physical contact to the semiconductor via an ITO layer or other materials than can be similarly suitable.
  • a reflective electrode structure comprises a metal electrode and a GaN material emits light about some central wavelength A.
  • a thick silicon dioxide material can be formed upon the GaN material.
  • a series of at least one DBR pair can be formed upon the thick silicon dioxide material.
  • a portion of the electrode can be formed over both the thick dielectric material and the DBR pairs. Another portion of the same electrode can be in ohmic contact with the semiconductor material.
  • the thick dielectric thickness can be greater than 1/2 ⁇ .
  • Each layer of the DBR pairs can be optically transmissive, of different indices of refraction with respect to one another, and can be odd multiples of about 1 ⁇ 4 ⁇ in thickness. Both the thick dielectric and the metal electrode can make physical contact to the semiconductor via an ITO layer.
  • a brighter and/or more efficient LED can be provided.
  • Increasing the brightness and/or efficiency of LED enhances their utility by making them more suitable for a wider range of uses, including general illumination.
  • LEDs Light emitting devices emit light in response to excitation by an electrical current.
  • One typical LED has a heterostructure grown on a substrate by metal-organic vapor phase epitaxy or a similar technique.
  • An LED heterostructure includes n-type and p-type semiconductor layers that sandwich a light producing layer, i.e., an active region. Exemplary active areas may be quantum wells surrounded by barrier layers.
  • electrical contacts are attached to the n-type and p-type semiconductor layers. When a forward bias is applied across the electrical contacts electrons and holes flow from n-type and p-type layers to produce light in the active region. Light is produced according to well known principles when these electrons and holes recombine with each other in the active region.
  • the efficiency with which a LED converts electricity to light is determined by the product of the internal quantum efficiency, the light-extraction efficiency, and losses due to electrical resistance.
  • the internal quantum efficiency is determined by the quality of the semiconductor layers and the energy band structure of the device. Both of these are determined during deposition of the semiconductor layers.
  • the light extraction efficiency is the ratio of the light that leaves the LED chip to the light that is generated within the active layers.
  • the light extraction efficiency is determined by the geometry of the LED, self-absorption of light in semiconductor layers, light absorption by electrical contacts, and light absorption by materials in contact with the LED that are used to mount a device in a package.
  • Semiconductor layers tend to have relatively high indices of refraction. Consequently, most of the light that is generated in the active region of an LED is internally-reflected by surfaces of a chip many times before it escapes. To achieve high light-extraction efficiency it is important to minimize absorption of light by the semiconductor layers and by electrical connections to the chip. When these layers are made to have very low optical absorption, by being transparent or highly reflective, the overall light extraction in an LED is improved substantially.
  • light inside of a high index of refraction medium 11 is incident at interface to a lower index of refraction medium 12.
  • the light can be incident at different angles.
  • the light can either be transmitted into the lower index of refraction medium 12 or be reflected back into the higher index of refraction medium 11.
  • TIR total internal reflection
  • Typical semiconductor materials have a high index of refraction compared to ambient air (which has an index of refraction of 1.0), or encapsulating epoxy (which can have an index of refraction of approximately 1.5).
  • this light is reflected back into the LED chip where further absorption can undesirably occur from other materials. This undesirable absorption reduces the efficiency of the LED by reducing the amount of light that the LED provides.
  • GaN Gallium Nitride
  • the term electrode can refer to a conductor (such as a metal conductor) that supplies current to a semiconductor material of an LED.
  • an electrode can be in electrical contact with the semiconductor material.
  • not all portions of an electrode are necessarily in contact with the semiconductor material. Indeed, according to one or more embodiments of the present invention, a portion of an electrode is in electrical contact with the semiconductor material and another portion of an electrode is not in electrical contact with the semiconductor.
  • Electrodes 23 and 24 provide a means to provide electrical power to LED 20.
  • the electrical contact to p-layer 21 and n-layer 22 must be made from the top surface.
  • n-layer 21 is already exposed at top surface and electrical contact can be readily made therewith.
  • n-layer 22 is buried beneath both p-layer 21 and active region 26.
  • a cutout area 28 is formed by removing a portion of p-layer 21 and active layer 26 (the removed portion is indicated by the dashed lines) so as to expose n-layer 24 therebeneath. After the creation of cutout area 28, the n-layer electrical contact or electrode 24 can be formed.
  • Such device structures as that shown in Figure 2 result in the current flowing generally in the lateral direction. This is why they are referred to as lateral structures.
  • One disadvantage of such lateral structures is that a portion of the active light producing region must be removed to produce the cutout structure 28 so the n-electrode 24 can be formed. Of course, this reduces the active region area and consequently reduces the ability of LED 20 to produce light.
  • an LED 30 can alternatively comprise structures where the semiconductor (comprised of a p-layer 31 and an n-layer 32 that cooperate to define an active region 36) is supported by an electrically conductive substrate 37.
  • Substrate 37 can be formed of an optically transparent conductive material such as silicon carbide or can be formed of an optically non-transparent, electrically conductive substrate such as copper or molybdenum.
  • Such LEDs can be configured to have either the n-layer, or p-layer in contact with the substrate.
  • electrically conductive substrate 37 serves as one electrode while the other electrode 33 can be readily formed on the top surface, e.g. p-layer 31. Since the contacts or electrodes are on opposing surfaces of LED 30, current flow is in a generally vertical direction. Such devices are thus referred to as vertical structures.
  • metal electrodes are for vertical or lateral LED structures, they must satisfy similar requirements. These requirements include good adhesion, the ability to make ohmic contact to the semiconductor, good electrical conductivity, and good reliability. Often, these requirements are satisfied by using two or more layers. For example a first layer of metal such as chromium or titanium can provide good adhesion and ohmic contact. A second layer of metal such as silver or gold can provide good electrical conductivity.
  • a first layer of metal such as chromium or titanium can provide good adhesion and ohmic contact.
  • a second layer of metal such as silver or gold can provide good electrical conductivity.
  • chromium has good adhesion and gold is a good electrical conductor. Neither material has good optical reflectivity in the visible region. The optical reflectivity and the corresponding optical absorption can be calculated from the refractive indices of these structures and their corresponding thicknesses.
  • the thickness can be assumed to be great enough such that optical interference effects are not an issue.
  • reflectivity calculations typically assume the incident and exit medium to be semi-infinite.
  • metal reflector layers where their thickness have not been specified, they are assumed to be thick enough, typically a few thousand nanometers, so that an insignificant amount of light reaches the other surface of the metal.
  • the refractive index values of Table 1 are used to calculate all reflectivity curves in this disclosure.
  • Table 1 Dielectric Material Abbreviation Wavelength (nm) Refractive Index (Real) Refractive Ir (Imaginary) Aluminum Al 450 0.49 -4.7 Titanium Dioxide TiO 2 450 2.57 -0.0011 Silicon Dioxide SiO 2 450 1.465 0 Air Air 450 1 0 Gold Au 450 1.4 -1.88 Chromium Cr 450 2.32 -3.14 Indium Tin Oxide ITO 450 2.116 -0.0047 Titanium Ti 450 2.27 -3.04 Silver Ag 450 0.132 -2.72 Gallium Nitride GaN 450 2.45 Nano Porous Silicon Dioxide SiO 2_ Nano 633 1.1 0 Titanium Dioxide TiO 2 633 2.67 0 Gallium Phosphide GaP 633 3.31 0 Silicon Dioxide SiO 2 633 1.456 0
  • the thickness of materials as referenced in this disclosure can be in absolute units, T ABS , such as microns ( ⁇ m) or nanometers (nm).
  • T ABS the thickness of material can be given relative to the number of wavelengths in the medium, T 1Rel .
  • the parameter specifically refers to the wavelength of light within the material itself. This can be converted to the absolute thickness by multiplying by the index of refraction of the material (N) as indicated by Equation 1 below. For example a 1 ⁇ 4 ⁇ of SiO 2 at 450 nm would be 76.8 nm (0.25 450 / 1.465).
  • T ABS T ⁇ Rel / N ⁇ ⁇
  • the optically reflectivity curve as a function of incident angle has two components, i.e., P-polarized light and S-polarized light.
  • P-polarized light experiences Brewster's angles and has a lower overall reflectivity than S-polarized light.
  • FIG. 4A a diagram of a contemporary semiconductor and electrode structure showing the reflectivity of an electrode 44 for light originating within the semiconductor 41 is provided.
  • the electrode utilizes a typical chromium 42 and gold 43 electrode configuration and is formed upon a GaN semiconductor 41. For a reflection at an incident angle of 45 degrees, an average of only 25% of the P-polarized and S-polarized light is reflected while, 75% of the light is absorbed. Thus, this contemporary configuration is undesirably highly absorbing.
  • Figure 4A shows a gold/chromium metal electrode structure formed upon GaN, other metals and semiconductor materials can alternatively be utilized.
  • a chart shows reflectivity at the GaN/Cr/Au interface of the device of Figure 4A for different angles of incidence.
  • the metal contact 53 may have multiple layers for purposes for adhesion, diffusion barrier, solder, electrical conductivity, and ohmic contact.
  • the layers can be fabricated from various metals and combinations of metals, including nickel, platinum, titanium, silver, aluminum, gold, tin, lead, and chromium.
  • the semiconductor material 51 can be from the material systems such as AlGaAs, AlInGaP, AlInGaN, and GaAsP.
  • the ohmic contact layer can be part of the metal electrode layers such as nickel oxide.
  • an electrically conductive metal oxide such as indium tin oxide or nickel oxide can be deposited on entire surface of semiconductor 55 to define an ohmic contact/current spreading layer 56 upon which metal electrode 57 can be formed.
  • layer 56 serves both as an ohmic contact and current spreading layer.
  • metal electrodes undesirably absorb some light.
  • metal contacts are not transparent, they block the available surface area where light can escape.
  • Such -contemporary electrodes have a double effect. They not only directly absorb a portion of the incident light, but the remaining reflected light is directed back into the device where it suffers further absorption by other materials. The total amount of absorption is highly dependent on the exact configuration of the electrode and tends to scale proportionally to the size of the electrode contact area.
  • the p-layer and n-layer of contemporary LEDs are thin and have relatively low electrical conductivity. By themselves, these layers do not evenly distribute current to all regions of the p-n junction, i.e., the active region. For larger areas where portions of the active region are far away from the electrode, there will be less current flow in these distant areas than in areas close to the metal contact. This results in uneven current distribution and consequent uneven light emission.
  • the geometry of the metal electrodes is extended over the semiconductor surface. These extensions however lead to additional undesirable light absorption.
  • a circular contact or electrode 62 can be formed upon a semiconductor 61 and can serve as a wire bond pad.
  • a cross shaped contact 63 can be combined with electrode 62 to enhance current spreading.
  • various other geometrical structures 63 can similarly be combined with electrode 62 to facilitate current spreading, especially on larger LED dies.
  • wire bonds are used as a means to provide electric power the LED.
  • the wire bond pad areas must be some minimum size of about 100 ⁇ m by 100 ⁇ m. Since the size of each wire bond pad is fixed regardless of device size, the absorbing and opaque wire bond areas can be a significant portion of the overall surface area and for same LED devices.
  • One method for reducing the undesirable absorption of light by an electrode is to minimize the contact area or the width of the electrode. If electrical connection to the LED semiconductor material is the only consideration, then the contact width can be quite narrow, such as on the order of a few microns. However, an important consideration is the undesirable increase of electrical resistivity caused by decreasing the cross sectional area. In high power applications, the electrode may carry an amp or more of current. This requires the cross sectional area, width (W) x thickness (T) to be of some minimum value to minimize electrical resistance. Thus, the contact area or width of the electrode cannot merely be reduced without otherwise compensating for the increase in resistivity of the electrode.
  • the aspect ratio of electrode 77 can be increased. That is, the height of electrode 77 can be increase as compared to the width thereof. For example, the height can be increase so as to provide a thickness greater than 2.5 ⁇ m. In this manner, the area of electrode 74 that is in contact with semiconductor 75 (and is thus available for light absorption) is reduced and light absorption is consequently similarly reduced.
  • Increasing the height of electrode 77 desirably maintains its conductivity.
  • the contact area has been decreased and the thickness of the electrode has been increased so as to maintain desired conductivity.
  • manufacturing cost and practical process considerations typically limit electrode thickness to 2.5 ⁇ m or below. Thus the electrode contact area and its associated absorption become much greater than would be necessary if the electrode was used for only electrical contact to the semiconductor material.
  • Another method for reducing electrode absorption is to increase the reflectivity of the electrode.
  • Several prior art approaches have been used to create reflective electrodes for LEDs. The simplest is to use a metal that has a high reflectivity. These include Al, Ag, Re and others known to one familiar with the art.
  • the chosen metal needs to not only have a high reflectance, but must also make an acceptably low resistance ohmic contact to the semiconductor material.
  • p-type AlInGaN only Ag combines low electrical resistance with high reflectivity.
  • an electrode structure comprised of Ag is shown. That is, an Ag electrode 82 is formed upon a semiconductor substrate 81.
  • Ag presents a reliability concern because it is subject to tarnish and it is subject to electromigration during device operation. Also, the contact resistance of Ag-based contacts sometimes increases with time during device operation.
  • a 1/4 A layer of dielectric 103 i.e., SiO 2
  • the dielectric 103 is formed between a GaN semiconductor 104 and an Ag metal layer 102, both of which are formed upon a conductive holder 101.
  • the use of a 1/4 ⁇ of dielectric does not substantially enhance reflectivity.
  • the use of the 1/4 A layer of dielectric does provide enhanced reflectance for the S polarized light incident thereon, as indicated by curve 153.
  • the P polarized light incident upon this dielectric layer has a deep dip in the reflectance curve around 47°, as indicated by curve 152. This dip substantially reduces the overall reflectivity, as indicated by the curve 151 for the average of the S polarized and the P polarized light. Therefore, the use of a 1/4 A layer of dielectric is not a suitable solution to the problem of light absorption by an LED electrode.
  • a reflective electrode structure minimizes contact area between the electrode and the LED semiconductor material.
  • a comparatively thick dielectric material is disposed between a conductive electrode and the semiconductor material so as to electrically isolate portions of the electrode while allowing for other portions to make electrical contact.
  • the dielectric material can be of a lower index of refraction than the semiconductor and can be thick enough such that total internal reflection occurs for incident angles greater than the critical angle ⁇ c , as discussed below.
  • Total internal reflection for dielectric materials provides the desirable capability for approximately 100% reflectivity. Total internal reflection occurs beyond the critical angle, ⁇ c . In the case of a GaN to air interface, the critical angle is approximately 24°. In the case of a GaN to SiO 2 interface, the critical angle is approximately 37°.
  • FIG. 10A a semi-schematic diagram shows light reflection at a GaN/air. A ray of light is shown being reflected from the interface back into the GaN semiconductor material 121 because the angle of incidence is greater than the critical angle ⁇ c .
  • FIG. 10B a chart shows reflectivity at the GaN/air interface of Figure 10A for different angles of incidence.
  • FIG. 11A a semi-schematic diagram shows light reflection at a GaN/SiO 2 interface according to an embodiment of the present invention.
  • a ray of light is shown being reflected from the interface of the GaN semiconductor material 131 and the SiO 2 layer 132 back into the GaN semiconductor material 131 because the angle of incidence is greater than the critical angle ⁇ c .
  • FIG. 11B a chart shows reflectivity at the GaN/SiO 2 interface of Figure 11A for different angles of incidence according to an embodiment of the present invention.
  • FIG 12A is a semi-schematic diagram show light reflection at a GaN/ SiO 2 /Al interface according to an embodiment of the present invention.
  • a portion of electrode 173 is suspended over GaN substrate 171 and has a thick dielectric SiO 2 layer 172 formed therebetween.
  • Another portion of electrode 173 is formed directly upon GaN substrate 171.
  • FIG. 12B is a chart showing the P-polarization reflectivity at the GaN/SiO 2 /Al interface of Figure 12A for different angles of incidence wherein thicknesses of the SiO 2 layer are less than or equal to 13 ⁇ 4 A according to an embodiment of the present invention.
  • a 1/16 ⁇ of SiO 2 there is no total internal reflection effect and the reflectivity is marginally worse than without the SiO 2 layer.
  • a 1/4 ⁇ of SiO 2 there is still no TIR effect and the reflectivity is dramatically worse.
  • 1/2 ⁇ of SiO 2 total internal reflection does occur for large incident angles but a tremendous dip in reflectivity occurs at approximately 38°.
  • 1% ⁇ total internal reflection occurs for the high angles of incidence and no noticeable dip in reflectivity. Since TIR begins at 1/2 ⁇ of SiO 2 , the term "thick" dielectric will refer to all dielectrics thicker or equal to 1/2 A.
  • FIG 12C is a chart showing reflectivity at the GaN/SiO 2 /Al interface of Figure 12A for different angles of incidence wherein thicknesses of the SiO 2 layer are greater than 13 ⁇ 4 the wavelength of incident light according to an embodiment of the present invention.
  • the dielectric layer is greater than this minimum thickness for total internal reflection, its exact thickness is not as critical as in conventional optical coatings based on interference. This allows for greater latitude in the manufacturing process.
  • Figure 12C shows the reflectivity curves of for a thick dielectric at two different thicknesses, one at 1.75 ⁇ , and the other at 1.85 ⁇ . The total internal reflection angle does not change.
  • a semi-schematic diagram shows light reflection at a distributed Bragg reflector (DBR) comprised of alternating layers of SiO 2 182 and TiO 2 183 on top of the thick dielectric SiO 2 base layer 185 according to an embodiment of the present invention.
  • An electrode 184 makes electrical contact to semiconductor material 181 and is the final layer onto top of the DBR stack.
  • Thick dielectric layer 185 is formed between the DBR stack and semiconductor material 181.
  • the thick dielectric creates an effective reflector at high angles. However, it does not substantially enhance the reflectivity below the critical angle. It is possible to add a distributed Bragg reflector (DBR) to reflect the light at these lower angles.
  • DBRs are typically fabricated using a series of alternating high index/low index dielectric materials. As shown in Figure 13A , a series of 2 pairs of 1 ⁇ 4 ⁇ SiO 2 and 1 ⁇ 4 A TiO 2 over a thick layer of 1 3 ⁇ 4 ⁇ SiO 2 enhances the reflectivity at lower angles. DBRs use optical interference to affect reflectivity, as result their thickness is more critical than the thickness of the underlying thick SiO 2 layer.
  • Table 2 below provides further information regarding the electrode materials utilized according to one or more embodiments of the present invention.
  • the reference wavelength for the coating thickness is 0.4500 microns.
  • the phase and retardance values are in degrees.
  • the coating has six layers.
  • the incident media is GaN.
  • the wavelength of the light used is 0.4500 microns.
  • FIG. 13B is a chart showing reflectivity at the DBR layers of Figure 13A for different angles of incidence according to an embodiment of the present invention compared to a design with only thick dielectric compared to a design with no thick dielectric and no DBR.
  • FIG 14 is a chart showing reflectivity of several materials for different angles of incidence according to an embodiment of the present invention as compared to prior art.
  • a Au metal layer with a Cr under layer has the worst reflectance as indicated by the lowest curve 1951.
  • Al is substantially better as indicated by curve 1952.
  • Ag is even better as indicated by curve 1953.
  • An Ag metal layer with a thick SiO 2 dielectric under layer has generally better reflectance than Ag, although curve 1954 dips below curve 1953 in some places.
  • An Ag metal layer with 2 pairs of DBR followed by with a thick SiO 2 has the best reflectance, as indicated by curve 1955.
  • Electrode 142a is suspended above a GaN substrate 141 such that a thick air gap 143a is formed therebetween. Electrode 142a is supported on both sides thereof.
  • Electrode 142b is suspended above the GaN substrate 141 such that a plurality of air gaps 143b are formed therebetween. Electrode 142a is supported on both sides and in the middle thereof.
  • Electrode 142c is suspended above the GaN substrate 141 such that a thick air gap 143c is formed therebetween. Electrode 142c is supported only on one side thereof.
  • Electrode 142d is suspended above the GaN substrate 141 and a thick SiO 2 layer 143d is formed therebetween. Electrode 142d is supported on both sides thereof.
  • Electrode 142e is suspended above the GaN substrate 141 and a plurality of sections of a thick SiO 2 layer 143e are formed therebetween. Electrode 142e is supported on both sides and in the middle thereof.
  • Electrode 142f is suspended above the GaN substrate 141 such that a thick SiO 2 layer 143f is formed therebetween. Electrode 142f is supported only on one side thereof.
  • FIG. 16A a semi-schematic diagram shows a first exemplary embodiment of a suspended electrode with an ohmic contact layer according to the present invention.
  • the structure of the electrode of Figure 16A is similar to that of Figure 15A , except for the addition of indium tin oxide (ITO) layer 144.
  • ITO indium tin oxide
  • FIG. 16B a semi-schematic diagram shows a second exemplary embodiment of a suspended electrode with an ohmic contact layer according to the present invention.
  • the structure of the electrode of Figure 16B is similar to that of Figure 16B , except for the addition of indium tin oxide (ITO) layer 144.
  • ITO indium tin oxide
  • FIG. 16C a semi-schematic diagram shows a third exemplary embodiment of a suspended electrode with an ohmic contact layer according to the present invention.
  • the structure of the electrode of Figure 16C is similar to that of Figure 15C , except for the addition of indium tin oxide (ITO) layer 144.
  • ITO indium tin oxide
  • FIG. 16D a semi-schematic diagram shows a fourth exemplary embodiment of a suspended electrode with an ohmic contact layer according to the present invention.
  • the structure of the electrode of Figure 16D is similar to that of Figure 15D , except for the addition of indium tin oxide (ITO) layer 144.
  • ITO indium tin oxide
  • FIG. 16E a semi-schematic diagram shows a fifth exemplary embodiment of a suspended electrode with an ohmic contact layer according to the present invention.
  • the structure of the electrode of Figure 16E is similar to that of Figure 15E , except for the addition of indium tin oxide (ITO) layer 144.
  • ITO indium tin oxide
  • FIG 16F a semi-schematic diagram shows a sixth exemplary embodiment of a suspended electrode with an ohmic contact layer according to the present invention.
  • the structure of the electrode of Figure 15F is similar to that of Figure 14F , except for the addition of indium tin oxide (ITO) layer 144.
  • ITO indium tin oxide
  • FIGS 17A-17D an exemplary, contemporary, lateral LED structure and the process for forming it are shown.
  • a pair of wire bond pads 1091 and 1092 facilitate the application of current to a semiconductor 1093.
  • Semiconductor 1093 is formed upon a substrate 1096.
  • Semiconductor 1093 comprises an p-layer 1097 and a n-layer 1098 (n-layer 1098 and p-layer 1097 are generally interchangeable for the purposes of this discussion)
  • the current causes active region 1094 to produce light according to well known principles.
  • the fabrication of the LED of Figure 9A comprises forming a semiconductor layer 1093 upon a substrate 1096.
  • Semiconductor layer 1093 comprises an n-layer 1098 and a p-layer 1097 (as shown in Figure 17A ).
  • a portion of p-layer 1097 is removed, such as by etching.
  • a sufficient amount of p-layer 1097 is removed so as to expose a portion of n-layer 1098 therebeneath. Removal of the portion of p-layer 1097 defines a cutout portion 1099. The formation of cut out 1099 leaves n-layer 1098 exposed.
  • wire bond pad 1091 is formed upon p-layer 1097 and wire bond pad 1092 is formed upon n-layer 1098.
  • wire bond pads 1091 and 1092 cover a comparatively large portion of the surface area of semiconductor 1093.
  • the electrode wire bond pads of a contemporary LED can be 100 ⁇ m x 100 ⁇ m. They thus absorb an undesirably large amount of the light produced by active region 1094.
  • the comparatively large cut out area 1099 that is required for wire bond pads 1092 undesirably reduces the size of active area 1094 and thus further reduces the amount of light produced by such contemporary LEDs. Since the size of each electrode is fixed regardless of device size, the undesirable light absorption can be a significant portion of the overall surface area, particularly for smaller LEDs.
  • a thick dielectric layer 1101 and 1102 is formed beneath wire bond pads 1091a and 1092a, respectively. Thick dielectric layers 1101 and 1102 enhance the reflectivity of wire bond pads 1091a and 1092a such that undesirable light absorption thereby is substantially decreased. A portion of each wire bond pad 1091a and 1092a remains in contact with semiconductor 1093 so as to facilitate current flow therethrough.
  • a thick dielectric layer is a layer having sufficient thickness such that effects of interference are not substantial. Moreover, as used herein a thick dielectric layer can have a thickness of greater than 1 ⁇ 4 ⁇ . For example, a thick dielectric layer can have a thickness equal or great then 1 ⁇ 2 ⁇ , approximately 1.5 ⁇ , approximately 1.75 ⁇ , or greater than 1.75 ⁇ .
  • semiconductor 1093 is formed upon substrate 1096 and cutout 1099 is formed in semiconductor 1093 as in Figures 17B and 17C .
  • thick dielectric layers 1101 and 1102 are formed upon p-layer 1097 and n-layer 1098, respectively. Thick dielectric layers 1101 and 1102 can be formed according to well known principles.
  • wire bond pad 1091a is formed so as to at least partially cover thick dielectric layer 1101 and wire bond pad 1092a is formed so as to at least partially cover thick dielectric layer 1102. As mentioned above, a portion of wire bond pads 1091a and 1092a contacts semiconductor 1093 therebeneath.
  • FIG. 19A-19E an exemplary lateral LED structure and the process for forming it according to an embodiment of the present invention are shown.
  • a thick dielectric layer 1101 and 1102a is formed beneath wire bond pads 1091a and 1092b, respectively. Thick dielectric layers 1101 and 1102a enhance the reflectivity wire bond pads 1091a and 1092b such that undesirable light absorption thereby is substantially decreased. A portion of each wire bond pad 1091a and 1092b remains in contact with semiconductor 1093 so as to facilitate current flow.
  • semiconductor 1093 is formed upon substrate 1096 and cutout 1099a is formed in semiconductor 1093 as in Figures 17B and 17C .
  • cutout 1099a is formed in an L-shaped configuration so as to mitigate the amount of surface area thereof. In this manner, less of the active area is sacrificed in the formation of cutout 1099a and the brightness of the LED is consequently enhanced.
  • a thick dielectric layer 1101 is formed upon the p-layer 1097.
  • Another thick dielectric layer 1102a is formed partially on the p-layer 1097 and partially on the n-layer 1098.
  • Thick dielectric layers 1101 and 1102a can again be formed according to well known principles. In this instance thick dielectric layer 1102a is formed downwardly, along the side of p-layer 1097 and active layer 1094 so as to electrically insulate wire bond pad 1092b therefrom. That is, thick dielectric layer 1102a is formed upon both p-layer 1097 and n-layer 1098, as well as the interface therebetween, i.e., active layer 1094. Thick dielectric layer 1102a stair steps downwardly from n-layer 1097 to n-layer 1098. This configuration of thick dielectric layer 1102a is best seen in the cross section of Figure 19A .
  • wire bond pad 1091a is formed so as to at least partially cover thick dielectric layer 1101 and wire bond pad 1092b is formed so as to at least partially cover thick dielectric layer 1102a.
  • wire bond pad 1092b is formed downwardly, insulated by and covering thick dielectric layer 1102a and electrically contacting n-layer 1098.
  • the configuration of wire bond pad 1092b is best seen in Figure 19A .
  • thick dielectric layers 1101 and 1102a substantially mitigate light absorption by wire bond pads 1091a and 1092b so as to enhance the brightness of the LED.
  • the reduced size of cutout 1099a provides a larger active area 1094, so as to further enhance the brightness of the LED.
  • a thick dielectric can be formed between at least a portion of each bond pad and/or electrode and the semiconductor material.
  • the thick dielectric material enhances reflectivity such that undesirable light absorption by the bond pad and/or electrode is substantially mitigated.
  • FIG. 20A a semi-schematic perspective view shows one embodiment of a suspended electrode structure according to an embodiment of the present invention.
  • a metal electrode 162 is formed upon a semiconductor 161.
  • a thick dielectric 163 is formed between metal electrode 162 and semiconductor 161.
  • a portion of electrode 162 is formed over thick dielectric 163 and a portion of electrode 162 contacts semiconductor 161 such that electrode 162 is in electrical contact with semiconductor 161.
  • FIG. 20B a semi-schematic perspective view shows another configuration of a suspended electrode structure according to an embodiment of the present invention.
  • This structure is generally similar to that of Figure 20A except that thick dielectric 163 is broken up such that portions of electrode 162 contact semiconductor is different places than in Figure 20A .
  • multiple contacts of electrode 162 to semiconductor 161 are provided.
  • various configurations of electrode 162 and thick dielectric 163, with electrode 162 contacting semiconductor 161 in various different places, are possible.
  • Figures 21A-24 show exemplary electrode structures that utilize thick dielectrics according to one or more embodiments of the present invention.
  • one or more layers of insulating dielectric can be formed under the bonds pads.
  • Some advantages of such construction include: the mitigation of current crowding, thus facilitating a simplified design; the minimization of light absorption because the dielectric layer(s) under the electrode can form a mirror; more efficient use of the emission area that is achieved by reducing the cutout area; a more easily scalable design for a large range of die sizes; comparatively low forward voltage; and more even current spreading.
  • Figures 21A-24 are implementations of an elongated chip. Such elongated chips can provide enhanced brightness with better efficiency.
  • Thick dielectric layers 1002 and 1003 can be formed under each of the bond pads 1006 (the p-bond pad, for example) and 1007 (the n-bond pad, for example). N-bond pad 1007 and n-electrode extension 1001 are formed upon an etched away portion of semiconductor material 1008 or cutout 1004
  • the thick dielectric layers 1002 and 1003 insulate the bond pads 1006 and 1007 from semiconductor material 1008 so as to mitigate current crowding. This results in an improved geometry for more even current flow. Hot spots that cause uneven brightness and can result in damage to the LED are substantially mitigated.
  • Such thick dielectric layers are not formed under conductive extensions 1001 and 1005 that define n-wiring and p-wiring respectively. Extensions 1001 and 1005 thus more evenly distribute current throughout semiconductor 1008. That is, the distance between the electrodes that provide current to the LED tends to be more equal according to one aspect of the present invention.
  • TIR total internal reflection
  • TIR and/or DBR structures as described above can substantially mitigate undesirable absorption of light under bond pads 1006 and 1007.
  • Such insulators (as well as insulating layers 1002 ands 1003) can be formed beneath bond pads 1006 and 1007 and not beneath extensions 1001 and 1005, so that current flow through semiconductor (and consequently the active region thereof) is more evenly distributed.
  • Bond pads 1006 and 1007 are not located exactly at the end of the wire traces or extensions 1001 and 1005. This is to show that bond pads 1006 and 1007 can be placed at any arbitrary location along the trace. Thus, bond pads 1006 and 1007 can be placed at the end, near the end, and/or in the middle of extensions 1001 and 1005. Any desired location of bond pads 1006 and 1007 can be used.
  • the area of cutout 1104 is reduced by putting the n-bond pad above the p-surface and separated form the p-surface by the thick dielectric. That is, at least a portion of the n-bond pad is not in cutout 1104 and cutout 1104 can thus be much smaller than in Figure 21A .
  • This thick dielectric must also cover the edges of the cutout to ensure isolation of the n- bond pad from the p-Layer. That is, the area of the cutout is reduced such that the size of the active area is increased. The larger emission area facilitated by using a smaller cutout 1004 can enable a greater power output.
  • the distance between the p and n electrodes may be too great, thus resulting in an undesirably high forward voltage.
  • the use of multiple electrodes may be beneficial.
  • Figures 22A-23C show various exemplary implementations of three electrode designs that can mitigate such undesirability high forward voltages.
  • the n-bond pad is shown split into two electrically isolated pads 1217 and 1218. In principle, they can be touching (and thus in electrical contact with one another) and thus effectively form a single pad. There can be two separate wire bonds, one to each of pads 1217 and 1218. However if a gap 1220 between pad 1217 and 1218 is small enough, then a single bond pad can be used to electrically connect bond pads 1217 and 1218 together. In this manner, any desired number of such electrodes can be used.
  • two n-bond pads 1217 and 1218 and a single p-bond pad 1219 can be used.
  • Two thick dielectric layers 1204 and 1283 can be formed between each bond pad 1219 and the semiconductor material 1280 disposed therebeneath.
  • a thick dielectric layer 1202 can be formed between bond pads 1217 and 1218 and the semiconductor material 1201 of cutout 1281.
  • the area of cutout 1201 is reduced with respect to that shown in Figure 22A in a manner analogous to that of Figure 21B .
  • two thick dielectric layers 1204 and 1283 can be formed between each bond pad 1219 and the semiconductor material 1280 disposed therebeneath.
  • a thick dielectric layer 1202 can be formed between bond pads 1217 and 1218 and the semiconductor material 1201 of cutout 1281.
  • p-wiring extension 1203 extends beneath n-bond pad thick dielectric 1202 such that a distal end 1230 of p-wiring extension extends to the right of thick dielectric 1202.
  • two thick dielectric layers 1204 and 1283 can be formed between each bond pad 1219 and the semiconductor material 1280 disposed therebeneath.
  • a thick dielectric layer 1202 can be formed between bond pads 1217 and 1218 and the semiconductor material 1201 of cutout 1281.
  • n-bond 1507 and thick n-bond pad dielectric 1503 are formed on cutout 1504 and p-bond pads 1511 and 1512 and thick p-bond pad dielectric 1501 are not formed on cutout 1504 (which is the opposite of the construction shown in Figures 22A-22C ).
  • the electrodes are reversed with respect to those shown in Figures 22A-22C .
  • n-bond pad 2403 and a p-bond pad 2404 are formed upon a semiconductor material 2401.
  • n-bond pad 2403 has a thick dielectric layer 2406 form between itself and semiconductor material 2401.
  • p-bond pad 2404 has a thick dielectric layer 2407 formed between itself and semiconductor material 2401.
  • a cutout 2402 facilitates contact of n-bond pad 2403 to the n-layer of semiconductor 2401.
  • a portion of n-bond pad 2403 can be formed outside of cutout 2402 (and thus upon the p-layer of semiconductor material 2401) and a portion of n-bond pad 2403 can be formed within cutout 2402 (to provide electrical contact with the n-layer).
  • a portion of thick dielectric layer 2406 can be formed outside of cutout 2402 (and thus upon the p-layer of semiconductor material 2401) and a portion of thick dielectric layer 2406 can be formed within cutout 2402.
  • n-bond pad 2403 and thick dielectric layer 2406 thus extend down the side of cutout 2402 from the n-layer to the p-layer of semiconductor material 2401, in a fashion similar to that of Figure 21B .
  • Such construction tends to minimize the size of cutout 2402 and thus tends to enhance the brightness and efficiency of the LED, as discussed above.
  • p-wiring or extension 2407 extends from p-pad 2404 so as to more uniformly distribute current through the active region of semiconductor 2401.
  • a portion of p-pad 2404 and all of extension 2407 can be formed directly upon semiconductor material 2401 (without a thick dielectric layer therebetween).
  • the thick dielectric can be non-perforated. That is, the dielectric can be continuous in cross-section. It can be formed such that it does not have any holes or perforations that would cause the thick dielectric to appear to be discontinuous in cross-section.
  • the dielectric material is porous.
  • thick dielectric materials which may otherwise be too dense (and thus have to high of an index of refraction) can be used by effectively reducing the density (and the effective index of refraction, as well) by making the dielectric material porous or non continuous.
  • one or more embodiments of the present invention provide a brighter and/or more efficient LED.
  • Increasing the brightness of an LED enhances its utility by making it better suited for use in a wide of applications.
  • brighter LEDs can be suitable for general illumination applications.
  • more efficient LEDs are desirable because they tend to reduce the cost of use (such as by reducing the amount of electricity required in order to provide a desire amount of light.

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US20190305189A1 (en) 2019-10-03
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US20100133575A1 (en) 2010-06-03
US9356194B2 (en) 2016-05-31
US7573074B2 (en) 2009-08-11
US20110008918A1 (en) 2011-01-13
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US20070145380A1 (en) 2007-06-28
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US20120235195A1 (en) 2012-09-20
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