EP1148405A1 - Linearer Regler mit niedriger Überspannung im Übergangszustand - Google Patents

Linearer Regler mit niedriger Überspannung im Übergangszustand Download PDF

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Publication number
EP1148405A1
EP1148405A1 EP01108258A EP01108258A EP1148405A1 EP 1148405 A1 EP1148405 A1 EP 1148405A1 EP 01108258 A EP01108258 A EP 01108258A EP 01108258 A EP01108258 A EP 01108258A EP 1148405 A1 EP1148405 A1 EP 1148405A1
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EP
European Patent Office
Prior art keywords
voltage
regulator
transistor
output
switch
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Granted
Application number
EP01108258A
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English (en)
French (fr)
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EP1148405B1 (de
Inventor
Nicolas Marty
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STMicroelectronics SA
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STMICROELECTRONICS
STMicroelectronics SA
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

Definitions

  • the present invention relates to regulators linear low dropout series LDO type (Low Drop Out Regulators).
  • Such regulators are the subject of various applications, especially in the field of telephones movable to deliver regulated voltage to circuits radio transmission-reception from a voltage power supplied by a rechargeable battery.
  • Figure 1 shows a classic regulator 10 whose output delivers a regulated voltage Vout at a load Z.
  • the load Z represents for example various radio circuits present in a mobile phone.
  • Regulator 10 is powered by a voltage Vbat, delivered here by the battery 1 of the mobile phone, and includes an amplifier differential 2 whose output drives the grid G of a PMOS type regulation transistor 3.
  • the floor of amplifier 2 output has a resistor internal Rg shown in dotted lines, or gate resistance, which determines the gain of amplifier 2 and the maximum current it can output.
  • Transistor 3 receives at its source S the voltage Vbat and its drain D, which is connected to the output of regulator 10, is connected to the anode of a filtering and stabilizing capacitor Cst voltage Vout, arranged in parallel with the load Z.
  • Amplifier 2 receives on its negative input a reference voltage Vref and on its positive input a feedback voltage Vfb (feedback), for example a fraction of the voltage Vout brought back to the input of amplifier 2 via a divider bridge voltage comprising two resistors R1, R2.
  • the gate resistance Rg of the output stage of amplifier 2 must be chosen with a high value, for example 100K ⁇ , in order to limit the maximum current circulating in the output stage in the high state.
  • the regulation transistor 3 must have a low series resistance RdsON in the on state (drain-source resistance) in order to be able to deliver a large current without an unacceptable drop in voltage across its terminals.
  • the transistor 3 conventionally has a high width-to-length ratio of the gate, for example a gate width W of 2 10 5 micrometers for a gate length L of 0.6 micrometers, which represents a W / L ratio of l 'order of 3 10 5 and a very large transistor width. Because of its size and its high W / L ratio, the transistor 3 also has a high gate capacity Cg, shown in dotted lines in FIG. 1, of the order of 100 to 200 picofarads.
  • Figures 2A, 2B, 2C illustrate a phenomenon of overvoltage appearing at the mobile phone regulator output when the phone transmits at regular intervals, for example every 4 milliseconds, bursts of data or "GSM burst".
  • Figure 2A shows the voltage of Vbat battery whose nominal value Vbatnom is here from 3.5 v.
  • FIG. 2B represents the gate voltage Vg whose value oscillates in the vicinity of a voltage Vgnom equal to Vbat-Vtp when the regulator is stabilized, here 2.8 V if the threshold voltage Vtp of the transistor is 0.7 V.
  • Figure 2C shows the voltage output Vout whose nominal value Voutnom is here 2.8 V when the regulator is stabilized.
  • the radio circuits of the telephone enter service to issue a salvo.
  • the flow consumed is very important and the voltage Vbat drops suddenly below the nominal value Voutnom (fig. 2A) due to the internal resistance of the drums.
  • Amplifier 2 is unbalanced, the voltage Vg goes to 0 (fig. 2B), the gate capacity Cg is fully discharged and transistor 3 is on.
  • the regulator 10 thus operates in follower mode, the output voltage Vout being substantially equal to the Vbat voltage (fig. 2C).
  • Vbat battery goes up quickly (fig. 2A), for example in 1 microsecond, up to its nominal value Vbatnom.
  • the output voltage Vout follows voltage Vbat up to reach, at an instant t3, its nominal value Voutnom.
  • amplifier 2 releases its output from the low state to the high state and the gate of transistor 3 is connected to the voltage Vbat via the gate resistance Rg, which should normally should cause the immediate blocking of transistor 3.
  • the gate voltage Vg increases only very slowly in due to the high value of the gate resistance Rg, which limits the current delivered, and the high value of the grid capacity Cg.
  • the output stage of amplifier 2 is therefore unable to charge instantly the grid capacity Cg and block the transistor 3.
  • the latter continues to be on and the Vout voltage continues to follow Vbat voltage.
  • Vbat voltage As illustrated in Figure 2C, we thus see appear at the regulator output OS voltage spike. This peak of tension can disappear only from an instant t4, when the gate voltage Vg crosses the value Vbat-Vtp ensuring the blocking of transistor 3, and on condition that the load Z consumes current.
  • the present invention aims to overcome this disadvantage.
  • an objective of this invention is to remove, or at the very least limit, the effect of overvoltage in transient mode at the output a voltage regulator without the need to modify the structure of the regulation transistor to decrease its grid capacity.
  • Another object of the present invention is also to suppress or limit the effect of overvoltage transient without the need increase the maximum current that can be delivered by the output of the control amplifier.
  • a voltage regulator comprising a MOS transistor low resistance series control including one terminal receives a supply voltage and whose other terminal is connected to the regulator output, and an amplifier whose output drives the gate of the transistor in function the difference between a reference voltage and a voltage feedback
  • the regulator comprising a switch, one terminal of which is connected to the grid of the regulating transistor and the other terminal is brought to a blocking potential of the regulation transistor, and switch control means, monitoring the regulator output, arranged to close the switch when the regulator output voltage is higher at a first threshold higher than the nominal value of the output voltage.
  • the means of switch control are arranged to compare the regulator output voltage or a voltage proportional to the output voltage with the voltage of reference.
  • the means of switch control include comparator whose output delivers a closing signal of the switch, the comparator receiving on an input the reference voltage and on another input the voltage output or a voltage proportional to the voltage of exit.
  • the comparator has a switching hysteresis chosen so that the switch is reopened when the voltage of output becomes less than a second threshold less than first threshold and higher than the nominal value of the output voltage.
  • the transistor regulation is a PMOS transistor and the potential for blocking is the supply voltage.
  • the amplifier includes an output stage with a resistance of value grid too large for current crossing the grid resistor can assure it only rapid blocking of the regulation transistor when the supply voltage increases rapidly.
  • the switch is a PMOS transistor having a drain-source resistance at the passing state much lower than the gate resistance of the amplifier output stage.
  • the present invention also relates to a mobile phone including battery and circuits radio powered by the battery through a voltage regulator according to the invention.
  • the present invention also provides a method to prevent or limit the occurrence of a surge to the output of a voltage regulator when the voltage the regulator supply increases rapidly, the regulator comprising a regulation MOS transistor with high grid capacity, the grid of which is controlled by an amplifier delivering current alone insufficient to ensure rapid blocking of the transistor regulation, the method comprising a step consisting of to provide a switch connected between the grid of the regulating transistor and a blocking potential of the regulation transistor, and a step consisting in close the switch when the output voltage of the regulator becomes greater than a first threshold higher than the nominal value of the output voltage, so as to temporarily help the amplifier to block the regulating transistor.
  • the method comprises a step of reopening the switch when the regulator output voltage becomes less than one second threshold between the nominal value of the output voltage and the first threshold.
  • FIG. 3 represents a regulator 20 according to the invention, supplied here by a voltage Vbat supplied by the anode of a battery 1.
  • the regulator 20 comprises, like that of FIG. 1, a differential amplifier 2 whose output controls the gate d 'a PMOS type regulation transistor 3.
  • the drain D of transistor 3 is connected at the output of regulator 20 to a stabilization capacity Cst arranged in parallel with a load Z.
  • the output voltage Vout is brought to the positive input of the amplifier 2 via a divider bridge comprising two resistors R1, R2.
  • Resistor R2 here consists of two resistors R21, R22 in series.
  • the reference voltage Vref applied to the input negative of amplifier 2 is for example a voltage so-called band-gap with good stability in temperature function, generated by means of diodes PN junction and current mirrors.
  • the voltage Vref is thus independent of the voltage Vbat, on the condition of course to be chosen lower than the value the lower voltage Vbat.
  • Voutnom (R1 + R2) Vref / R2
  • the regulator 20 comprises a anti-overvoltage switch 4 connected between the anode of battery 1 and gate G of transistor 3.
  • Switch 4 is here a PMOS type transistor of which the source S receives the voltage Vbat and whose drain D is connected to gate G of transistor 3.
  • the W / L ratio length over gate width of transistor 4 is chosen so that its RdsON series resistance in the on state is quite low, preferably much lower than the gate resistance Rg of the output stage of amplifier 2.
  • the gate G of the transistor 4 is controlled by a signal Vos delivered by the output of a comparator 5.
  • the comparator 5 is supplied by the voltage Vbat and receives on its positive input the voltage Vref and on its input negative a VA voltage.
  • the resistor R21 is small compared to the resistor R22 so that the voltage VA is very close to the voltage Vfb.
  • R21 x R2
  • R22 (1-x) R2 with "x" between 0 and 1 and close to 0, x being for example equal to 0.05.
  • the voltage Va is significantly lower than the voltage Vref.
  • the voltage Vfb is in this case substantially equal to Vref and the relation (3) becomes: (6)
  • VA R22 Vref / R2 is : (7)
  • VA (1-x) Vref with x less than 1 and close to 0 as indicated above, and 1-x less than 1 and close to 1.
  • Comparator 5 and anti-overvoltage transistor 4 become active on a transitional basis, when the Vbat tension rises sharply after strongly decreased due to a peak in current consumption, by example in the situation described in the preamble, i.e. after the issuance of a data burst by the mobile phone radio circuit.
  • Such a situation is illustrated in Figures 2A, 4A, 4B, 4C, which respectively represent the voltage profile of Vbat battery, the voltage Vg delivered by the amplifier 2 on the gate of the regulation transistor 3, the voltage Vout and control voltage of the anti-overvoltage transistor 4.
  • regulator 20 During the fall of Vbat voltage, from time t1, regulator 20 is unbalanced and goes into follower mode, the output voltage Vout copying the Vbat voltage. During this period, the voltage VA continues to fall and thus remains below the voltage Vref, the signal Vos at the output of the comparator remaining at 1 (Vbat).
  • the voltage Vbat rises sharply and the voltage Vout follows the voltage Vbat.
  • the voltage Vout reaches the regulation point Voutnom and amplifier 2 switches its output to the high state.
  • the amplifier is, by design, incapable of supply the necessary current to immediately charge the gate capacity Cg of transistor 3.
  • the voltage of exit Vout therefore continues to rise after time t3 and to follow the voltage Vbat, the transistor 3 remaining passerby.
  • the voltage Vout reaches a threshold value Vout1 such that the voltage VA at the input of comparator 5 becomes equal to Vref.
  • the exit of the comparator 5 switches to 0 (fig. 4C) and the transistor surge protector 4 turns on.
  • Series resistance RdsON in the on state of transistor 4 being weak, the gate G of the regulation transistor 3 receives the current necessary to charge the grid capacity Cg and the transistor 3 crashes almost instantly.
  • the regulator 20 may have a direct feedback of the voltage Vout on the input of amplifier 2.
  • the comparator 5 has a switching hysteresis so avoid possible instability of the voltage Vout at neighborhood of the threshold Vout1.
  • the output of the comparator 5 changes to 1 when the voltage VA reaches a Vref 'value significantly lower than Vref.
  • FIG. 5 shows by way of example a low consumption amplifier structure 2, having limited output current.
  • the amplifier includes input a differential stage represented here in the form of a block 30, receiving the voltages Vref and Vfb.
  • the floor differential 30 is biased by a current generator 31 which limits its consumption.
  • the exit of the floor differential 30 drives the gate of a transistor 32 NMOS type, connected between the output node of amplifier 2 and ground.
  • the transistor 32 is polarized on its drain D by a current generator 33 limiting the consumption of the output stage to the state low.
  • the gate resistor Rg Also found in amplifier 2 is the gate resistor Rg, connected to the output node of the amplifier and receiving at its other end the Vbat voltage.
  • transistor 32 draws the output of the amplifier to ground and resistance Rg pulls the output at supply voltage Vbat according to the value of the signal delivered by the differential stage 30.
  • the anti-overvoltage transistor 4 can be modeled under the form of a perfect 4-1 switch in series with a resistor 4-2, which is here the RdsON series resistor of the transistor.
  • a resistor 4-2 which is here the RdsON series resistor of the transistor.
  • an external resistance can possibly be added to switch 4 to limit the charging current of the gate capacity Cg while maintaining an acceptable blocking time in transitional regime.
  • the regulator according to the invention is of course susceptible of various applications other than that set out in the preamble, and various variants of realization and improvements.
  • comparator 5 is a threshold comparator ⁇ .
  • the comparator output does not pass at 0 only at the moment when the voltage Vfb becomes greater or equal to Vref + ⁇ .
  • the anti-surge switch according to the invention must receive a potential ensuring the blocking of the regulation transistor.
  • Teaching set out in this application thus applies to the realization of a regulator having a transistor NMOS type regulation, to solve the problem reverse, namely the discharge of the grid capacity of the regulating transistor at blocking thereof when the maximum current entering the output stage of the amplifier when it goes to 0 is limited.
  • This potential is for example the mass with a transistor of NMOS regulation.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
EP01108258A 2000-04-12 2001-03-31 Linearer Regler mit niedriger Überspannung im Übergangszustand Expired - Lifetime EP1148405B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0004673 2000-04-12
FR0004673A FR2807847B1 (fr) 2000-04-12 2000-04-12 Regulateur lineaire a faible surtension en regime transitoire

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EP1148405A1 true EP1148405A1 (de) 2001-10-24
EP1148405B1 EP1148405B1 (de) 2006-06-07

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US (1) US6388433B2 (de)
EP (1) EP1148405B1 (de)
DE (1) DE60120270D1 (de)
FR (1) FR2807847B1 (de)

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EP2846213A1 (de) * 2013-09-05 2015-03-11 Dialog Semiconductor GmbH Verfahren und Vorrichtung zur Begrenzung des Einschaltstroms bei Inbetriebnahme für Regler mit geringem Spannungsabfall
CN104898754A (zh) * 2015-05-15 2015-09-09 合肥格易集成电路有限公司 一种低压差线性稳压器

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CN101470453B (zh) * 2007-12-24 2011-07-13 瑞昱半导体股份有限公司 混合式稳压装置与方法
EP2846213A1 (de) * 2013-09-05 2015-03-11 Dialog Semiconductor GmbH Verfahren und Vorrichtung zur Begrenzung des Einschaltstroms bei Inbetriebnahme für Regler mit geringem Spannungsabfall
CN104898754A (zh) * 2015-05-15 2015-09-09 合肥格易集成电路有限公司 一种低压差线性稳压器
CN104898754B (zh) * 2015-05-15 2017-01-04 合肥格易集成电路有限公司 一种低压差线性稳压器

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US6388433B2 (en) 2002-05-14
FR2807847B1 (fr) 2002-11-22
US20010050546A1 (en) 2001-12-13
FR2807847A1 (fr) 2001-10-19
DE60120270D1 (de) 2006-07-20
EP1148405B1 (de) 2006-06-07

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