DE69937317D1 - Al-Cu Dünnfilmsputterprozess mit hohem Durchsatz auf einem schmalen Kontakt-Via - Google Patents

Al-Cu Dünnfilmsputterprozess mit hohem Durchsatz auf einem schmalen Kontakt-Via

Info

Publication number
DE69937317D1
DE69937317D1 DE69937317T DE69937317T DE69937317D1 DE 69937317 D1 DE69937317 D1 DE 69937317D1 DE 69937317 T DE69937317 T DE 69937317T DE 69937317 T DE69937317 T DE 69937317T DE 69937317 D1 DE69937317 D1 DE 69937317D1
Authority
DE
Germany
Prior art keywords
thin film
high throughput
sputtering process
contact via
narrow contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69937317T
Other languages
English (en)
Other versions
DE69937317T2 (de
Inventor
Darryl Restaino
Chi-Hua Yang
Hans W Poetzlberger
Tomio Katata
Hideaki Aochi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qimonda AG
Toshiba Corp
International Business Machines Corp
Original Assignee
Infineon Technologies AG
Toshiba Corp
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG, Toshiba Corp, International Business Machines Corp filed Critical Infineon Technologies AG
Application granted granted Critical
Publication of DE69937317D1 publication Critical patent/DE69937317D1/de
Publication of DE69937317T2 publication Critical patent/DE69937317T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • C23C14/16—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
    • C23C14/165—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon by cathodic sputtering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76847—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned within the main fill metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
DE69937317T 1998-04-21 1999-04-21 Al-Cu Dünnfilmsputterprozess mit hohem Durchsatz auf einem schmalen Kontakt-Via Expired - Fee Related DE69937317T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US63094 1993-05-14
US09/063,094 US6140236A (en) 1998-04-21 1998-04-21 High throughput A1-Cu thin film sputtering process on small contact via for manufacturable beol wiring

Publications (2)

Publication Number Publication Date
DE69937317D1 true DE69937317D1 (de) 2007-11-29
DE69937317T2 DE69937317T2 (de) 2008-07-03

Family

ID=22046891

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69937317T Expired - Fee Related DE69937317T2 (de) 1998-04-21 1999-04-21 Al-Cu Dünnfilmsputterprozess mit hohem Durchsatz auf einem schmalen Kontakt-Via

Country Status (6)

Country Link
US (1) US6140236A (de)
EP (1) EP0954015B1 (de)
JP (1) JP3335931B2 (de)
KR (1) KR100328901B1 (de)
CN (1) CN1155075C (de)
DE (1) DE69937317T2 (de)

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JP4163331B2 (ja) 1999-07-14 2008-10-08 アルバック成膜株式会社 位相シフタ膜の製造方法、位相シフトマスク用ブランクスの製造方法、および、位相シフトマスクの製造方法
US6413863B1 (en) * 2000-01-24 2002-07-02 Taiwan Semiconductor Manufacturing Company Method to resolve the passivation surface roughness during formation of the AlCu pad for the copper process
US6613671B1 (en) * 2000-03-03 2003-09-02 Micron Technology, Inc. Conductive connection forming methods, oxidation reducing methods, and integrated circuits formed thereby
KR100477812B1 (ko) * 2000-07-31 2005-03-21 주식회사 하이닉스반도체 구리를 사용한 금속 콘택 형성방법
US6373135B1 (en) * 2000-09-14 2002-04-16 Infineon Technologies Ag Semiconductor structure and method of fabrication
US6635564B1 (en) * 2000-09-14 2003-10-21 Infineon Technologies Ag Semiconductor structure and method of fabrication including forming aluminum columns
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JP2003318395A (ja) * 2002-04-19 2003-11-07 Hitachi Ltd 半導体装置の製造方法
US7138719B2 (en) * 2002-08-29 2006-11-21 Micron Technology, Inc. Trench interconnect structure and formation method
JP4936643B2 (ja) * 2004-03-02 2012-05-23 株式会社リコー 半導体装置及びその製造方法
JP4501533B2 (ja) * 2004-05-31 2010-07-14 株式会社デンソー 半導体装置の製造方法
JP2007027234A (ja) 2005-07-13 2007-02-01 Seiko Epson Corp 半導体装置及びその製造方法
US20070138001A1 (en) * 2005-12-19 2007-06-21 Teng-Yuan Ko Method of forming an inductor on a semiconductor substrate
TWI278265B (en) * 2006-01-09 2007-04-01 Phoenix Prec Technology Corp Method for fabricating circuit board with electrically conducting structure and the same
JP4833014B2 (ja) * 2006-10-02 2011-12-07 キヤノンアネルバ株式会社 高温リフロースパッタリング装置
KR100875822B1 (ko) * 2007-07-12 2008-12-26 주식회사 동부하이텍 반도체 장치 형성 방법
US20090050471A1 (en) * 2007-08-24 2009-02-26 Spansion Llc Process of forming an electronic device including depositing layers within openings
JP2009164510A (ja) * 2008-01-10 2009-07-23 Renesas Technology Corp 半導体装置および半導体装置の製造方法
CN105990227B (zh) * 2015-02-27 2019-11-08 中芯国际集成电路制造(上海)有限公司 金属连线的制作方法及半导体器件
CN104934332A (zh) * 2015-04-29 2015-09-23 安徽松泰包装材料有限公司 一种铜铝复合薄膜生产工艺
US10586732B2 (en) 2016-06-30 2020-03-10 International Business Machines Corporation Via cleaning to reduce resistance
US10707152B2 (en) * 2017-01-16 2020-07-07 Innolux Corporation High-frequency device and manufacturing method thereof
CN110890318A (zh) * 2018-09-11 2020-03-17 长鑫存储技术有限公司 接触孔填充方法及结构、集成电路芯片
CN111304614B (zh) * 2020-03-31 2022-03-08 宁波瑞凌新能源科技有限公司 反射膜、其制备方法及应用
US20220298634A1 (en) * 2021-03-18 2022-09-22 Taiwan Semiconductor Manufacturing Company Limited Apparatus and method of manufacturing interconnect structures
CN117127154A (zh) * 2023-10-16 2023-11-28 粤芯半导体技术股份有限公司 一种半导体器件中的互连金属的沉积方法

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Also Published As

Publication number Publication date
JPH11307478A (ja) 1999-11-05
EP0954015A3 (de) 2002-09-11
US6140236A (en) 2000-10-31
CN1155075C (zh) 2004-06-23
DE69937317T2 (de) 2008-07-03
KR19990083367A (ko) 1999-11-25
KR100328901B1 (ko) 2002-03-14
EP0954015A2 (de) 1999-11-03
JP3335931B2 (ja) 2002-10-21
EP0954015B1 (de) 2007-10-17
CN1234606A (zh) 1999-11-10

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: INTERNATIONAL BUSINESS MACHINES CORP., ARMONK,, US

Owner name: KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP

Owner name: QIMONDA AG, 81739 MUENCHEN, DE

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee