DE69933349D1 - Prüfbares ic mit analogen und digitalen schaltungen - Google Patents

Prüfbares ic mit analogen und digitalen schaltungen

Info

Publication number
DE69933349D1
DE69933349D1 DE69933349T DE69933349T DE69933349D1 DE 69933349 D1 DE69933349 D1 DE 69933349D1 DE 69933349 T DE69933349 T DE 69933349T DE 69933349 T DE69933349 T DE 69933349T DE 69933349 D1 DE69933349 D1 DE 69933349D1
Authority
DE
Germany
Prior art keywords
testable
analog
digital circuits
circuits
digital
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69933349T
Other languages
English (en)
Other versions
DE69933349T2 (de
Inventor
M Porteners
Nie H De
Der Heiden T Van
P Jansen
Jong A De
A Palm
Vincent Pronk
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE69933349D1 publication Critical patent/DE69933349D1/de
Application granted granted Critical
Publication of DE69933349T2 publication Critical patent/DE69933349T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/3167—Testing of combined analog and digital circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
DE69933349T 1998-04-23 1999-04-12 Prüfbares ic mit analogen und digitalen schaltungen Expired - Lifetime DE69933349T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP98201314 1998-04-23
EP98201314 1998-04-23
PCT/IB1999/000639 WO1999056396A2 (en) 1998-04-23 1999-04-12 Testable ic having analog and digital circuits

Publications (2)

Publication Number Publication Date
DE69933349D1 true DE69933349D1 (de) 2006-11-09
DE69933349T2 DE69933349T2 (de) 2007-05-03

Family

ID=8233637

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69933349T Expired - Lifetime DE69933349T2 (de) 1998-04-23 1999-04-12 Prüfbares ic mit analogen und digitalen schaltungen

Country Status (6)

Country Link
US (1) US6389567B2 (de)
EP (1) EP0992115B1 (de)
JP (1) JP4067578B2 (de)
KR (1) KR100582807B1 (de)
DE (1) DE69933349T2 (de)
WO (1) WO1999056396A2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6651129B1 (en) * 1999-07-21 2003-11-18 National Semiconductor Corporation Apparatus and method for establishing a data communication interface to control and configure an electronic system with analog and digital circuits
EP1132750B1 (de) * 2000-01-26 2008-06-11 Infineon Technologies AG Elektrische Schaltung und Verfahren zum Testen einer Schaltungskomponente der elektrischen Schaltung
US6947883B1 (en) * 2000-07-19 2005-09-20 Vikram Gupta Method for designing mixed signal integrated circuits and configurable synchronous digital noise emulator circuit
EP1189069B1 (de) * 2000-09-11 2007-04-11 Freescale Semiconductor, Inc. Prüfbare Analog/Digitalschnittstelleschaltung
EP1368670B1 (de) 2001-02-07 2005-03-23 Koninklijke Philips Electronics N.V. Testschaltung für eine intergrierte schaltung mit nur einem wahlelement für jeden signalweg
US6931561B2 (en) * 2001-10-16 2005-08-16 International Business Machines Corporation Apparatus and method for asynchronously interfacing high-speed clock domain and low-speed clock domain using a plurality of storage and multiplexer components
US20040098646A1 (en) * 2002-11-20 2004-05-20 Fisher Rory L. Method and apparatus to check the integrity of scan chain connectivity by traversing the test logic of the device
FR2897440A1 (fr) * 2006-02-10 2007-08-17 St Microelectronics Sa Circuit electronique comprenant un mode de test securise par rupture d'une chaine de test, et procede associe.
JP2011102764A (ja) * 2009-11-11 2011-05-26 Renesas Electronics Corp 半導体集積回路、半導体集積回路設計方法及び半導体集積回路設計プログラム
CN103247324B (zh) * 2012-02-07 2016-01-06 北京兆易创新科技股份有限公司 一种串行接口快闪存储器及其设计方法
US10317464B2 (en) * 2017-05-08 2019-06-11 Xilinx, Inc. Dynamic scan chain reconfiguration in an integrated circuit
US11940494B2 (en) 2021-11-11 2024-03-26 Samsung Electronics Co., Ltd. System on chip for performing scan test and method of designing the same

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0358376B1 (de) * 1988-09-07 1995-02-22 Texas Instruments Incorporated Integrierte Prüfschaltung
EP0419734B1 (de) * 1989-08-25 1995-06-14 Koninklijke Philips Electronics N.V. Verfahren zum Testen von hierarchisch organisierten integrierten Schaltungen und integrierte Schaltungen, geeignet für einen solchen Test
GB9008544D0 (en) * 1990-04-17 1990-06-13 Smiths Industries Plc Electrical assemblies
JP2741119B2 (ja) * 1991-09-17 1998-04-15 三菱電機株式会社 バイパススキャンパスおよびそれを用いた集積回路装置
JP3563750B2 (ja) * 1992-10-16 2004-09-08 テキサス インスツルメンツ インコーポレイテツド アナログ回路のための走査に基づく試験
JP2629611B2 (ja) * 1994-08-31 1997-07-09 日本電気株式会社 アナログ／ディジタル混載集積回路およびそのテスト方法
US5574733A (en) * 1995-07-25 1996-11-12 Intel Corporation Scan-based built-in self test (BIST) with automatic reseeding of pattern generator
US5648733A (en) * 1995-11-01 1997-07-15 Lsi Logic Corporation Scan compatible 3-state bus control
US5974578A (en) * 1996-08-06 1999-10-26 Matsushita Electronics Corporation Integrated circuit and test method therefor
KR100499740B1 (ko) * 1996-12-13 2005-09-30 코닌클리케 필립스 일렉트로닉스 엔.브이. 제1및제2클록도메인을포함하는집적회로및그러한회로를테스트하는방법
US5793778A (en) * 1997-04-11 1998-08-11 National Semiconductor Corporation Method and apparatus for testing analog and digital circuitry within a larger circuit

Also Published As

Publication number Publication date
JP2002508080A (ja) 2002-03-12
KR100582807B1 (ko) 2006-05-24
WO1999056396A3 (en) 2000-01-06
US6389567B2 (en) 2002-05-14
US20010049806A1 (en) 2001-12-06
JP4067578B2 (ja) 2008-03-26
WO1999056396A2 (en) 1999-11-04
DE69933349T2 (de) 2007-05-03
EP0992115B1 (de) 2006-09-27
KR20010014089A (ko) 2001-02-26
EP0992115A2 (de) 2000-04-12

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Legal Events

Date Code Title Description
8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL

R082 Change of representative

Ref document number: 992115

Country of ref document: EP

Representative=s name: MUELLER-BORE & PARTNER PATENTANWAELTE, EUROPEA, DE