DE69822917D1 - Abtast- und Halteschaltung - Google Patents

Abtast- und Halteschaltung

Info

Publication number
DE69822917D1
DE69822917D1 DE69822917T DE69822917T DE69822917D1 DE 69822917 D1 DE69822917 D1 DE 69822917D1 DE 69822917 T DE69822917 T DE 69822917T DE 69822917 T DE69822917 T DE 69822917T DE 69822917 D1 DE69822917 D1 DE 69822917D1
Authority
DE
Germany
Prior art keywords
sample
hold circuit
hold
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69822917T
Other languages
English (en)
Other versions
DE69822917T2 (de
Inventor
Krishnaswamy Nagaraj
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE69822917D1 publication Critical patent/DE69822917D1/de
Publication of DE69822917T2 publication Critical patent/DE69822917T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02—Sample-and-hold arrangements
    • G11C27/024—Sample-and-hold arrangements using a capacitive memory element
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02—Sample-and-hold arrangements
    • G11C27/024—Sample-and-hold arrangements using a capacitive memory element
    • G11C27/026—Sample-and-hold arrangements using a capacitive memory element associated with an amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/06—Modifications for ensuring a fully conducting state
    • H03K17/063—Modifications for ensuring a fully conducting state in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/165—Modifications for eliminating interference voltages or currents in field-effect transistor switches by feedback from the output circuit to the control circuit
DE69822917T 1997-04-30 1998-04-30 Abtast- und Halteschaltung Expired - Lifetime DE69822917T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US4518297P 1997-04-30 1997-04-30
US45182P 1997-04-30

Publications (2)

Publication Number Publication Date
DE69822917D1 true DE69822917D1 (de) 2004-05-13
DE69822917T2 DE69822917T2 (de) 2004-08-19

Family

ID=21936453

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69822917T Expired - Lifetime DE69822917T2 (de) 1997-04-30 1998-04-30 Abtast- und Halteschaltung

Country Status (4)

Country Link
US (1) US6052000A (de)
EP (1) EP0875904B1 (de)
JP (1) JP3887483B2 (de)
DE (1) DE69822917T2 (de)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU4172000A (en) * 1999-03-16 2000-10-04 Ess Technology, Inc. Delta-sigma sample and hold
FR2793970B1 (fr) 1999-05-20 2001-08-31 St Microelectronics Sa Procede de commande d'un commutateur d'un dispositif de capacite commutee, et dispositif de capacite commutee correspondant
JP2001110195A (ja) 1999-10-08 2001-04-20 Agilent Technologies Japan Ltd トラックアンドホールド回路
JP2001126492A (ja) 1999-10-27 2001-05-11 Agilent Technologies Japan Ltd トラックアンドホールド回路
US6396325B2 (en) * 1999-12-03 2002-05-28 Fairchild Semiconductor Corporation High frequency MOSFET switch
US6313668B1 (en) * 2000-03-28 2001-11-06 Lsi Logic Corporation Passive sample and hold in an active switched capacitor circuit
US6323697B1 (en) * 2000-06-06 2001-11-27 Texas Instruments Incorporated Low distortion sample and hold circuit
US6559689B1 (en) * 2000-10-02 2003-05-06 Allegro Microsystems, Inc. Circuit providing a control voltage to a switch and including a capacitor
US7049855B2 (en) * 2001-06-28 2006-05-23 Intel Corporation Area efficient waveform evaluation and DC offset cancellation circuits
US6850098B2 (en) * 2001-07-27 2005-02-01 Nanyang Technological University Method for nulling charge injection in switched networks
US6525574B1 (en) * 2001-09-06 2003-02-25 Texas Instruments Incorporated Gate bootstrapped CMOS sample-and-hold circuit
DE10220577C1 (de) * 2002-05-08 2003-09-25 Infineon Technologies Ag Abtast-Halte-Vorrichtung und Verfahren zum Betreiben einer Abtast-Halte-Vorrichtung
US7026804B2 (en) * 2002-06-25 2006-04-11 Zarlink Semiconductor (U.S.) Inc. Sample and hold circuit
KR100477564B1 (ko) * 2002-08-19 2005-03-18 이디텍 주식회사 영상출력시스템에 내장되는 에이디변환기의 트랙앤홀드회로장치
US6642752B1 (en) 2002-09-20 2003-11-04 Texas Instruments Incorporated Broadband sample and hold circuit
US6956411B1 (en) * 2003-03-27 2005-10-18 National Semiconductor Corporation Constant RON switch circuit with low distortion and reduction of pedestal errors
TWI220351B (en) * 2003-09-09 2004-08-11 Sunplus Technology Co Ltd Automatic threshold control circuit and a signal transform circuit and method apply thereof
FR2871630B1 (fr) * 2004-06-11 2007-02-09 Commissariat Energie Atomique Procede de commande d'un interrupteur analogique
US7453291B2 (en) * 2004-09-09 2008-11-18 The Regents Of The University Of California Switch linearized track and hold circuit for switch linearization
US7164377B2 (en) * 2004-12-03 2007-01-16 Integration Associates Inc. Multiplexed voltage reference strategy for codec
US7136000B1 (en) * 2005-06-17 2006-11-14 National Semiconductor Corporation Selective offset adjustment of a track and hold circuit
US7710164B1 (en) * 2007-06-18 2010-05-04 Intersil Americas Inc. Highly linear bootstrapped switch with improved reliability
JP4966777B2 (ja) * 2007-07-25 2012-07-04 ルネサスエレクトロニクス株式会社 Ａ／ｄ変換器
US8030974B1 (en) * 2008-09-10 2011-10-04 Marvell International, Ltd. Method and apparatus for sampling
US8183890B1 (en) 2008-09-10 2012-05-22 Marvell International Ltd. Method and apparatus for sampling
US8248283B2 (en) * 2010-06-11 2012-08-21 Texas Instruments Incorporated Multi-channel SAR ADC
US8493255B2 (en) * 2011-02-24 2013-07-23 Texas Instruments Incorporated High speed, high voltage multiplexer
US8786318B2 (en) * 2011-06-08 2014-07-22 Linear Technology Corporation System and methods to improve the performance of semiconductor based sampling system
US8593181B2 (en) * 2011-08-04 2013-11-26 Analog Devices, Inc. Input switches in sampling circuits
US10037814B2 (en) * 2015-09-11 2018-07-31 Texas Instruments Incorporated Track and hold with active charge cancellation
JP6947164B2 (ja) * 2016-03-22 2021-10-13 ソニーグループ株式会社 電子回路、および、電子回路の制御方法
US20190238125A1 (en) * 2018-01-29 2019-08-01 MACOM Technology Solutions Holding, Inc. Sampling circuitry with temperature insensitive bandwidth

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4308468A (en) * 1979-11-15 1981-12-29 Xerox Corporation Dual-FET sample and hold circuit
DE69325691T2 (de) * 1992-10-19 2000-02-17 Koninkl Philips Electronics Nv Abtast-und Halteschaltung mit Reduktion des Taktdurchgriffs
EP0594242B1 (de) * 1992-10-19 1999-07-21 Koninklijke Philips Electronics N.V. Abtast-und Halteschaltung mit Reduktion des Taktdurchgriffs
US5479121A (en) * 1995-02-27 1995-12-26 Industrial Technology Research Institute Compensating circuit for MOSFET analog switches

Also Published As

Publication number Publication date
US6052000A (en) 2000-04-18
EP0875904A3 (de) 1999-07-21
JP3887483B2 (ja) 2007-02-28
JPH10312698A (ja) 1998-11-24
EP0875904A2 (de) 1998-11-04
DE69822917T2 (de) 2004-08-19
EP0875904B1 (de) 2004-04-07

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Legal Events

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8364 No opposition during term of opposition