DE69228786D1 - Verbindungsleitung und Widerstand für intergrierte Schaltungen - Google Patents

Verbindungsleitung und Widerstand für intergrierte Schaltungen

Info

Publication number
DE69228786D1
DE69228786D1 DE69228786T DE69228786T DE69228786D1 DE 69228786 D1 DE69228786 D1 DE 69228786D1 DE 69228786 T DE69228786 T DE 69228786T DE 69228786 T DE69228786 T DE 69228786T DE 69228786 D1 DE69228786 D1 DE 69228786D1
Authority
DE
Germany
Prior art keywords
resistor
integrated circuits
connection line
connection
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69228786T
Other languages
English (en)
Other versions
DE69228786T2 (de
Inventor
Fusen E Chen
Girish Anant Dixit
Robert O Miller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
STMicroelectronics lnc USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics lnc USA filed Critical STMicroelectronics lnc USA
Application granted granted Critical
Publication of DE69228786D1 publication Critical patent/DE69228786D1/de
Publication of DE69228786T2 publication Critical patent/DE69228786T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20—Resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76889—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/15—Static random access memory [SRAM] devices comprising a resistor load element

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Formation Of Insulating Films (AREA)
DE69228786T 1991-09-30 1992-09-11 Verbindungsleitung und Widerstand für intergrierte Schaltungen Expired - Fee Related DE69228786T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/769,171 US5182627A (en) 1991-09-30 1991-09-30 Interconnect and resistor for integrated circuits

Publications (2)

Publication Number Publication Date
DE69228786D1 true DE69228786D1 (de) 1999-05-06
DE69228786T2 DE69228786T2 (de) 1999-11-11

Family

ID=25084678

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69228786T Expired - Fee Related DE69228786T2 (de) 1991-09-30 1992-09-11 Verbindungsleitung und Widerstand für intergrierte Schaltungen

Country Status (4)

Country Link
US (2) US5182627A (de)
EP (1) EP0536902B1 (de)
JP (1) JPH05259401A (de)
DE (1) DE69228786T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5273924A (en) * 1991-08-30 1993-12-28 Micron Technology, Inc. Method for forming an SRAM by minimizing diffusion of conductivity enhancing impurities from one region of a polysilicon layer to another region
JP2748070B2 (ja) * 1992-05-20 1998-05-06 三菱電機株式会社 半導体装置およびその製造方法
KR960001176B1 (ko) * 1992-12-02 1996-01-19 현대전자산업주식회사 반도체 접속장치 및 그 제조방법
US5478771A (en) * 1993-05-28 1995-12-26 Sgs-Thomson Microelectronics, Inc. Method of forming local interconnect structure without P-N junction between active elements
JP2934738B2 (ja) 1994-03-18 1999-08-16 セイコーインスツルメンツ株式会社 半導体装置およびその製造方法
KR950034754A (ko) * 1994-05-06 1995-12-28 윌리엄 이. 힐러 폴리실리콘 저항을 형성하는 방법 및 이 방법으로부터 제조된 저항
US5464794A (en) * 1994-05-11 1995-11-07 United Microelectronics Corporation Method of forming contact openings having concavo-concave shape
US5578873A (en) * 1994-10-12 1996-11-26 Micron Technology, Inc. Integrated circuitry having a thin film polysilicon layer in ohmic contact with a conductive layer
US5489797A (en) * 1994-12-19 1996-02-06 Sgs-Thomson Microelectronics, Inc. Local interconnect structure
EP0746027A3 (de) * 1995-05-03 1998-04-01 Applied Materials, Inc. Auf einer integrierten Schaltung hergestellter Polysilizium/Wolframsilizid-Mehrschichtverbund und verbessertes Herstellungsverfahren
US5909617A (en) * 1995-11-07 1999-06-01 Micron Technology, Inc. Method of manufacturing self-aligned resistor and local interconnect
US5994182A (en) * 1996-01-18 1999-11-30 Micron Technology, Inc. Method of reducing outdiffusion from a doped three-dimensional polysilicon film into substrate by using angled implants
US5763313A (en) * 1996-03-13 1998-06-09 United Microelectronics Corp. Process for fabricating shield for polysilicon load
US5883417A (en) * 1996-06-27 1999-03-16 Winbond Electronics Corporation Poly-load resistor for SRAM cell
TW330334B (en) * 1997-08-23 1998-04-21 Winbond Electronics Corp Static random access memory polysilicon load structure and manufacturing method
JP4392867B2 (ja) 1998-02-06 2010-01-06 株式会社ルネサステクノロジ 半導体装置およびその製造方法
US6054359A (en) * 1999-06-14 2000-04-25 Taiwan Semiconductor Manufacturing Company Method for making high-sheet-resistance polysilicon resistors for integrated circuits

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL190710C (nl) * 1978-02-10 1994-07-01 Nec Corp Geintegreerde halfgeleiderketen.
US4251876A (en) * 1978-11-03 1981-02-17 Mostek Corporation Extremely low current load device for integrated circuit
FR2534415A1 (fr) * 1982-10-07 1984-04-13 Cii Honeywell Bull Procede de fabrication de resistances electriques dans un materiau semi-conducteur polycristallin et dispositif a circuits integres resultant
US4464212A (en) * 1982-12-13 1984-08-07 International Business Machines Corporation Method for making high sheet resistivity resistors
US4658378A (en) * 1982-12-15 1987-04-14 Inmos Corporation Polysilicon resistor with low thermal activation energy
JPS60263455A (ja) * 1984-06-04 1985-12-26 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン ポリシリコン構造
IT1186485B (it) * 1985-12-20 1987-11-26 Sgs Microelettronica Spa Circuito integrato monolitico,in particolare di tipo mos o cmos e processo per la realizzazione di tale circuito
US4975575A (en) * 1987-03-31 1990-12-04 Brandeis University Method of and apparatus for detecting radon
DE3882322T2 (de) * 1987-09-30 1993-10-21 Texas Instruments Inc Statischer Speicher in Schottky-Technologie.
JPH01143252A (ja) * 1987-11-27 1989-06-05 Nec Corp 半導体装置
JP2829992B2 (ja) * 1988-11-10 1998-12-02 セイコーエプソン株式会社 半導体装置
US4948747A (en) * 1989-12-18 1990-08-14 Motorola, Inc. Method of making an integrated circuit resistor
US5068201A (en) * 1990-05-31 1991-11-26 Sgs-Thomson Microelectronics, Inc. Method for forming a high valued resistive load element and low resistance interconnect for integrated circuits

Also Published As

Publication number Publication date
EP0536902A1 (de) 1993-04-14
DE69228786T2 (de) 1999-11-11
JPH05259401A (ja) 1993-10-08
EP0536902B1 (de) 1999-03-31
US5348901A (en) 1994-09-20
US5182627A (en) 1993-01-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee