DE69826062D1 - Montierungsverfahren für eine Halbleiteranordnung - Google Patents

Montierungsverfahren für eine Halbleiteranordnung

Info

Publication number
DE69826062D1
DE69826062D1 DE69826062T DE69826062T DE69826062D1 DE 69826062 D1 DE69826062 D1 DE 69826062D1 DE 69826062 T DE69826062 T DE 69826062T DE 69826062 T DE69826062 T DE 69826062T DE 69826062 D1 DE69826062 D1 DE 69826062D1
Authority
DE
Germany
Prior art keywords
semiconductor device
mounting method
mounting
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69826062T
Other languages
English (en)
Other versions
DE69826062T2 (de
Inventor
Kazuhisa Tsunoi
Hidehiko Kira
Shunji Baba
Akira Fujii
Toshihiro Kusagaya
Kenji Kobae
Norio Kainuma
Naoki Ishikawa
Satoshi Emoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE69826062D1 publication Critical patent/DE69826062D1/de
Publication of DE69826062T2 publication Critical patent/DE69826062T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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DE69826062T 1997-05-19 1998-03-20 Montierungsverfahren für eine Halbleiteranordnung Expired - Lifetime DE69826062T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP12889897 1997-05-19
JP12889897 1997-05-19
JP9289836A JP3030271B2 (ja) 1997-05-19 1997-10-22 半導体部品の実装方法
JP28983697 1997-10-22

Publications (2)

Publication Number Publication Date
DE69826062D1 true DE69826062D1 (de) 2004-10-14
DE69826062T2 DE69826062T2 (de) 2005-01-20

Family

ID=26464467

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US6458237B1 (en) 2002-10-01
EP0880170B1 (de) 2004-09-08
US6787925B2 (en) 2004-09-07
US20010011774A1 (en) 2001-08-09
EP1369910B1 (de) 2009-08-19
JPH1140609A (ja) 1999-02-12
DE69841080D1 (de) 2009-10-01
EP1369910A3 (de) 2006-04-19
DE69826062T2 (de) 2005-01-20
EP1369910A2 (de) 2003-12-10
JP3030271B2 (ja) 2000-04-10
EP0880170A2 (de) 1998-11-25
EP0880170A3 (de) 2000-04-05

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