DE69707715T2 - Nicht-flüchtiger speicher der gleichzeitiges lesen und schreiben zulässt durch zeitmultiplexierung eines datenpfades - Google Patents

Nicht-flüchtiger speicher der gleichzeitiges lesen und schreiben zulässt durch zeitmultiplexierung eines datenpfades

Info

Publication number
DE69707715T2
DE69707715T2 DE69707715T DE69707715T DE69707715T2 DE 69707715 T2 DE69707715 T2 DE 69707715T2 DE 69707715 T DE69707715 T DE 69707715T DE 69707715 T DE69707715 T DE 69707715T DE 69707715 T2 DE69707715 T2 DE 69707715T2
Authority
DE
Germany
Prior art keywords
volatile memory
data path
time multiplexing
memory allowing
allowing reading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69707715T
Other languages
English (en)
Other versions
DE69707715D1 (de
Inventor
C Chen
K Chang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GlobalFoundries Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE69707715D1 publication Critical patent/DE69707715D1/de
Publication of DE69707715T2 publication Critical patent/DE69707715T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Static Random-Access Memory (AREA)
DE69707715T 1997-03-05 1997-08-15 Nicht-flüchtiger speicher der gleichzeitiges lesen und schreiben zulässt durch zeitmultiplexierung eines datenpfades Expired - Lifetime DE69707715T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/811,683 US5841696A (en) 1997-03-05 1997-03-05 Non-volatile memory enabling simultaneous reading and writing by time multiplexing a decode path
PCT/US1997/014454 WO1998039773A1 (en) 1997-03-05 1997-08-15 Non-volatile memory enabling simultaneous reading and writing by time multiplexing a decode path

Publications (2)

Publication Number Publication Date
DE69707715D1 DE69707715D1 (de) 2001-11-29
DE69707715T2 true DE69707715T2 (de) 2002-07-11

Family

ID=25207250

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69707715T Expired - Lifetime DE69707715T2 (de) 1997-03-05 1997-08-15 Nicht-flüchtiger speicher der gleichzeitiges lesen und schreiben zulässt durch zeitmultiplexierung eines datenpfades

Country Status (7)

Country Link
US (1) US5841696A (de)
EP (1) EP0965130B1 (de)
JP (1) JP3931249B2 (de)
KR (1) KR100537816B1 (de)
DE (1) DE69707715T2 (de)
TW (1) TW359835B (de)
WO (1) WO1998039773A1 (de)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10326493A (ja) * 1997-05-23 1998-12-08 Ricoh Co Ltd 複合化フラッシュメモリ装置
US6166982A (en) * 1998-06-25 2000-12-26 Cypress Semiconductor Corp. High voltage switch for eeprom/flash memories
US6172553B1 (en) 1998-06-25 2001-01-09 Cypress Semiconductor Corp. High voltage steering network for EEPROM/FLASH memory
US6094095A (en) * 1998-06-29 2000-07-25 Cypress Semiconductor Corp. Efficient pump for generating voltages above and/or below operating voltages
US6033955A (en) * 1998-09-23 2000-03-07 Advanced Micro Devices, Inc. Method of making flexibly partitioned metal line segments for a simultaneous operation flash memory device with a flexible bank partition architecture
US6275894B1 (en) 1998-09-23 2001-08-14 Advanced Micro Devices, Inc. Bank selector circuit for a simultaneous operation flash memory device with a flexible bank partition architecture
US6005803A (en) * 1998-09-23 1999-12-21 Advanced Micro Devices, Inc. Memory address decoding circuit for a simultaneous operation flash memory device with a flexible bank partition architecture
US6178132B1 (en) * 1999-09-09 2001-01-23 Macronix International Co., Ltd. Non-volatile integrated circuit having read while write capability using one address register
US6111787A (en) * 1999-10-19 2000-08-29 Advanced Micro Devices, Inc. Address transistion detect timing architecture for a simultaneous operation flash memory device
US6163478A (en) 1999-10-19 2000-12-19 Advanced Micro Devices, Inc. Common flash interface implementation for a simultaneous operation flash memory device
US6285585B1 (en) 1999-10-19 2001-09-04 Advaned Micro Devices, Inc. Output switching implementation for a flash memory device
US6662262B1 (en) * 1999-10-19 2003-12-09 Advanced Micro Devices, Inc. OTP sector double protection for a simultaneous operation flash memory
US6327181B1 (en) 1999-10-19 2001-12-04 Advanced Micro Devices Inc. Reference cell bitline path architecture for a simultaneous operation flash memory device
US6359808B1 (en) * 1999-10-19 2002-03-19 Advanced Micro Devices, Inc. Low voltage read cascode for 2V/3V and different bank combinations without metal options for a simultaneous operation flash memory device
US6331950B1 (en) 1999-10-19 2001-12-18 Fujitsu Limited Write protect input implementation for a simultaneous operation flash memory device
US6118698A (en) * 1999-10-19 2000-09-12 Advanced Micro Devices, Inc. Output multiplexing implementation for a simultaneous operation flash memory device
US6571307B1 (en) 1999-10-19 2003-05-27 Advanced Micro Devices, Inc. Multiple purpose bus for a simultaneous operation flash memory device
US6550028B1 (en) 1999-10-19 2003-04-15 Advanced Micro Devices, Inc. Array VT mode implementation for a simultaneous operation flash memory device
US6728161B1 (en) * 2000-06-30 2004-04-27 Micron Technology, Inc. Zero latency-zero bus turnaround synchronous flash memory
KR100495848B1 (ko) * 2000-03-30 2005-06-16 마이크론 테크놀로지, 인크. 제로-레이턴시-제로 버스 전환 동기 플래시 메모리
US6208561B1 (en) * 2000-06-13 2001-03-27 Advanced Micro Devices, Inc. Method to reduce capacitive loading in flash memory X-decoder for accurate voltage control at wordlines and select lines
US6654848B1 (en) * 2000-09-15 2003-11-25 Advanced Micro Devices, Inc. Simultaneous execution command modes in a flash memory device
US6883037B2 (en) * 2001-03-21 2005-04-19 Microsoft Corporation Fast data decoder that operates with reduced output buffer bounds checking
US6584034B1 (en) 2001-04-23 2003-06-24 Aplus Flash Technology Inc. Flash memory array structure suitable for multiple simultaneous operations
US6552935B2 (en) 2001-08-02 2003-04-22 Stmicroelectronics, Inc. Dual bank flash memory device and method
US6781914B2 (en) 2001-08-23 2004-08-24 Winbond Electronics Corp. Flash memory having a flexible bank partition
JP2003123488A (ja) 2001-10-11 2003-04-25 Toshiba Corp 半導体記憶装置
US7046551B2 (en) * 2003-03-25 2006-05-16 Mosel Vitelic, Inc. Nonvolatile memories with asymmetric transistors, nonvolatile memories with high voltage lines extending in the column direction, and nonvolatile memories with decoding circuits sharing a common area
US7099226B2 (en) 2003-10-14 2006-08-29 Atmel Corporation Functional register decoding system for multiple plane operation
KR100528482B1 (ko) * 2003-12-31 2005-11-15 삼성전자주식회사 데이타를 섹터 단위로 랜덤하게 입출력할 수 있는 플래시메모리 시스템
US7307884B2 (en) * 2004-06-15 2007-12-11 Sandisk Corporation Concurrent programming of non-volatile memory
KR100600301B1 (ko) * 2005-05-25 2006-07-13 주식회사 하이닉스반도체 면적이 감소된 페이지 버퍼 회로와, 이를 포함하는 플래시메모리 장치 및 그 프로그램 동작 방법
JP2007226380A (ja) * 2006-02-22 2007-09-06 Ricoh Co Ltd 不揮発性メモリカード
US7859240B1 (en) 2007-05-22 2010-12-28 Cypress Semiconductor Corporation Circuit and method for preventing reverse current flow into a voltage regulator from an output thereof
US8130528B2 (en) 2008-08-25 2012-03-06 Sandisk 3D Llc Memory system with sectional data lines
US8027209B2 (en) 2008-10-06 2011-09-27 Sandisk 3D, Llc Continuous programming of non-volatile memory
US8279650B2 (en) 2009-04-20 2012-10-02 Sandisk 3D Llc Memory system with data line switching scheme
JP5453078B2 (ja) * 2009-12-24 2014-03-26 三星電子株式会社 不揮発性メモリの制御装置および制御方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6240698A (ja) * 1985-08-16 1987-02-21 Fujitsu Ltd 半導体記憶装置
US4752871A (en) * 1985-09-30 1988-06-21 Motorola, Inc. Single-chip microcomputer having a program register for controlling two EEPROM arrays
JPS6386197A (ja) * 1986-09-29 1988-04-16 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JPS63161599A (ja) * 1986-12-25 1988-07-05 Toshiba Corp 不揮発性半導体メモリ
US5007022A (en) * 1987-12-21 1991-04-09 Texas Instruments Incorporated Two-port two-transistor DRAM
DE68928341T2 (de) * 1988-12-05 1998-01-29 Texas Instruments Inc Integrierte Schaltungskonfiguration mit schneller örtlicher Zugriffszeit
US5287469A (en) * 1988-12-27 1994-02-15 Nec Corporation Electrically erasable and programmable non-volatile memory (EEPROM), wherein write pulses can be interrupted by subsequently received read requests
JP2601951B2 (ja) * 1991-01-11 1997-04-23 株式会社東芝 半導体集積回路
US5276642A (en) * 1991-07-15 1994-01-04 Micron Technology, Inc. Method for performing a split read/write operation in a dynamic random access memory
US5245572A (en) * 1991-07-30 1993-09-14 Intel Corporation Floating gate nonvolatile memory with reading while writing capability
JP3143161B2 (ja) * 1991-08-29 2001-03-07 三菱電機株式会社 不揮発性半導体メモリ
JPH06215590A (ja) * 1993-01-13 1994-08-05 Nec Ic Microcomput Syst Ltd フラッシュ消去型不揮発性メモリ
JP3464271B2 (ja) * 1994-04-12 2003-11-05 三菱電機株式会社 不揮発性半導体記憶装置
US5592435A (en) * 1994-06-03 1997-01-07 Intel Corporation Pipelined read architecture for memory
US5506810A (en) * 1994-08-16 1996-04-09 Cirrus Logic, Inc. Dual bank memory and systems using the same
EP0745995B1 (de) * 1995-05-05 2001-04-11 STMicroelectronics S.r.l. Anordnung von nichtflüchtigen EEPROM,insbesondere Flash-EEPROM
JP3824689B2 (ja) * 1995-09-05 2006-09-20 株式会社ルネサステクノロジ 同期型半導体記憶装置

Also Published As

Publication number Publication date
JP3931249B2 (ja) 2007-06-13
EP0965130B1 (de) 2001-10-24
EP0965130A1 (de) 1999-12-22
KR20000076015A (ko) 2000-12-26
WO1998039773A1 (en) 1998-09-11
DE69707715D1 (de) 2001-11-29
JP2001512613A (ja) 2001-08-21
US5841696A (en) 1998-11-24
TW359835B (en) 1999-06-01
KR100537816B1 (ko) 2005-12-20

Similar Documents

Publication Publication Date Title
DE69707715T2 (de) Nicht-flüchtiger speicher der gleichzeitiges lesen und schreiben zulässt durch zeitmultiplexierung eines datenpfades
DE69920816D1 (de) Hochbandbreitige Lese- und Schreibearchitektur für nicht-flüchtige Speicher
DE69625520T2 (de) Mehrfaches schreiben pro einzel-löschung für einen nichtflüchtigen speicher
DE69801824T2 (de) Speicher für informationsteurung eines mehrhostrechnerspeichers
DE3889390T2 (de) Schreibe-Schutzmechanismus für nichtflüchtigen Speicher.
DE4495101T1 (de) Speicherelemente, nichtflüchtige Speicher, nichtflüchtige Speichervorrichtungen und darauf basierende Verfahren zur Informationsspeicherung
DE69115952T2 (de) Abfühlschaltung zum Lesen von in nichtflüchtigen Speicherzellen gespeicherten Daten
DE69804115D1 (de) Datenübertragung auf einem nichtflüchtigen speichermedium
DE60021746D1 (de) Nichtflüchtiger speicher zum speichern von multibitdaten
DE69217761T2 (de) Lese- und Schreibschaltung für einen Speicher
DE69932872D1 (de) Magnetisches Dünnfilmelement, Speicherelement damit und Schreibe- und Leseverfahren mit einem solchen Speicherelement
DE69714763T2 (de) Nichtflüchtige speichermatrix mit gleichzeitiger lese- und schreiboperation
DE69910682D1 (de) Aufzeichnungsmedium, Datenaufzeichnungseinheit und Datenwiedergabeeinheit zum Lesen vom und Schreiben auf dem Aufzeichnungsmedium
DE69624323T2 (de) Magnetoresistives Element, magnetoresistiver Kopf und magnetoresistiver Speicher
DE69226928D1 (de) Verfahren und Direktspeicherzugriffssteuerung zum asynchronen Daten-Lesen von einem -Schreiben in einen Speicher mit verbessertem Durchfluss
DE69911591D1 (de) Leseschaltung für einen nichtflüchtigen Speicher
DE69637574D1 (de) Lese-/Schreibvorrichtung für eine Chipkarte
DE69815258D1 (de) Elektrisch programmier- und löschbarer nichtflüchtiger Speicher mit einem lese- und/oder schreibgeschützen Bereich einschliesslich zugehöriger elektronischer Schaltung
DE60136769D1 (de) Kohlestoffenthaltendes Material verwendender wiederbeschreibbarer Datenspeicher und Schreib-/Lesekopf
DE69619794D1 (de) Speicherzelle zum lesen und schreiben einer registerbank
DE69826573D1 (de) Speicheranordnung die Burstaddressierung zum Lesen und Schreiben erlaubt durch einen einzigen Addresseneingang
DE50002394D1 (de) Mehrwertiger magnetoresistiver schreib/lese-speicher sowie verfahren zum beschreiben und auslesen eines solchen speichers
DE59813416D1 (de) Verfahren und postalisches Gerät mit einer Chipkarten-Schreib/Leseeinheit zum Nachladen von Änderungsdaten per Chipkarte
DE69935106D1 (de) Datenschreib/lesegerät
WO2004032146A3 (en) Programmable magnetic memory device fp-mram

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: GLOBALFOUNDRIES, INC., GARAND CAYMAN, KY