DE69527227D1 - Halbleiterbauelement und Methode, welche eine Silizidreaktion ausnutzen, um anpassbare Verbindungen herzustellen - Google Patents

Halbleiterbauelement und Methode, welche eine Silizidreaktion ausnutzen, um anpassbare Verbindungen herzustellen

Info

Publication number
DE69527227D1
DE69527227D1 DE69527227T DE69527227T DE69527227D1 DE 69527227 D1 DE69527227 D1 DE 69527227D1 DE 69527227 T DE69527227 T DE 69527227T DE 69527227 T DE69527227 T DE 69527227T DE 69527227 D1 DE69527227 D1 DE 69527227D1
Authority
DE
Germany
Prior art keywords
semiconductor device
silicide reaction
make
connections
customizable connections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69527227T
Other languages
English (en)
Other versions
DE69527227T2 (de
Inventor
Tadahiro Ohmi
Hiroshi Suzuki
Takeo Yamashita
Mamoru Miyawaki
Yoshio Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Application granted granted Critical
Publication of DE69527227D1 publication Critical patent/DE69527227D1/de
Publication of DE69527227T2 publication Critical patent/DE69527227T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5252Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • H10B20/20Programmable ROM [PROM] devices comprising field-effect components
    • H10B20/25One-time programmable ROM [OTPROM] devices, e.g. using electrically-fusible links
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Read Only Memory (AREA)
DE69527227T 1994-04-28 1995-04-27 Halbleiterbauelement und Methode, welche eine Silizidreaktion ausnutzen, um anpassbare Verbindungen herzustellen Expired - Lifetime DE69527227T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP09092194A JP3501416B2 (ja) 1994-04-28 1994-04-28 半導体装置

Publications (2)

Publication Number Publication Date
DE69527227D1 true DE69527227D1 (de) 2002-08-08
DE69527227T2 DE69527227T2 (de) 2003-03-20

Family

ID=14011900

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69527227T Expired - Lifetime DE69527227T2 (de) 1994-04-28 1995-04-27 Halbleiterbauelement und Methode, welche eine Silizidreaktion ausnutzen, um anpassbare Verbindungen herzustellen

Country Status (5)

Country Link
US (1) US6051851A (de)
EP (1) EP0680087B1 (de)
JP (1) JP3501416B2 (de)
KR (1) KR100188974B1 (de)
DE (1) DE69527227T2 (de)

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JP2914494B2 (ja) * 1996-09-30 1999-06-28 日本電気株式会社 交流放電メモリ型プラズマディスプレイパネルの駆動方法
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US6229193B1 (en) * 1998-04-06 2001-05-08 California Institute Of Technology Multiple stage high power diode
US7157314B2 (en) 1998-11-16 2007-01-02 Sandisk Corporation Vertically stacked field programmable nonvolatile memory and method of fabrication
US6034882A (en) * 1998-11-16 2000-03-07 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
US8575719B2 (en) * 2000-04-28 2013-11-05 Sandisk 3D Llc Silicon nitride antifuse for use in diode-antifuse memory arrays
AU2001262953A1 (en) * 2000-04-28 2001-11-12 Matrix Semiconductor, Inc. Three-dimensional memory array and method of fabrication
JP4630443B2 (ja) 2000-10-23 2011-02-09 キヤノン株式会社 スパッタリングによる成膜方法
US6603678B2 (en) * 2001-01-11 2003-08-05 Hewlett-Packard Development Company, L.P. Thermally-assisted switching of magnetic memory elements
JP2002212720A (ja) 2001-01-23 2002-07-31 Canon Inc スパッタリング方法およびスパッタリング装置
DE10107664A1 (de) * 2001-02-19 2002-09-05 Infineon Technologies Ag Kontaktanordnung mit einer dielektrischen Fuse für ein IC-Speicherelement und Verfahren zur Herstellung einer solchen Kontaktanordnung
US6599796B2 (en) * 2001-06-29 2003-07-29 Hewlett-Packard Development Company, L.P. Apparatus and fabrication process to reduce crosstalk in pirm memory array
US6549447B1 (en) * 2001-10-31 2003-04-15 Peter Fricke Memory cell structure
US6703652B2 (en) 2002-01-16 2004-03-09 Hewlett-Packard Development Company, L.P. Memory structure and method making
US6853049B2 (en) * 2002-03-13 2005-02-08 Matrix Semiconductor, Inc. Silicide-silicon oxide-semiconductor antifuse device and method of making
US20030172533A1 (en) * 2002-03-15 2003-09-18 Alexander Pamela K. Scissors type element for sectioning and retaining a candle wick
US20030183868A1 (en) * 2002-04-02 2003-10-02 Peter Fricke Memory structures
US6753590B2 (en) * 2002-07-08 2004-06-22 International Business Machines Corporation High impedance antifuse
US6774458B2 (en) * 2002-07-23 2004-08-10 Hewlett Packard Development Company, L.P. Vertical interconnection structure and methods
US7800932B2 (en) * 2005-09-28 2010-09-21 Sandisk 3D Llc Memory cell comprising switchable semiconductor memory element with trimmable resistance
US7193889B2 (en) * 2004-02-11 2007-03-20 Hewlett-Packard Development Company, Lp. Switching of MRAM devices having soft magnetic reference layers
JP4045245B2 (ja) * 2004-02-12 2008-02-13 株式会社ルネサステクノロジ 半導体装置
US7015076B1 (en) * 2004-03-01 2006-03-21 Advanced Micro Devices, Inc. Selectable open circuit and anti-fuse element, and fabrication method therefor
US20080025069A1 (en) * 2006-07-31 2008-01-31 Scheuerlein Roy E Mixed-use memory array with different data states
US7450414B2 (en) * 2006-07-31 2008-11-11 Sandisk 3D Llc Method for using a mixed-use memory array
US7486537B2 (en) * 2006-07-31 2009-02-03 Sandisk 3D Llc Method for using a mixed-use memory array with different data states
JP5296360B2 (ja) * 2006-10-04 2013-09-25 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
CN102646681B (zh) * 2006-10-04 2015-08-05 株式会社半导体能源研究所 半导体器件
JP5214213B2 (ja) * 2006-10-24 2013-06-19 株式会社半導体エネルギー研究所 記憶装置の駆動方法
US7782651B2 (en) 2006-10-24 2010-08-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device including storage device and method for driving the same
EP2076924B1 (de) * 2006-11-17 2017-03-08 Semiconductor Energy Laboratory Co, Ltd. Nichtlöschbares Speicherelement und Verfahren zu seiner Herstellung
KR101416876B1 (ko) 2006-11-17 2014-07-08 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제조방법
KR101485926B1 (ko) * 2007-02-02 2015-02-04 가부시키가이샤 한도오따이 에네루기 켄큐쇼 기억장치
JP5263757B2 (ja) 2007-02-02 2013-08-14 株式会社半導体エネルギー研究所 半導体装置の作製方法
US20080191990A1 (en) * 2007-02-08 2008-08-14 Nec Electronics Corporation Driver and display method using the same
US8283724B2 (en) 2007-02-26 2012-10-09 Semiconductor Energy Laboratory Co., Ltd. Memory element and semiconductor device, and method for manufacturing the same
US20080211540A1 (en) * 2007-02-28 2008-09-04 Shinobu Fujita Programmable anti-fuse based on, e.g., zncds memory devices for fpga and other applications
US7674691B2 (en) * 2007-03-07 2010-03-09 International Business Machines Corporation Method of manufacturing an electrical antifuse
JP5525694B2 (ja) * 2007-03-14 2014-06-18 株式会社半導体エネルギー研究所 半導体装置及び半導体装置の作製方法
JP5255870B2 (ja) * 2007-03-26 2013-08-07 株式会社半導体エネルギー研究所 記憶素子の作製方法
US7718546B2 (en) * 2007-06-27 2010-05-18 Sandisk 3D Llc Method for fabricating a 3-D integrated circuit using a hard mask of silicon-oxynitride on amorphous carbon
US7872934B2 (en) 2007-12-14 2011-01-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for writing data into memory
JP5371400B2 (ja) * 2007-12-14 2013-12-18 株式会社半導体エネルギー研究所 メモリ及び半導体装置
JP2010028105A (ja) 2008-06-20 2010-02-04 Semiconductor Energy Lab Co Ltd 記憶素子及び記憶素子の作製方法
WO2010026865A1 (en) 2008-09-05 2010-03-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device and semiconductor device
CN102160178B (zh) * 2008-09-19 2013-06-19 株式会社半导体能源研究所 半导体器件
CN102150268B (zh) * 2008-09-30 2013-07-31 株式会社半导体能源研究所 半导体存储器件
JP2010165442A (ja) * 2009-01-19 2010-07-29 Toshiba Corp 不揮発性半導体記憶装置
JP5268192B2 (ja) * 2009-02-26 2013-08-21 株式会社半導体エネルギー研究所 Otpメモリの検査方法、otpメモリの作製方法、および半導体装置の作製方法
JP2010267368A (ja) * 2009-04-17 2010-11-25 Semiconductor Energy Lab Co Ltd 半導体記憶装置
US8686508B2 (en) 2009-09-03 2014-04-01 International Business Machines Corporation Structures, methods and applications for electrical pulse anneal processes
JP5641840B2 (ja) 2009-10-01 2014-12-17 株式会社半導体エネルギー研究所 半導体装置
TWI493416B (zh) * 2010-01-07 2015-07-21 Novatek Microelectronics Corp 觸控感測系統、電容感測裝置及電容感測方法
KR101299256B1 (ko) 2010-01-29 2013-08-22 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기억 장치
KR101321833B1 (ko) 2010-04-09 2013-10-23 가부시키가이샤 한도오따이 에네루기 켄큐쇼 산화물 반도체 메모리 장치
US8519509B2 (en) 2010-04-16 2013-08-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US8692243B2 (en) 2010-04-20 2014-04-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
JP2012234885A (ja) * 2011-04-28 2012-11-29 Toshiba Corp 半導体装置及びその製造方法
US9490344B2 (en) 2012-01-09 2016-11-08 Globalfoundries Inc. Methods of making transistor devices with elevated source/drain regions to accommodate consumption during metal silicide formation process
JP6088152B2 (ja) * 2012-04-13 2017-03-01 ラピスセミコンダクタ株式会社 不揮発性メモリ、及び半導体装置
US9754903B2 (en) * 2015-10-29 2017-09-05 Globalfoundries Inc. Semiconductor structure with anti-efuse device

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Also Published As

Publication number Publication date
EP0680087B1 (de) 2002-07-03
EP0680087A2 (de) 1995-11-02
DE69527227T2 (de) 2003-03-20
JPH07297293A (ja) 1995-11-10
US6051851A (en) 2000-04-18
EP0680087A3 (de) 1996-10-02
JP3501416B2 (ja) 2004-03-02
KR950030267A (ko) 1995-11-24
KR100188974B1 (ko) 1999-06-01

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