DE69434906D1 - Elektronisches System zum Abschluss von Busleitungen - Google Patents
Elektronisches System zum Abschluss von BusleitungenInfo
- Publication number
- DE69434906D1 DE69434906D1 DE69434906T DE69434906T DE69434906D1 DE 69434906 D1 DE69434906 D1 DE 69434906D1 DE 69434906 T DE69434906 T DE 69434906T DE 69434906 T DE69434906 T DE 69434906T DE 69434906 D1 DE69434906 D1 DE 69434906D1
- Authority
- DE
- Germany
- Prior art keywords
- electronic system
- bus lines
- terminating bus
- terminating
- lines
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/028—Arrangements specific to the transmitter end
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
- H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018557—Coupling arrangements; Impedance matching circuits
- H03K19/018571—Coupling arrangements; Impedance matching circuits of complementary type, e.g. CMOS
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0278—Arrangements for impedance matching
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0298—Arrangement for terminating transmission lines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0266—Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0292—Arrangements specific to the receiver end
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Logic Circuits (AREA)
- Dram (AREA)
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29766993A JP3170980B2 (ja) | 1993-11-29 | 1993-11-29 | 半導体集積回路 |
JP29766993 | 1993-11-29 | ||
JP03047094A JP3146829B2 (ja) | 1994-02-28 | 1994-02-28 | 半導体集積回路 |
JP3050194 | 1994-02-28 | ||
JP03050194A JP3147642B2 (ja) | 1994-02-28 | 1994-02-28 | 電子装置、集積回路及び終端装置 |
JP3047094 | 1994-02-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69434906D1 true DE69434906D1 (de) | 2007-02-15 |
DE69434906T2 DE69434906T2 (de) | 2007-08-30 |
Family
ID=27286971
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69434906T Expired - Fee Related DE69434906T2 (de) | 1993-11-29 | 1994-11-25 | Integrierte Halbleiterschaltung und Abschlussvorrichtung |
DE69434903T Expired - Fee Related DE69434903T2 (de) | 1993-11-29 | 1994-11-25 | Elektronisches System zum Abschluss von Busleitungen |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69434903T Expired - Fee Related DE69434903T2 (de) | 1993-11-29 | 1994-11-25 | Elektronisches System zum Abschluss von Busleitungen |
Country Status (5)
Country | Link |
---|---|
US (2) | US6160417A (de) |
EP (3) | EP0655839B1 (de) |
KR (1) | KR0157096B1 (de) |
CN (2) | CN1271531C (de) |
DE (2) | DE69434906T2 (de) |
Families Citing this family (65)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5546016A (en) * | 1995-07-03 | 1996-08-13 | Intel Corporation | MOS termination for low power signaling |
JP3195913B2 (ja) * | 1996-04-30 | 2001-08-06 | 株式会社東芝 | 半導体集積回路装置 |
CN100356362C (zh) * | 1996-06-07 | 2007-12-19 | 株式会社日立制作所 | 信号传输装置 |
JP2910679B2 (ja) * | 1996-07-04 | 1999-06-23 | 日本電気株式会社 | 半導体集積回路 |
GB2322042B (en) * | 1997-02-05 | 2002-02-06 | Ericsson Telefon Ab L M | Radio architecture |
TW381385B (en) * | 1997-08-20 | 2000-02-01 | Advantest Corp | Signal transmission circuit, CMOS semiconductor device and circuit board |
WO1999053627A1 (en) | 1998-04-10 | 1999-10-21 | Chrimar Systems, Inc. Doing Business As Cms Technologies | System for communicating with electronic equipment on a network |
KR100351019B1 (ko) * | 1998-04-23 | 2002-08-30 | 마쯔시다덴기산교 가부시키가이샤 | 전원 공급 회로 및 반도체 칩 설계 방법 |
JP2000012787A (ja) * | 1998-06-10 | 2000-01-14 | Lucent Technol Inc | 集積回路デバイスおよび集積回路に用いる抵抗性素子を形成する方法 |
US6067596A (en) * | 1998-09-15 | 2000-05-23 | Compaq Computer Corporation | Flexible placement of GTL end points using double termination points |
US6108740A (en) * | 1998-10-14 | 2000-08-22 | Lsi Logic Corporation | Method and apparatus for terminating a bus such that stub length requirements are met |
US6222389B1 (en) | 1999-03-25 | 2001-04-24 | International Business Machines Corporation | Assisted gunning transceiver logic (AGTL) bus driver |
US6212591B1 (en) | 1999-04-02 | 2001-04-03 | Cradle Technologies | Configurable I/O circuitry defining virtual ports |
JP3849835B2 (ja) * | 1999-06-23 | 2006-11-22 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
JP2001068626A (ja) * | 1999-08-27 | 2001-03-16 | Mitsubishi Electric Corp | 半導体装置 |
US6380787B1 (en) * | 1999-08-31 | 2002-04-30 | Micron Technology, Inc. | Integrated circuit and method for minimizing clock skews |
US6271704B1 (en) * | 1999-12-14 | 2001-08-07 | Intel Corporation | Method and apparatus for balancing current in a system with two sets of termination devices |
US6356106B1 (en) * | 2000-09-12 | 2002-03-12 | Micron Technology, Inc. | Active termination in a multidrop memory system |
KR100340285B1 (ko) * | 2000-10-24 | 2002-06-15 | 윤종용 | 복수의 인쇄회로기판이 상호 직렬 접속된 메모리 모듈 |
US6323687B1 (en) | 2000-11-03 | 2001-11-27 | Fujitsu Limited | Output drivers for integrated-circuit chips with VCCQ supply compensation |
JP2002251890A (ja) * | 2001-02-26 | 2002-09-06 | Mitsubishi Electric Corp | 信号増幅回路およびそれを備える半導体記憶装置 |
GB2386484A (en) * | 2002-03-14 | 2003-09-17 | Sharp Kk | Level shifting and active matrix driver |
US7280574B1 (en) * | 2002-05-15 | 2007-10-09 | Cypress Semiconductor Corp. | Circuit for driving a laser diode and method |
JP2004039689A (ja) * | 2002-06-28 | 2004-02-05 | Sony Corp | 電子回路装置 |
US6836142B2 (en) * | 2002-07-12 | 2004-12-28 | Xilinx, Inc. | Asymmetric bidirectional bus implemented using an I/O device with a digitally controlled impedance |
US6963218B1 (en) * | 2002-08-09 | 2005-11-08 | Xilinx, Inc. | Bi-directional interface and communication link |
US6922071B2 (en) * | 2002-12-27 | 2005-07-26 | Intel Corporation | Setting multiple chip parameters using one IC terminal |
FR2849972B1 (fr) * | 2003-01-10 | 2005-03-04 | Somfy Sas | Installation permettant l'echange d'informations entre un emetteur et un recepteur. |
US6922076B2 (en) * | 2003-08-27 | 2005-07-26 | International Business Machines Corporation | Scalable termination |
DE10352812B4 (de) * | 2003-11-12 | 2008-08-14 | Infineon Technologies Ag | Verfahren und Schaltungsanordnung zur Erzeugung ternärer Signale |
JP4275583B2 (ja) * | 2004-06-24 | 2009-06-10 | ユーディナデバイス株式会社 | 電子モジュール |
US7242249B2 (en) * | 2005-02-11 | 2007-07-10 | International Business Machines Corporation | Peaking transmission line receiver for logic signals |
KR100697281B1 (ko) | 2005-03-17 | 2007-03-20 | 삼성전자주식회사 | 패키지 저항 변화에 따른 임피던스 부정합과 전압강하를방지할 수 있는 수신 방법 및 장치 |
US7358758B2 (en) * | 2005-10-18 | 2008-04-15 | Via Technologies, Inc. | Apparatus and method for enabling a multi-processor environment on a bus |
JP2007227625A (ja) * | 2006-02-23 | 2007-09-06 | Toshiba Microelectronics Corp | 半導体集積回路及びそのレイアウト設計方法 |
US20080270037A1 (en) * | 2007-04-30 | 2008-10-30 | Masato Nakada | System and method for measuring and displaying health information |
US7646213B2 (en) * | 2007-05-16 | 2010-01-12 | Micron Technology, Inc. | On-die system and method for controlling termination impedance of memory device data bus terminals |
US8301093B2 (en) * | 2007-06-05 | 2012-10-30 | Panasonic Corporation | Receiver circuit and data transmission system |
US20090091963A1 (en) * | 2007-10-04 | 2009-04-09 | Advanced Micro Devices, Inc. | Memory device |
US7750666B2 (en) * | 2008-09-15 | 2010-07-06 | Integrated Device Technology, Inc. | Reduced power differential type termination circuit |
US7843225B2 (en) * | 2009-04-14 | 2010-11-30 | Via Technologies, Inc. | Protocol-based bus termination for multi-core processors |
US7767492B1 (en) | 2009-04-14 | 2010-08-03 | Via Technologies, Inc. | Location-based bus termination for multi-core/multi-package processor configurations |
US8242802B2 (en) * | 2009-04-14 | 2012-08-14 | Via Technologies, Inc. | Location-based bus termination for multi-core processors |
US8085062B2 (en) * | 2009-04-14 | 2011-12-27 | Via Technologies, Inc. | Configurable bus termination for multi-core/multi-package processor configurations |
JP5726635B2 (ja) * | 2010-08-25 | 2015-06-03 | 株式会社Nttドコモ | マルチモードフロントエンド回路 |
CN102243481B (zh) * | 2011-03-28 | 2013-04-24 | 上海华为技术有限公司 | 实现不同电源供电的模块之间互联的装置、方法及电路 |
US8848462B2 (en) * | 2011-10-11 | 2014-09-30 | Mediatek Inc. | Low power memory controllers |
US10698432B2 (en) * | 2013-03-13 | 2020-06-30 | Intel Corporation | Dual loop digital low drop regulator and current sharing control apparatus for distributable voltage regulators |
WO2016164019A1 (en) * | 2015-04-09 | 2016-10-13 | Hewlett Packard Enterprise Development Lp | Termination voltage circuits |
CN104882869A (zh) * | 2015-06-11 | 2015-09-02 | 国网四川省电力公司南充供电公司 | 移动设备数据接口保护电路 |
FI20150294A (fi) * | 2015-10-23 | 2017-04-24 | Ari Paasio | Matalan tehonkulutuksen logiikkaperhe |
US10348270B2 (en) | 2016-12-09 | 2019-07-09 | Micron Technology, Inc. | Apparatuses and methods for calibrating adjustable impedances of a semiconductor device |
JP2018133503A (ja) * | 2017-02-16 | 2018-08-23 | 東芝メモリ株式会社 | 半導体記憶装置 |
CN107277660B (zh) * | 2017-06-07 | 2019-10-15 | 上海乐野网络科技有限公司 | 一种提高动态范围和压摆率的耳放电路 |
US10193711B2 (en) | 2017-06-22 | 2019-01-29 | Micron Technology, Inc. | Timing based arbitration methods and apparatuses for calibrating impedances of a semiconductor device |
KR102347178B1 (ko) * | 2017-07-19 | 2022-01-04 | 삼성전자주식회사 | 기준 전압 회로를 포함하는 단말 장치 |
US10615798B2 (en) | 2017-10-30 | 2020-04-07 | Micron Technology, Inc. | Apparatuses and methods for identifying memory devices of a semiconductor device sharing an external resistance |
CN108540295B (zh) * | 2018-04-10 | 2021-05-07 | 武汉虹创联众科技有限公司 | 一种单总线通信电路 |
US10916288B1 (en) * | 2019-07-18 | 2021-02-09 | Micron Technology, Inc. | Sensing techniques for a memory cell |
US10729002B2 (en) * | 2019-07-18 | 2020-07-28 | Intel Corporation | Device, system and method to mitigate signal noise in communications with a memory module |
US10747245B1 (en) | 2019-11-19 | 2020-08-18 | Micron Technology, Inc. | Apparatuses and methods for ZQ calibration |
US10892759B1 (en) * | 2020-02-19 | 2021-01-12 | Amazing Microelectronic Corp. | Bus driver module with controlled circuit and transition controlled circuit thereof |
CN111586969B (zh) * | 2020-04-28 | 2021-12-21 | 中国科学院计算技术研究所 | 电路布线方法、ddr4内存电路及电子设备 |
JP2022088984A (ja) * | 2020-12-03 | 2022-06-15 | 株式会社日立製作所 | 制御装置 |
KR20240006614A (ko) * | 2021-05-07 | 2024-01-15 | 블루마인드 인크. | 트랜지스터 기반 신경망을 위한 시스템, 방법 및 컴퓨터 디바이스 |
Family Cites Families (23)
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US3631528A (en) * | 1970-08-14 | 1971-12-28 | Robert S Green | Low-power consumption complementary driver and complementary bipolar buffer circuits |
JPS59117323A (ja) * | 1982-12-23 | 1984-07-06 | Mitsubishi Electric Corp | 抵抗モジユ−ル |
US4591745A (en) * | 1984-01-16 | 1986-05-27 | Itt Corporation | Power-on reset pulse generator |
US4647797A (en) * | 1984-08-23 | 1987-03-03 | Ncr Corporation | Assist circuit for improving the rise time of an electronic signal |
US4766334A (en) * | 1986-03-07 | 1988-08-23 | The Singer Company | Level clamp for Tri-state CMOS bus structure |
JPS6342215A (ja) * | 1986-08-07 | 1988-02-23 | Canon Inc | 電子機器 |
JPH0728214B2 (ja) * | 1987-02-06 | 1995-03-29 | 株式会社日立製作所 | 半導体集積回路装置 |
US4871931A (en) * | 1987-10-30 | 1989-10-03 | Gazelle Microcircuits, Inc. | Logic circuit resistant to errors due to supply fluctuations |
US4808855A (en) * | 1987-12-16 | 1989-02-28 | Intel Corporation | Distributed precharge wire-or bus |
JP2573320B2 (ja) * | 1988-07-11 | 1997-01-22 | 株式会社東芝 | 出力バッファ回路 |
US5019729A (en) * | 1988-07-27 | 1991-05-28 | Kabushiki Kaisha Toshiba | TTL to CMOS buffer circuit |
GB2234872B (en) * | 1989-08-03 | 1994-04-06 | Plessey Co Plc | High speed CMOS differential interface circuits |
IT1231052B (it) * | 1989-09-27 | 1991-11-12 | Bull Hn Information Syst | Alimentatore a commutazione con piu' uscite, regolazione di una tensione di uscita e compensazione di carico. |
US4994690A (en) * | 1990-01-29 | 1991-02-19 | Motorola, Inc. | Split level bus |
US5132564A (en) * | 1990-07-27 | 1992-07-21 | North American Philips Corp. | Bus driver circuit with low on-chip dissipation and/or pre-biasing of output terminal during live insertion |
JPH04150731A (ja) * | 1990-10-09 | 1992-05-25 | Matsushita Electric Ind Co Ltd | 電源装置 |
GB2254227B (en) * | 1990-12-20 | 1995-08-16 | Murata Manufacturing Co | Bus terminating circuit |
US5266847A (en) * | 1990-12-28 | 1993-11-30 | National Semiconductor Corporation | High speed data transceiver |
US5149992A (en) * | 1991-04-30 | 1992-09-22 | The State Of Oregon Acting By And Through The State Board Of Higher Education On Behalf Of Oregon State University | MOS folded source-coupled logic |
EP0533971A1 (de) * | 1991-09-24 | 1993-03-31 | Siemens Aktiengesellschaft | Schnittstellenschaltung |
US5227677A (en) * | 1992-06-10 | 1993-07-13 | International Business Machines Corporation | Zero power transmission line terminator |
US5347177A (en) * | 1993-01-14 | 1994-09-13 | Lipp Robert J | System for interconnecting VLSI circuits with transmission line characteristics |
US5471498A (en) * | 1993-04-15 | 1995-11-28 | National Semiconductor Corporation | High-speed low-voltage differential swing transmission line transceiver |
-
1994
- 1994-11-25 DE DE69434906T patent/DE69434906T2/de not_active Expired - Fee Related
- 1994-11-25 EP EP94118585A patent/EP0655839B1/de not_active Expired - Lifetime
- 1994-11-25 EP EP05009867A patent/EP1564947B1/de not_active Expired - Lifetime
- 1994-11-25 DE DE69434903T patent/DE69434903T2/de not_active Expired - Fee Related
- 1994-11-25 EP EP03025514A patent/EP1392028A1/de not_active Withdrawn
- 1994-11-28 CN CNB031430554A patent/CN1271531C/zh not_active Expired - Fee Related
- 1994-11-28 CN CNB941189724A patent/CN1158611C/zh not_active Expired - Fee Related
- 1994-11-28 US US08/351,064 patent/US6160417A/en not_active Expired - Fee Related
- 1994-11-29 KR KR1019940032390A patent/KR0157096B1/ko not_active IP Right Cessation
-
1996
- 1996-09-10 US US08/715,358 patent/US5729154A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5729154A (en) | 1998-03-17 |
EP1564947A1 (de) | 2005-08-17 |
US6160417A (en) | 2000-12-12 |
EP1564947B1 (de) | 2006-12-27 |
EP0655839A2 (de) | 1995-05-31 |
EP1392028A1 (de) | 2004-02-25 |
DE69434903D1 (de) | 2007-02-08 |
DE69434903T2 (de) | 2007-04-26 |
EP0655839A3 (de) | 1996-07-17 |
CN1271531C (zh) | 2006-08-23 |
KR0157096B1 (ko) | 1999-02-18 |
CN1516028A (zh) | 2004-07-28 |
DE69434906T2 (de) | 2007-08-30 |
CN1117614A (zh) | 1996-02-28 |
CN1158611C (zh) | 2004-07-21 |
EP0655839B1 (de) | 2007-01-03 |
KR950016005A (ko) | 1995-06-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |