DE69430968T2 - Heterojunction-Verbundhalbleitervorrichtung und Verfahren zu ihrer Herstellung - Google Patents

Heterojunction-Verbundhalbleitervorrichtung und Verfahren zu ihrer Herstellung

Info

Publication number
DE69430968T2
DE69430968T2 DE69430968T DE69430968T DE69430968T2 DE 69430968 T2 DE69430968 T2 DE 69430968T2 DE 69430968 T DE69430968 T DE 69430968T DE 69430968 T DE69430968 T DE 69430968T DE 69430968 T2 DE69430968 T2 DE 69430968T2
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor device
same
compound semiconductor
heterojunction compound
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69430968T
Other languages
English (en)
Other versions
DE69430968D1 (de
Inventor
Hiroyuki Oguri
Teruo Yokoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE69430968D1 publication Critical patent/DE69430968D1/de
Publication of DE69430968T2 publication Critical patent/DE69430968T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32917—Plasma diagnostics
    • H01J37/32935—Monitoring and controlling tubes by information coming from the object and/or discharge
    • H01J37/32972—Spectral analysis
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F4/00—Processes for removing metallic material from surfaces, not provided for in group C23F1/00 or C23F3/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H01L21/30612—Etching of AIIIBV compounds
    • H01L21/30621—Vapour phase etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8252—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using III-V technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Plasma Technology (AREA)
  • ing And Chemical Polishing (AREA)
DE69430968T 1993-04-30 1994-03-31 Heterojunction-Verbundhalbleitervorrichtung und Verfahren zu ihrer Herstellung Expired - Fee Related DE69430968T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5104506A JPH06314668A (ja) 1993-04-30 1993-04-30 プラズマエッチング方法及びプラズマエッチング装置

Publications (2)

Publication Number Publication Date
DE69430968D1 DE69430968D1 (de) 2002-08-22
DE69430968T2 true DE69430968T2 (de) 2002-11-07

Family

ID=14382388

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69430968T Expired - Fee Related DE69430968T2 (de) 1993-04-30 1994-03-31 Heterojunction-Verbundhalbleitervorrichtung und Verfahren zu ihrer Herstellung

Country Status (4)

Country Link
US (2) US5837617A (de)
EP (2) EP0622835B1 (de)
JP (1) JPH06314668A (de)
DE (1) DE69430968T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3416532B2 (ja) * 1998-06-15 2003-06-16 富士通カンタムデバイス株式会社 化合物半導体装置及びその製造方法
JP3266109B2 (ja) * 1998-08-05 2002-03-18 株式会社村田製作所 電子デバイスの作製方法
US6528827B2 (en) 2000-11-10 2003-03-04 Optolynx, Inc. MSM device and method of manufacturing same
US7808016B2 (en) * 2006-09-14 2010-10-05 Teledyne Licensing, Llc Heterogeneous integration of low noise amplifiers with power amplifiers or switches
JP5678485B2 (ja) * 2009-08-03 2015-03-04 ソニー株式会社 半導体装置
JP2012094774A (ja) * 2010-10-28 2012-05-17 Sony Corp 半導体装置
US20150041820A1 (en) * 2013-08-12 2015-02-12 Philippe Renaud Complementary gallium nitride integrated circuits and methods of their fabrication
JP6316224B2 (ja) 2015-02-17 2018-04-25 東芝メモリ株式会社 半導体製造装置および半導体装置の製造方法
US10340128B2 (en) * 2015-07-16 2019-07-02 Toshiba Memory Corporation Apparatus, method and nontransitory computer readable medium for manufacturing integrated circuit device

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58206126A (ja) * 1982-05-26 1983-12-01 Hitachi Ltd 多層膜のプラズマエツチング方法
JPS60117631A (ja) * 1983-11-30 1985-06-25 Toshiba Corp 化合物半導体のドライエッチング方法
US4615102A (en) * 1984-05-01 1986-10-07 Fujitsu Limited Method of producing enhancement mode and depletion mode FETs
JPS6122629A (ja) * 1984-07-11 1986-01-31 Hitachi Ltd プラズマエツチング方法
JPH0628314B2 (ja) * 1986-09-13 1994-04-13 富士通株式会社 高速半導体装置の製造方法
JPS6412581A (en) * 1987-07-02 1989-01-17 Ibm Semiconductor device structure
EP0348944B1 (de) * 1988-06-28 1997-10-22 Nec Corporation Halbleitervorrichtung mit Verbindungshalbleiterfet mit E/D-Struktur mit hoher Geräuschmarge
JP2630445B2 (ja) * 1988-10-08 1997-07-16 富士通株式会社 半導体装置
JPH03233966A (ja) * 1990-02-08 1991-10-17 Sumitomo Electric Ind Ltd 半導体装置
US5160994A (en) * 1990-02-19 1992-11-03 Nec Corporation Heterojunction bipolar transistor with improved base layer
JPH04221825A (ja) * 1990-12-24 1992-08-12 Nec Corp 選択ドライエッチング方法
US5291042A (en) * 1991-04-26 1994-03-01 Sumitomo Electric Industries, Ltd. Multi-stage amplifier device and method for producing the same
JP3298161B2 (ja) * 1991-10-29 2002-07-02 ソニー株式会社 ドライエッチング方法
JPH05267243A (ja) * 1992-03-19 1993-10-15 Matsushita Electric Ind Co Ltd ドライエッチングガスおよびそれを用いたドライエッチング方法
FR2697945B1 (fr) * 1992-11-06 1995-01-06 Thomson Csf Procédé de gravure d'une hétérostructure de matériaux du groupe III-V.
JP3326704B2 (ja) * 1993-09-28 2002-09-24 富士通株式会社 Ｉｉｉ／ｖ系化合物半導体装置の製造方法

Also Published As

Publication number Publication date
EP0622835A1 (de) 1994-11-02
EP0622835B1 (de) 2002-07-17
JPH06314668A (ja) 1994-11-08
DE69430968D1 (de) 2002-08-22
US6153897A (en) 2000-11-28
EP1179854A1 (de) 2002-02-13
US5837617A (en) 1998-11-17

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Legal Events

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8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee