DE69408320D1 - Vorrichtung und verfahren zum einstellen der schwellenspannung von mos-transistoren - Google Patents

Vorrichtung und verfahren zum einstellen der schwellenspannung von mos-transistoren

Info

Publication number
DE69408320D1
DE69408320D1 DE69408320T DE69408320T DE69408320D1 DE 69408320 D1 DE69408320 D1 DE 69408320D1 DE 69408320 T DE69408320 T DE 69408320T DE 69408320 T DE69408320 T DE 69408320T DE 69408320 D1 DE69408320 D1 DE 69408320D1
Authority
DE
Germany
Prior art keywords
adjusting
threshold voltage
mos transistors
mos
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69408320T
Other languages
English (en)
Other versions
DE69408320T2 (de
Inventor
Richard Merrill
Doug Farrenkopf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of DE69408320D1 publication Critical patent/DE69408320D1/de
Application granted granted Critical
Publication of DE69408320T2 publication Critical patent/DE69408320T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G11C5/146—Substrate bias generators
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G05F3/242—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE69408320T 1993-04-05 1994-04-04 Vorrichtung und verfahren zum einstellen der schwellenspannung von mos-transistoren Expired - Lifetime DE69408320T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/042,725 US5397934A (en) 1993-04-05 1993-04-05 Apparatus and method for adjusting the threshold voltage of MOS transistors
PCT/US1994/003655 WO1994023353A1 (en) 1993-04-05 1994-04-04 Apparatus and method for adjusting the threshold voltage of mos transistors

Publications (2)

Publication Number Publication Date
DE69408320D1 true DE69408320D1 (de) 1998-03-05
DE69408320T2 DE69408320T2 (de) 1998-08-27

Family

ID=21923429

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69408320T Expired - Lifetime DE69408320T2 (de) 1993-04-05 1994-04-04 Vorrichtung und verfahren zum einstellen der schwellenspannung von mos-transistoren

Country Status (7)

Country Link
US (1) US5397934A (de)
EP (1) EP0704072B1 (de)
JP (2) JPH08508600A (de)
KR (1) KR100314892B1 (de)
DE (1) DE69408320T2 (de)
TW (1) TW238424B (de)
WO (1) WO1994023353A1 (de)

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JP2874583B2 (ja) * 1995-02-10 1999-03-24 日本電気株式会社 半導体装置の入力保護回路
JP3109560B2 (ja) * 1995-02-10 2000-11-20 日本電気株式会社 ばらつき補償技術による半導体集積回路
FR2734378B1 (fr) * 1995-05-17 1997-07-04 Suisse Electronique Microtech Circuit integre dans lequel certains composants fonctionnels sont amenes a travailler avec une meme caracteristique de fonctionnement
US5760631A (en) * 1996-04-24 1998-06-02 Winbond Electronics Corp. Protection circuit for a CMOS integrated circuit
JPH09293789A (ja) * 1996-04-24 1997-11-11 Mitsubishi Electric Corp 半導体集積回路
US5939934A (en) * 1996-12-03 1999-08-17 Stmicroelectronics, Inc. Integrated circuit passively biasing transistor effective threshold voltage and related methods
US5883544A (en) * 1996-12-03 1999-03-16 Stmicroelectronics, Inc. Integrated circuit actively biasing the threshold voltage of transistors and related methods
US5834966A (en) * 1996-12-08 1998-11-10 Stmicroelectronics, Inc. Integrated circuit sensing and digitally biasing the threshold voltage of transistors and related methods
US5929695A (en) * 1997-06-02 1999-07-27 Stmicroelectronics, Inc. Integrated circuit having selective bias of transistors for low voltage and low standby current and related methods
US6091283A (en) * 1998-02-24 2000-07-18 Sun Microsystems, Inc. Sub-threshold leakage tuning circuit
JP3164060B2 (ja) * 1998-05-13 2001-05-08 日本電気株式会社 閾値測定機能を備える半導体集積回路
DE19911463C1 (de) * 1999-03-15 2001-02-08 Siemens Ag Leseverstärkeranordnung mit Feldeffekttransistor mit kurzer Kanallänge und einstellbarer Einsatzspannung
DE19950543C1 (de) * 1999-10-20 2000-11-23 Infineon Technologies Ag Integrierte Schaltung mit Regelung der Einsatzspannungen ihrer Transistoren
US6281731B1 (en) 1999-10-27 2001-08-28 International Business Machines Corporation Control of hysteresis characteristic within a CMOS differential receiver
JP2001306165A (ja) * 2000-04-18 2001-11-02 Seiko Instruments Inc 電圧検出回路
US6252806B1 (en) * 2000-05-26 2001-06-26 International Business Machines Corporation Multi-generator, partial array Vt tracking system to improve array retention time
KR100494346B1 (ko) * 2000-10-09 2005-06-13 주식회사 하이닉스반도체 자동 트리밍 기준 전압 발생기
US6487701B1 (en) 2000-11-13 2002-11-26 International Business Machines Corporation System and method for AC performance tuning by thereshold voltage shifting in tubbed semiconductor technology
US6429726B1 (en) * 2001-03-27 2002-08-06 Intel Corporation Robust forward body bias generation circuit with digital trimming for DC power supply variation
US6605981B2 (en) 2001-04-26 2003-08-12 International Business Machines Corporation Apparatus for biasing ultra-low voltage logic circuits
US6518827B1 (en) * 2001-07-27 2003-02-11 International Business Machines Corporation Sense amplifier threshold compensation
US6859102B2 (en) * 2001-09-27 2005-02-22 Powerq Technologies, Inc. Amplifier circuit and method
US6784744B2 (en) * 2001-09-27 2004-08-31 Powerq Technologies, Inc. Amplifier circuits and methods
US6731157B2 (en) * 2002-01-15 2004-05-04 Honeywell International Inc. Adaptive threshold voltage control with positive body bias for N and P-channel transistors
WO2004015867A1 (en) * 2002-08-08 2004-02-19 Koninklijke Philips Electronics N.V. Circuit and method for controlling the threshold voltage of transistors
JP2004165649A (ja) * 2002-10-21 2004-06-10 Matsushita Electric Ind Co Ltd 半導体集積回路装置
US6936898B2 (en) * 2002-12-31 2005-08-30 Transmeta Corporation Diagonal deep well region for routing body-bias voltage for MOSFETS in surface well regions
JP3838655B2 (ja) * 2003-02-25 2006-10-25 松下電器産業株式会社 半導体集積回路
JP4221274B2 (ja) * 2003-10-31 2009-02-12 株式会社東芝 半導体集積回路および電源電圧・基板バイアス制御回路
JP2005166698A (ja) * 2003-11-28 2005-06-23 Matsushita Electric Ind Co Ltd 半導体集積回路
US7236045B2 (en) * 2005-01-21 2007-06-26 Intel Corporation Bias generator for body bias
FR2890239B1 (fr) 2005-08-31 2008-02-01 St Microelectronics Crolles 2 Compensation des derives electriques de transistors mos
US20080122519A1 (en) * 2006-06-12 2008-05-29 Nowak Edward J Method and circuits for regulating threshold voltage in transistor devices
JP2008059680A (ja) * 2006-08-31 2008-03-13 Hitachi Ltd 半導体装置
US7667527B2 (en) * 2006-11-20 2010-02-23 International Business Machines Corporation Circuit to compensate threshold voltage variation due to process variation
US7545161B2 (en) * 2007-08-02 2009-06-09 International Business Machines Corporation Method and apparatus to measure threshold shifting of a MOSFET device and voltage difference between nodes
US20090167420A1 (en) * 2007-12-28 2009-07-02 International Business Machines Corporation Design structure for regulating threshold voltage in transistor devices
JP5649793B2 (ja) * 2009-03-30 2015-01-07 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体装置
JP5599983B2 (ja) 2009-03-30 2014-10-01 ピーエスフォー ルクスコ エスエイアールエル 半導体装置
US7994846B2 (en) * 2009-05-14 2011-08-09 International Business Machines Corporation Method and mechanism to reduce current variation in a current reference branch circuit
US8552795B2 (en) * 2009-10-22 2013-10-08 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate bias control circuit for system on chip
US8416011B2 (en) * 2010-11-08 2013-04-09 Lsi Corporation Circuit and method for generating body bias voltage for an integrated circuit
TWI487232B (zh) * 2011-09-13 2015-06-01 Fsp Technology Inc 阻尼器電路及將雙極性接面電晶體用於阻尼器電路之方法
EP2965427A1 (de) * 2013-03-07 2016-01-13 Stichting IMEC Nederland Schaltung und verfahren zur erkennung und kompensation einer transistorfehlanpassung
KR20160132405A (ko) * 2014-03-12 2016-11-18 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
CN106712754B (zh) * 2015-08-04 2023-10-20 意法半导体研发(深圳)有限公司 用于mos的自适应本体偏置的动态阈值发生器
JP2017224978A (ja) * 2016-06-15 2017-12-21 東芝メモリ株式会社 半導体装置
EP3488527A1 (de) 2016-07-22 2019-05-29 CSEM Centre Suisse d'Electronique et de Microtechnique SA - Recherche et Développement Kompensationsvorrichtung zur kompensation von pvt-schwankungen einer analogen und/oder digitalen schaltung
TWI829663B (zh) 2018-01-19 2024-01-21 日商半導體能源研究所股份有限公司 半導體裝置以及其工作方法
US11271566B2 (en) * 2018-12-14 2022-03-08 Integrated Device Technology, Inc. Digital logic compatible inputs in compound semiconductor circuits

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US4142114A (en) * 1977-07-18 1979-02-27 Mostek Corporation Integrated circuit with threshold regulation
JPS54148492A (en) * 1978-05-15 1979-11-20 Nec Corp Integrated circuit
US4323846A (en) * 1979-06-21 1982-04-06 Rockwell International Corporation Radiation hardened MOS voltage generator circuit
JPS5672530A (en) * 1979-11-19 1981-06-16 Nec Corp Semiconductor circuit
JPS57199335A (en) * 1981-06-02 1982-12-07 Toshiba Corp Generating circuit for substrate bias
JPS60143012A (ja) * 1984-10-24 1985-07-29 Hitachi Ltd 半導体集積回路装置
US4970413A (en) * 1987-10-28 1990-11-13 Gigabit Logic VBB-feedback threshold compensation
JP2809768B2 (ja) * 1989-11-30 1998-10-15 株式会社東芝 基準電位発生回路

Also Published As

Publication number Publication date
US5397934A (en) 1995-03-14
EP0704072A1 (de) 1996-04-03
WO1994023353A1 (en) 1994-10-13
KR100314892B1 (ko) 2002-02-28
TW238424B (de) 1995-01-11
JPH08508600A (ja) 1996-09-10
JP2006319372A (ja) 2006-11-24
EP0704072B1 (de) 1998-01-28
KR960702637A (ko) 1996-04-27
DE69408320T2 (de) 1998-08-27

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