DE69319021D1 - Eingangsschutzschaltung mit einer hohen Spannungsfestigkeit - Google Patents
Eingangsschutzschaltung mit einer hohen SpannungsfestigkeitInfo
- Publication number
- DE69319021D1 DE69319021D1 DE69319021T DE69319021T DE69319021D1 DE 69319021 D1 DE69319021 D1 DE 69319021D1 DE 69319021 T DE69319021 T DE 69319021T DE 69319021 T DE69319021 T DE 69319021T DE 69319021 D1 DE69319021 D1 DE 69319021D1
- Authority
- DE
- Germany
- Prior art keywords
- protection circuit
- high dielectric
- dielectric strength
- input protection
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/879,626 US5371395A (en) | 1992-05-06 | 1992-05-06 | High voltage input pad protection circuitry |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69319021D1 true DE69319021D1 (de) | 1998-07-16 |
DE69319021T2 DE69319021T2 (de) | 1998-12-10 |
Family
ID=25374531
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69319021T Expired - Fee Related DE69319021T2 (de) | 1992-05-06 | 1993-05-04 | Eingangsschutzschaltung mit einer hohen Spannungsfestigkeit |
Country Status (4)
Country | Link |
---|---|
US (1) | US5371395A (de) |
EP (1) | EP0569219B1 (de) |
JP (1) | JPH0621343A (de) |
DE (1) | DE69319021T2 (de) |
Families Citing this family (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5428498A (en) * | 1992-09-28 | 1995-06-27 | Xerox Corporation | Office environment level electrostatic discharge protection |
KR0166101B1 (ko) * | 1993-10-21 | 1999-01-15 | 김주용 | 정전방전 보호회로의 트랜지스터 및 그 제조방법 |
DE4423591C2 (de) * | 1994-07-06 | 1996-08-29 | Itt Ind Gmbh Deutsche | Schutzstruktur für integrierte Schaltungen |
US5733794A (en) * | 1995-02-06 | 1998-03-31 | Motorola, Inc. | Process for forming a semiconductor device with ESD protection |
US5701024A (en) * | 1995-10-05 | 1997-12-23 | Cypress Semiconductor Corp. | Electrostatic discharge (ESD) protection structure for high voltage pins |
KR100402672B1 (ko) * | 1995-10-31 | 2004-06-04 | 텍사스 인스트루먼츠 인코포레이티드 | CMOS/BiCMOS기술에서ESD방지를위한집적화된횡형구조 |
JP2787908B2 (ja) * | 1995-12-25 | 1998-08-20 | 日本電気株式会社 | 半導体装置の製造方法 |
JPH09248912A (ja) * | 1996-01-11 | 1997-09-22 | Canon Inc | インクジェットヘッド及びヘッド用基体、インクジェットカートリッジ、並びにインクジェット装置 |
US6071768A (en) * | 1996-05-17 | 2000-06-06 | Texas Instruments Incorporated | Method of making an efficient NPN turn-on in a high voltage DENMOS transistor for ESD protection |
TW320772B (en) * | 1996-09-23 | 1997-11-21 | United Microelectronics Corp | Protection component and production method for low voltage static discharge |
US5910873A (en) * | 1997-02-19 | 1999-06-08 | National Semiconductor Corporation | Field oxide transistor based feedback circuit for electrical overstress protection |
US6501136B1 (en) * | 1997-09-16 | 2002-12-31 | Winbond Electronics Corporation | High-speed MOSFET structure for ESD protection |
US5936284A (en) * | 1997-11-03 | 1999-08-10 | Sgs-Thomson Microelectronics S.R.L. | Electrostatic discharge protection circuit and transistor |
US5960290A (en) * | 1998-10-29 | 1999-09-28 | United Microelectronics Corp. | Method for fabricating a protection circuit of electrostatic discharge on a field device |
US6114194A (en) * | 1998-11-17 | 2000-09-05 | United Microelectronics Corp. | Method for fabricating a field device transistor |
US6487507B1 (en) * | 1999-10-15 | 2002-11-26 | Micro Motion, Inc. | Remote signal conditioner for a Coriolis flowmeter |
JP2002370363A (ja) * | 2001-06-15 | 2002-12-24 | Canon Inc | インクジェット記録ヘッド用基板、インクジェット記録ヘッド、インクジェット記録装置 |
JP2003072076A (ja) * | 2001-08-31 | 2003-03-12 | Canon Inc | 記録ヘッド及びその記録ヘッドを用いた記録装置 |
JP4125153B2 (ja) * | 2002-02-20 | 2008-07-30 | キヤノン株式会社 | 半導体装置及びそれを用いた液体吐出装置 |
US7021748B2 (en) * | 2002-07-19 | 2006-04-04 | Canon Kabushiki Kaisha | Ink jet head substrate, ink jet head using the substrate, and ink jet print apparatus |
US6940131B2 (en) * | 2003-06-30 | 2005-09-06 | Texas Instruments Incorporated | MOS ESD CDM clamp with integral substrate injection guardring and method for fabrication |
US7267430B2 (en) * | 2005-03-29 | 2007-09-11 | Lexmark International, Inc. | Heater chip for inkjet printhead with electrostatic discharge protection |
US7420842B1 (en) | 2005-08-24 | 2008-09-02 | Xilinx, Inc. | Method of programming a three-terminal non-volatile memory element using source-drain bias |
US7544968B1 (en) | 2005-08-24 | 2009-06-09 | Xilinx, Inc. | Non-volatile memory cell with charge storage element and method of programming |
US7687797B1 (en) | 2005-08-24 | 2010-03-30 | Xilinx, Inc. | Three-terminal non-volatile memory element with hybrid gate dielectric |
US7450431B1 (en) * | 2005-08-24 | 2008-11-11 | Xilinx, Inc. | PMOS three-terminal non-volatile memory element and method of programming |
US7361966B2 (en) * | 2006-02-13 | 2008-04-22 | Lexmark International, Inc. | Actuator chip for inkjet printhead with electrostatic discharge protection |
US8488288B2 (en) * | 2008-06-27 | 2013-07-16 | National Instruments Corporation | Input protection method with variable tripping threshold and low parasitic elements |
JP5121976B2 (ja) * | 2011-05-27 | 2013-01-16 | 株式会社東芝 | 半導体装置 |
JP5537683B2 (ja) * | 2013-01-21 | 2014-07-02 | 株式会社東芝 | 半導体装置 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5650527A (en) * | 1979-09-29 | 1981-05-07 | Fujitsu Ltd | Semiconductor integrated circuit device |
US4602267A (en) * | 1981-02-17 | 1986-07-22 | Fujitsu Limited | Protection element for semiconductor device |
JPS60767A (ja) * | 1983-06-17 | 1985-01-05 | Hitachi Ltd | 半導体装置 |
DE3583301D1 (de) * | 1984-03-31 | 1991-08-01 | Toshiba Kawasaki Kk | Schutzanordnung fuer einen mos-transistor. |
JPS6153761A (ja) * | 1984-08-24 | 1986-03-17 | Hitachi Ltd | 半導体装置 |
US4803536A (en) * | 1986-10-24 | 1989-02-07 | Xerox Corporation | Electrostatic discharge protection network for large area transducer arrays |
US4987465A (en) * | 1987-01-29 | 1991-01-22 | Advanced Micro Devices, Inc. | Electro-static discharge protection device for CMOS integrated circuit inputs |
JPS63248170A (ja) * | 1987-04-02 | 1988-10-14 | Nec Corp | 半導体装置 |
JPH0712060B2 (ja) * | 1987-07-02 | 1995-02-08 | 日本電気株式会社 | 相補型mosデバイスの入力保護装置 |
FR2623018B1 (fr) * | 1987-11-06 | 1990-02-09 | Thomson Semiconducteurs | Circuit integre protege contre les decharges electrostatiques avec seuil de protection variable |
JPH01140757A (ja) * | 1987-11-27 | 1989-06-01 | Nec Corp | 半導体入力保護装置 |
US4947192A (en) * | 1988-03-07 | 1990-08-07 | Xerox Corporation | Monolithic silicon integrated circuit chip for a thermal ink jet printer |
JPH0227738A (ja) * | 1988-07-15 | 1990-01-30 | Seiko Epson Corp | 半導体装置 |
US5055896A (en) * | 1988-12-15 | 1991-10-08 | Siliconix Incorporated | Self-aligned LDD lateral DMOS transistor with high-voltage interconnect capability |
JP2626229B2 (ja) * | 1989-10-12 | 1997-07-02 | 日本電気株式会社 | 半導体入力保護装置 |
JPH0734477B2 (ja) * | 1990-05-28 | 1995-04-12 | 株式会社東芝 | 半導体装置の製造方法 |
DE69129393T2 (de) * | 1990-08-29 | 1998-12-17 | Texas Instruments Inc | Asymmetrische nichtflüchtige Speicherzelle, Matrix und Verfahren zu ihrer Herstellung |
US5075250A (en) * | 1991-01-02 | 1991-12-24 | Xerox Corporation | Method of fabricating a monolithic integrated circuit chip for a thermal ink jet printhead |
-
1992
- 1992-05-06 US US07/879,626 patent/US5371395A/en not_active Expired - Fee Related
-
1993
- 1993-04-28 JP JP5101701A patent/JPH0621343A/ja active Pending
- 1993-05-04 EP EP93303468A patent/EP0569219B1/de not_active Expired - Lifetime
- 1993-05-04 DE DE69319021T patent/DE69319021T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE69319021T2 (de) | 1998-12-10 |
EP0569219A2 (de) | 1993-11-10 |
US5371395A (en) | 1994-12-06 |
JPH0621343A (ja) | 1994-01-28 |
EP0569219B1 (de) | 1998-06-10 |
EP0569219A3 (en) | 1995-11-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |