JPS5650527A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS5650527A
JPS5650527A JP12657479A JP12657479A JPS5650527A JP S5650527 A JPS5650527 A JP S5650527A JP 12657479 A JP12657479 A JP 12657479A JP 12657479 A JP12657479 A JP 12657479A JP S5650527 A JPS5650527 A JP S5650527A
Authority
JP
Japan
Prior art keywords
withstand voltage
electrode
insulating film
inversion layer
channel cut
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12657479A
Other languages
Japanese (ja)
Other versions
JPS6359258B2 (en
Inventor
Takehide Shirato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP12657479A priority Critical patent/JPS5650527A/en
Publication of JPS5650527A publication Critical patent/JPS5650527A/en
Publication of JPS6359258B2 publication Critical patent/JPS6359258B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To make it possible to perform a sure protection of a semiconductor device by a method wherein the withstand voltage of the protection element of a semiconductor element with high withstand voltage is set at a value higher than that of the one having no n<-> type impurity region, and at a value a little lower than that of the high withstand voltage element to be protected. CONSTITUTION:An insulating film 2 for a field of the protective lateral transistor portion formed along with the MOSFET is formed in thin state by a selection etching, Further an electrode 11D is formed so as to coat said thin insulating film. When the electrode 11S of the protective lateral npn transistor is grounded or connected to a substrate potential, the adverse vias voltage is applied between the electrode 11D and a substrate 1, an electron 12 is induced to the channel cut cc portion around a region 6D, an n type inversion layer is formed. Although said n type inversion layer operates the same function as the n type impurity region, it can control the impurity density at the channel cut cc to readily control the withstand voltage.
JP12657479A 1979-09-29 1979-09-29 Semiconductor integrated circuit device Granted JPS5650527A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12657479A JPS5650527A (en) 1979-09-29 1979-09-29 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12657479A JPS5650527A (en) 1979-09-29 1979-09-29 Semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS5650527A true JPS5650527A (en) 1981-05-07
JPS6359258B2 JPS6359258B2 (en) 1988-11-18

Family

ID=14938527

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12657479A Granted JPS5650527A (en) 1979-09-29 1979-09-29 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5650527A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61195721A (en) * 1985-02-26 1986-08-30 Nisshinbo Ind Inc Nc sheet material working machine
US5371395A (en) * 1992-05-06 1994-12-06 Xerox Corporation High voltage input pad protection circuitry
US5436483A (en) * 1983-12-26 1995-07-25 Hitachi, Ltd. Semiconductor integrated circuit device having a first MISFET of an output buffer circuit and a second MISFET of an internal circuit
US5545910A (en) * 1994-04-13 1996-08-13 Winbond Electronics Corp. ESD proctection device
US5610089A (en) * 1983-12-26 1997-03-11 Hitachi, Ltd. Method of fabrication of semiconductor integrated circuit device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS511394A (en) * 1974-03-19 1976-01-08 Norsk Hydro As
JPS5324157A (en) * 1976-08-18 1978-03-06 Sanyo Electric Co Ltd Control circuit of air conditioner
JPS5365081A (en) * 1976-11-22 1978-06-10 Nec Corp Field effect semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS511394A (en) * 1974-03-19 1976-01-08 Norsk Hydro As
JPS5324157A (en) * 1976-08-18 1978-03-06 Sanyo Electric Co Ltd Control circuit of air conditioner
JPS5365081A (en) * 1976-11-22 1978-06-10 Nec Corp Field effect semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5436483A (en) * 1983-12-26 1995-07-25 Hitachi, Ltd. Semiconductor integrated circuit device having a first MISFET of an output buffer circuit and a second MISFET of an internal circuit
US5436484A (en) * 1983-12-26 1995-07-25 Hitachi, Ltd. Semiconductor integrated circuit device having input protective elements and internal circuits
US5610089A (en) * 1983-12-26 1997-03-11 Hitachi, Ltd. Method of fabrication of semiconductor integrated circuit device
JPS61195721A (en) * 1985-02-26 1986-08-30 Nisshinbo Ind Inc Nc sheet material working machine
US5371395A (en) * 1992-05-06 1994-12-06 Xerox Corporation High voltage input pad protection circuitry
US5545910A (en) * 1994-04-13 1996-08-13 Winbond Electronics Corp. ESD proctection device

Also Published As

Publication number Publication date
JPS6359258B2 (en) 1988-11-18

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