DE69231494T2 - Vorrichtung für ESD-Schutz - Google Patents

Vorrichtung für ESD-Schutz

Info

Publication number
DE69231494T2
DE69231494T2 DE69231494T DE69231494T DE69231494T2 DE 69231494 T2 DE69231494 T2 DE 69231494T2 DE 69231494 T DE69231494 T DE 69231494T DE 69231494 T DE69231494 T DE 69231494T DE 69231494 T2 DE69231494 T2 DE 69231494T2
Authority
DE
Germany
Prior art keywords
gate
esd
drain
transistor
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69231494T
Other languages
German (de)
English (en)
Other versions
DE69231494D1 (de
Inventor
Charvaka Duvvury
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE69231494D1 publication Critical patent/DE69231494D1/de
Publication of DE69231494T2 publication Critical patent/DE69231494T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
    • H10D89/813—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements specially adapted to provide an electrical current path other than the field-effect induced current path
    • H10D89/814—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements specially adapted to provide an electrical current path other than the field-effect induced current path involving a parasitic bipolar transistor triggered by the electrical biasing of the gate electrode of the FET, e.g. gate coupled transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F1/00—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties
    • H01F1/01—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties of inorganic materials
    • H01F1/03—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties of inorganic materials characterised by their coercivity
    • H01F1/0302—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties of inorganic materials characterised by their coercivity characterised by unspecified or heterogeneous hardness or specially adapted for magnetic hardness transitions
    • H01F1/0306—Metals or alloys, e.g. LAVES phase alloys of the MgCu2-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE69231494T 1991-12-27 1992-12-22 Vorrichtung für ESD-Schutz Expired - Fee Related DE69231494T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US81506991A 1991-12-27 1991-12-27

Publications (2)

Publication Number Publication Date
DE69231494D1 DE69231494D1 (de) 2000-11-09
DE69231494T2 true DE69231494T2 (de) 2001-05-10

Family

ID=25216765

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69231494T Expired - Fee Related DE69231494T2 (de) 1991-12-27 1992-12-22 Vorrichtung für ESD-Schutz

Country Status (4)

Country Link
EP (1) EP0549320B1 (enExample)
JP (1) JPH05347409A (enExample)
DE (1) DE69231494T2 (enExample)
TW (1) TW217467B (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2115477A1 (en) * 1994-02-11 1995-08-12 Jonathan H. Orchard-Webb Esd input protection arrangement
FR2723800B1 (fr) * 1994-08-19 1997-01-03 Thomson Csf Semiconducteurs Circuit de protection contre les decharges electrostatiques
FR2738682B1 (fr) * 1995-09-11 1997-11-21 Sgs Thomson Microelectronics Dispositif de protection contre des surtensions
KR100190386B1 (ko) * 1995-09-28 1999-06-01 김영환 정전방전 방지회로용 트랜지스터
JP3169844B2 (ja) * 1996-12-11 2001-05-28 日本電気株式会社 半導体装置
GB2336241B (en) * 1998-01-15 2000-06-14 United Microelectronics Corp Substrate-triggering electrostatic dicharge protection circuit for deep-submicron integrated circuits
TW363261B (en) * 1998-01-15 1999-07-01 United Microelectronics Corp Protection circuit for substrate triggering electrostatic discharge
NL1008963C2 (nl) * 1998-04-22 1999-10-25 United Microelectronics Corp Beveiligingsschakeling tegen elektrostatische ontlading met substraat-triggering voor diep-submicron geïntegreerde schakelingen.
US6411480B1 (en) 1999-03-01 2002-06-25 International Business Machines Corporation Substrate pumped ESD network with trench structure
JP2001308282A (ja) 2000-04-19 2001-11-02 Nec Corp 半導体装置
DE102004004585A1 (de) * 2004-01-29 2005-08-18 Infineon Technologies Ag Integrierter Widerstand und Herstellungsverfahren
JP5486962B2 (ja) * 2009-04-28 2014-05-07 株式会社メガチップス 半導体集積回路
JP5404343B2 (ja) * 2009-11-25 2014-01-29 シャープ株式会社 静電気放電保護回路
CN101834182B (zh) * 2010-03-23 2011-12-21 浙江大学 一种动态栅极电阻调制的栅极耦合nmos管
CN120035177A (zh) * 2025-03-21 2025-05-23 北京智芯微电子科技有限公司 Ldmosfet结构的esd器件及制造方法、芯片
CN120152348A (zh) * 2025-03-21 2025-06-13 北京智芯微电子科技有限公司 Ldmosfet结构的esd器件及制造方法、芯片

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3746946A (en) * 1972-10-02 1973-07-17 Motorola Inc Insulated gate field-effect transistor input protection circuit
JPS57109375A (en) * 1980-12-26 1982-07-07 Fujitsu Ltd Mis type transistor protection circuit
US4605980A (en) * 1984-03-02 1986-08-12 Zilog, Inc. Integrated circuit high voltage protection
JPS6331157A (ja) * 1986-07-24 1988-02-09 Fujitsu Ltd Ｃ−ｍｏｓ　ｌｓｉの保護回路
US4855620A (en) * 1987-11-18 1989-08-08 Texas Instruments Incorporated Output buffer with improved ESD protection
US4829350A (en) * 1988-05-05 1989-05-09 National Semiconductor Corporation Electrostatic discharge integrated circuit protection
DE3907523A1 (de) * 1989-03-08 1990-09-20 Siemens Ag Schutzschaltung gegen ueberspannungen fuer mos-bauelemente
FR2652449A1 (fr) * 1989-09-22 1991-03-29 Sgs Thomson Microelectronics Dispositif de protection electrostatique pour broche de circuit integre.

Also Published As

Publication number Publication date
JPH05347409A (ja) 1993-12-27
EP0549320A1 (en) 1993-06-30
DE69231494D1 (de) 2000-11-09
EP0549320B1 (en) 2000-10-04
TW217467B (enExample) 1993-12-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee