DE69229087D1 - Integrierte Halbleiterschaltung mit Taktsignalgenerator - Google Patents
Integrierte Halbleiterschaltung mit TaktsignalgeneratorInfo
- Publication number
- DE69229087D1 DE69229087D1 DE69229087T DE69229087T DE69229087D1 DE 69229087 D1 DE69229087 D1 DE 69229087D1 DE 69229087 T DE69229087 T DE 69229087T DE 69229087 T DE69229087 T DE 69229087T DE 69229087 D1 DE69229087 D1 DE 69229087D1
- Authority
- DE
- Germany
- Prior art keywords
- clock signal
- signal generator
- semiconductor circuit
- integrated semiconductor
- integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
- H03L7/0997—Controlling the number of delay elements connected in series in the ring oscillator
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
- H03K3/0315—Ring oscillators
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3224766A JPH0548446A (ja) | 1991-08-09 | 1991-08-09 | 半導体集積回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69229087D1 true DE69229087D1 (de) | 1999-06-10 |
DE69229087T2 DE69229087T2 (de) | 1999-11-11 |
Family
ID=16818893
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69229087T Expired - Fee Related DE69229087T2 (de) | 1991-08-09 | 1992-08-06 | Integrierte Halbleiterschaltung mit Taktsignalgenerator |
Country Status (5)
Country | Link |
---|---|
US (1) | US5329254A (de) |
EP (1) | EP0528283B1 (de) |
JP (1) | JPH0548446A (de) |
KR (1) | KR100192832B1 (de) |
DE (1) | DE69229087T2 (de) |
Families Citing this family (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2596313B2 (ja) * | 1993-05-25 | 1997-04-02 | 日本電気株式会社 | 位相同期発振回路 |
DE4342266C2 (de) * | 1993-12-10 | 1996-10-24 | Texas Instruments Deutschland | Taktgenerator sowie Phasenkomparator zur Verwendung in einem solchen Taktgenerator |
JP2824401B2 (ja) * | 1994-12-05 | 1998-11-11 | 旭コーデン株式会社 | 光ファイバー保持装置及び同装置に用いる管状体の製造法 |
US5867409A (en) * | 1995-03-09 | 1999-02-02 | Kabushiki Kaisha Toshiba | Linear feedback shift register |
US5537069A (en) * | 1995-03-30 | 1996-07-16 | Intel Corporation | Apparatus and method for selecting a tap range in a digital delay line |
US5687202A (en) * | 1995-04-24 | 1997-11-11 | Cyrix Corporation | Programmable phase shift clock generator |
US5543730A (en) * | 1995-05-17 | 1996-08-06 | Altera Corporation | Techniques for programming programmable logic array devices |
US5781766A (en) * | 1996-05-13 | 1998-07-14 | National Semiconductor Corporation | Programmable compensating device to optimize performance in a DRAM controller chipset |
US6384630B2 (en) | 1996-06-05 | 2002-05-07 | Altera Corporation | Techniques for programming programmable logic array devices |
JP3758285B2 (ja) * | 1997-03-17 | 2006-03-22 | ソニー株式会社 | 遅延回路およびそれを用いた発振回路 |
US5920216A (en) * | 1997-04-03 | 1999-07-06 | Advanced Micro Devices, Inc. | Method and system for generating digital clock signals of programmable frequency employing programmable delay lines |
FR2769433B1 (fr) * | 1997-10-03 | 2000-01-28 | Sextant Avionique | Oscillateur a boucle de verrouillage de phase |
DE19946764C2 (de) * | 1999-09-29 | 2003-09-04 | Siemens Ag | Digitaler Phasenregelkreis |
EP1093227A1 (de) * | 1999-10-14 | 2001-04-18 | Motorola, Inc. | Digitale Phasenregelkreisschaltung |
US6745338B1 (en) * | 2000-09-12 | 2004-06-01 | Cypress Semiconductor Corp. | System for automatically selecting clock modes based on a state of clock input pin and generating a clock signal with an oscillator thereafter |
FR2816135B1 (fr) * | 2000-10-30 | 2003-01-03 | St Microelectronics Sa | Generateur digital de taille reduite produisant des signaux d'horloge |
KR100484133B1 (ko) * | 2002-01-29 | 2005-04-18 | 삼성전자주식회사 | 링 오실레이터를 이용한 광기록매체 기록 펄스 발생 장치및 방법 |
US6909301B2 (en) * | 2002-09-06 | 2005-06-21 | Texas Instruments Incorporated | Oscillation based access time measurement |
US20040199786A1 (en) | 2002-12-02 | 2004-10-07 | Walmsley Simon Robert | Randomisation of the location of secret information on each of a series of integrated circuits |
US20050210179A1 (en) * | 2002-12-02 | 2005-09-22 | Walmsley Simon R | Integrated circuit having random clock or random delay |
JP4381750B2 (ja) * | 2003-08-28 | 2009-12-09 | 株式会社ルネサステクノロジ | 半導体集積回路 |
US7023252B2 (en) * | 2004-05-19 | 2006-04-04 | Lsi Logic Corporation | Chip level clock tree deskew circuit |
US6867613B1 (en) * | 2004-07-07 | 2005-03-15 | Advanced Micro Devices, Inc. | Built-in self timing test method and apparatus |
US20080256503A1 (en) * | 2006-09-12 | 2008-10-16 | International Business Machines Corporation | Power management architecture and method of modulating oscillator frequency based on voltage supply |
US20080068100A1 (en) * | 2006-09-12 | 2008-03-20 | Goodnow Kenneth J | Power management architecture and method of modulating oscillator frequency based on voltage supply |
TW201145836A (en) * | 2010-06-11 | 2011-12-16 | Askey Computer Corp | Device and method for locking and calibrating a frequency |
US10894423B2 (en) | 2018-12-03 | 2021-01-19 | Hewlett-Packard Development Company, L.P. | Logic circuitry |
US11292261B2 (en) | 2018-12-03 | 2022-04-05 | Hewlett-Packard Development Company, L.P. | Logic circuitry package |
AU2018452257B2 (en) | 2018-12-03 | 2022-12-01 | Hewlett-Packard Development Company, L.P. | Logic circuitry |
MX2021005993A (es) | 2018-12-03 | 2021-07-06 | Hewlett Packard Development Co | Conjunto de circuitos logicos. |
EP4235494A3 (de) | 2018-12-03 | 2023-09-20 | Hewlett-Packard Development Company, L.P. | Logische schaltung |
US11338586B2 (en) | 2018-12-03 | 2022-05-24 | Hewlett-Packard Development Company, L.P. | Logic circuitry |
AU2019392184A1 (en) | 2018-12-03 | 2021-07-29 | Hewlett-Packard Development Company, L.P. | Logic circuitry package |
DK3681723T3 (da) | 2018-12-03 | 2021-08-30 | Hewlett Packard Development Co | Logisk kredsløb |
EP3687815B1 (de) | 2018-12-03 | 2021-11-10 | Hewlett-Packard Development Company, L.P. | Logische schaltung |
BR112021010754A2 (pt) | 2018-12-03 | 2021-08-31 | Hewlett-Packard Development Company, L.P. | Circuitos lógicos |
EP3844000B1 (de) | 2019-10-25 | 2023-04-12 | Hewlett-Packard Development Company, L.P. | Gehäuse mit logischer schaltung |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4380742A (en) * | 1980-08-04 | 1983-04-19 | Texas Instruments Incorporated | Frequency/phase locked loop circuit using digitally controlled oscillator |
JPS5825710A (ja) * | 1981-08-08 | 1983-02-16 | Fujitsu Ltd | 可変周波数オシレ−タ |
GB8329511D0 (en) * | 1983-11-04 | 1983-12-07 | Inmos Ltd | Timing apparatus |
DE3345142C1 (de) * | 1983-12-14 | 1985-02-14 | Telefunken Fernseh Und Rundfunk Gmbh, 3000 Hannover | Schaltung zur Zeitkompression oder Zeitexpansion eines Videosignals |
JPS60250712A (ja) * | 1984-05-28 | 1985-12-11 | Toshiba Corp | デイジタル制御可変周波数発振回路 |
DE3572232D1 (en) * | 1985-05-07 | 1989-09-14 | Itt Ind Gmbh Deutsche | Monolithic digital integrated circuit |
US5121417A (en) * | 1988-09-02 | 1992-06-09 | Eastman Kodak Company | Count-locked loop timing generator |
JPH02100514A (ja) * | 1988-10-07 | 1990-04-12 | Ricoh Co Ltd | ディレイライン |
US4868522A (en) * | 1988-12-13 | 1989-09-19 | Gazelle Microcircuits, Inc. | Clock signal distribution device |
-
1991
- 1991-08-09 JP JP3224766A patent/JPH0548446A/ja active Pending
-
1992
- 1992-08-04 US US07/924,515 patent/US5329254A/en not_active Expired - Lifetime
- 1992-08-06 DE DE69229087T patent/DE69229087T2/de not_active Expired - Fee Related
- 1992-08-06 EP EP92113445A patent/EP0528283B1/de not_active Expired - Lifetime
- 1992-08-07 KR KR1019920014150A patent/KR100192832B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US5329254A (en) | 1994-07-12 |
KR930005352A (ko) | 1993-03-23 |
EP0528283A2 (de) | 1993-02-24 |
KR100192832B1 (ko) | 1999-06-15 |
DE69229087T2 (de) | 1999-11-11 |
EP0528283B1 (de) | 1999-05-06 |
EP0528283A3 (en) | 1993-07-07 |
JPH0548446A (ja) | 1993-02-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |