DE69227937T2 - Leiterrahmen und in Harz versiegelte Halbleitervorrichtung dafür - Google Patents
Leiterrahmen und in Harz versiegelte Halbleitervorrichtung dafürInfo
- Publication number
- DE69227937T2 DE69227937T2 DE1992627937 DE69227937T DE69227937T2 DE 69227937 T2 DE69227937 T2 DE 69227937T2 DE 1992627937 DE1992627937 DE 1992627937 DE 69227937 T DE69227937 T DE 69227937T DE 69227937 T2 DE69227937 T2 DE 69227937T2
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor device
- lead frames
- device therefor
- sealed semiconductor
- resin sealed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1816891 | 1991-02-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69227937D1 DE69227937D1 (de) | 1999-02-04 |
DE69227937T2 true DE69227937T2 (de) | 1999-05-12 |
Family
ID=11964083
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE1992627937 Expired - Fee Related DE69227937T2 (de) | 1991-02-12 | 1992-02-12 | Leiterrahmen und in Harz versiegelte Halbleitervorrichtung dafür |
Country Status (3)
Country | Link |
---|---|
US (1) | US5397915A (de) |
EP (1) | EP0503769B1 (de) |
DE (1) | DE69227937T2 (de) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3420827B2 (ja) * | 1994-04-28 | 2003-06-30 | ローム株式会社 | 半導体集積回路装置の製造方法及びリードフレーム |
JPH0878605A (ja) * | 1994-09-01 | 1996-03-22 | Hitachi Ltd | リードフレームおよびそれを用いた半導体集積回路装置 |
US5682673A (en) * | 1995-04-17 | 1997-11-04 | Ipac, Inc. | Method for forming encapsulated IC packages |
JPH0992776A (ja) * | 1995-09-28 | 1997-04-04 | Mitsubishi Electric Corp | リードフレームおよび半導体装置 |
JPH09153586A (ja) * | 1995-12-01 | 1997-06-10 | Texas Instr Japan Ltd | 半導体装置、その製造方法、及びリードフレーム |
US5902959A (en) * | 1996-09-05 | 1999-05-11 | International Rectifier Corporation | Lead frame with waffled front and rear surfaces |
JPH11307713A (ja) * | 1998-04-24 | 1999-11-05 | Sony Corp | 半導体装置用リードフレーム |
JP2000058735A (ja) * | 1998-08-07 | 2000-02-25 | Hitachi Ltd | リードフレーム、半導体装置及び半導体装置の製造方法 |
JP3602997B2 (ja) * | 1999-12-15 | 2004-12-15 | 松下電器産業株式会社 | 半導体装置及び半導体装置の製造方法 |
JP3420153B2 (ja) * | 2000-01-24 | 2003-06-23 | Necエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
US6306684B1 (en) | 2000-03-16 | 2001-10-23 | Microchip Technology Incorporated | Stress reducing lead-frame for plastic encapsulation |
US6544817B2 (en) * | 2000-06-23 | 2003-04-08 | Carsem Semiconductor Sdn. Bhd. | Method for sawing a moulded leadframe package |
US20020089064A1 (en) * | 2001-01-08 | 2002-07-11 | Jiahn-Chang Wu | Flexible lead surface-mount semiconductor package |
US7034382B2 (en) * | 2001-04-16 | 2006-04-25 | M/A-Com, Inc. | Leadframe-based chip scale package |
US7122884B2 (en) * | 2002-04-16 | 2006-10-17 | Fairchild Semiconductor Corporation | Robust leaded molded packages and methods for forming the same |
DE10221085B4 (de) * | 2002-05-11 | 2012-07-26 | Robert Bosch Gmbh | Baugruppe mit einer Verbindungseinrichtung zum Kontaktieren eines Halbleiter-Bauelements und Herstellungsverfahren |
JP3867639B2 (ja) * | 2002-07-31 | 2007-01-10 | 株式会社デンソー | 混成集積回路装置 |
US20040084508A1 (en) * | 2002-10-30 | 2004-05-06 | Advanpack Solutions Pte. Ltd. | Method for constraining the spread of solder during reflow for preplated high wettability lead frame flip chip assembly |
JP2004179253A (ja) * | 2002-11-25 | 2004-06-24 | Nec Semiconductors Kyushu Ltd | 半導体装置およびその製造方法 |
US6867481B2 (en) * | 2003-04-11 | 2005-03-15 | Fairchild Semiconductor Corporation | Lead frame structure with aperture or groove for flip chip in a leaded molded package |
US6921967B2 (en) * | 2003-09-24 | 2005-07-26 | Amkor Technology, Inc. | Reinforced die pad support structure |
US20070176271A1 (en) * | 2006-02-01 | 2007-08-02 | Stats Chippac Ltd. | Integrated circuit package system having die-attach pad with elevated bondline thickness |
JP4755206B2 (ja) * | 2006-02-03 | 2011-08-24 | 三井化学株式会社 | デジタル一眼レフカメラ用樹脂製中空パッケージ及びその製造方法並びにそれを用いた半導体装置及びデジタル一眼レフカメラ |
TWI305407B (en) * | 2006-05-22 | 2009-01-11 | Advanced Semiconductor Eng | Package structure and lead frame using the same |
DE102006045415A1 (de) * | 2006-09-26 | 2008-04-03 | Infineon Technologies Ag | Bauelementanordnung mit einem Träger |
JP2008085002A (ja) * | 2006-09-27 | 2008-04-10 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
JP4757790B2 (ja) * | 2006-12-22 | 2011-08-24 | 富士通コンポーネント株式会社 | 半導体素子の実装構造及びプリント回路基板 |
US8274162B2 (en) * | 2007-01-20 | 2012-09-25 | Triquint Semiconductor, Inc. | Apparatus and method for reduced delamination of an integrated circuit module |
US20090152683A1 (en) * | 2007-12-18 | 2009-06-18 | National Semiconductor Corporation | Rounded die configuration for stress minimization and enhanced thermo-mechanical reliability |
US7808089B2 (en) * | 2007-12-18 | 2010-10-05 | National Semiconductor Corporation | Leadframe having die attach pad with delamination and crack-arresting features |
US8836104B2 (en) * | 2012-03-03 | 2014-09-16 | Ho-Yuan Yu | Apparatus for chip thermal stress relief |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58207645A (ja) * | 1982-05-28 | 1983-12-03 | Fujitsu Ltd | 半導体装置 |
US5126820A (en) * | 1985-02-01 | 1992-06-30 | Advanced Micro Devices, Inc. | Thermal expansion compensated metal lead frame for integrated circuit package |
JPS62268151A (ja) * | 1986-05-16 | 1987-11-20 | Hitachi Ltd | 集積回路用リ−ドフレ−ム |
US4884124A (en) * | 1986-08-19 | 1989-11-28 | Mitsubishi Denki Kabushiki Kaisha | Resin-encapsulated semiconductor device |
JPS6482554A (en) * | 1987-09-24 | 1989-03-28 | Mitsubishi Electric Corp | Resin-sealed semiconductor device |
JPH01251748A (ja) * | 1988-03-31 | 1989-10-06 | Toppan Printing Co Ltd | 半導体装置用リードフレーム |
IT1217802B (it) * | 1988-06-08 | 1990-03-30 | Sgs Thomson Microelectronics | Dispositivo a semiconduttore in contenitore in plastica con mezzo du abcioraggio tra lastrina porta "chip" e corpo in plastic |
JPH0732215B2 (ja) * | 1988-10-25 | 1995-04-10 | 三菱電機株式会社 | 半導体装置 |
JPH0777257B2 (ja) * | 1988-11-04 | 1995-08-16 | 日本電気株式会社 | リードフレーム |
JPH02292850A (ja) * | 1989-05-06 | 1990-12-04 | Matsushita Electron Corp | リードフレーム |
US5175610A (en) * | 1990-05-09 | 1992-12-29 | Kabushiki Kaisha Toshiba | Resin molded type semiconductor device having a metallic plate support |
-
1992
- 1992-02-12 DE DE1992627937 patent/DE69227937T2/de not_active Expired - Fee Related
- 1992-02-12 US US07/834,466 patent/US5397915A/en not_active Expired - Lifetime
- 1992-02-12 EP EP19920301150 patent/EP0503769B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0503769A1 (de) | 1992-09-16 |
EP0503769B1 (de) | 1998-12-23 |
DE69227937D1 (de) | 1999-02-04 |
US5397915A (en) | 1995-03-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD., KADOMA, |
|
8339 | Ceased/non-payment of the annual fee |