DE69121921D1 - Halbleiterspeichergeräte mit Spaltenredundanz - Google Patents

Halbleiterspeichergeräte mit Spaltenredundanz

Info

Publication number
DE69121921D1
DE69121921D1 DE69121921T DE69121921T DE69121921D1 DE 69121921 D1 DE69121921 D1 DE 69121921D1 DE 69121921 T DE69121921 T DE 69121921T DE 69121921 T DE69121921 T DE 69121921T DE 69121921 D1 DE69121921 D1 DE 69121921D1
Authority
DE
Germany
Prior art keywords
data
register
column
cell array
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69121921T
Other languages
English (en)
Other versions
DE69121921T2 (de
Inventor
Makoto Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Application granted granted Critical
Publication of DE69121921D1 publication Critical patent/DE69121921D1/de
Publication of DE69121921T2 publication Critical patent/DE69121921T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/846—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by choosing redundant lines at an output stage

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Dram (AREA)
DE69121921T 1990-01-18 1991-01-16 Halbleiterspeichergeräte mit Spaltenredundanz Expired - Fee Related DE69121921T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009104A JPH03214500A (ja) 1990-01-18 1990-01-18 メモリ装置

Publications (2)

Publication Number Publication Date
DE69121921D1 true DE69121921D1 (de) 1996-10-17
DE69121921T2 DE69121921T2 (de) 1997-02-13

Family

ID=11711323

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69121921T Expired - Fee Related DE69121921T2 (de) 1990-01-18 1991-01-16 Halbleiterspeichergeräte mit Spaltenredundanz

Country Status (4)

Country Link
US (1) US5231604A (de)
EP (1) EP0438273B1 (de)
JP (1) JPH03214500A (de)
DE (1) DE69121921T2 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2796590B2 (ja) * 1991-08-07 1998-09-10 三菱電機株式会社 メモリ装置及びそれを使用したデータ処理装置
EP0675440B1 (de) * 1994-03-29 1998-08-05 STMicroelectronics S.r.l. Redundanzschaltung für eine Halbleiter-Speicheranordnung
US5532965A (en) * 1995-04-13 1996-07-02 Kenney; Donald M. Memory precharge scheme using spare column
KR100252053B1 (ko) 1997-12-04 2000-05-01 윤종용 칼럼 방향의 데이터 입출력선을 가지는 반도체메모리장치와불량셀 구제회로 및 방법
JP2000285693A (ja) 1999-03-31 2000-10-13 Matsushita Electric Ind Co Ltd 半導体記憶装置
JP3822412B2 (ja) * 2000-03-28 2006-09-20 株式会社東芝 半導体記憶装置
DE10140993A1 (de) * 2001-08-21 2003-03-20 Deutsche Telekom Ag Verfahren zur Kompression von Daten
US7554589B2 (en) * 2004-08-20 2009-06-30 Micron Technology, Inc. Redundancy in column parallel or row architectures
US7852391B2 (en) * 2004-12-14 2010-12-14 Bae Systems Information And Electronic Systems Integration Inc. Substitution of defective readout circuits in imagers
US7251173B2 (en) * 2005-08-02 2007-07-31 Micron Technology, Inc. Combination column redundancy system for a memory array
JP4851755B2 (ja) * 2005-09-07 2012-01-11 ルネサスエレクトロニクス株式会社 半導体装置
US7324389B2 (en) * 2006-03-24 2008-01-29 Sandisk Corporation Non-volatile memory with redundancy data buffered in remote buffer circuits
US7394690B2 (en) * 2006-03-24 2008-07-01 Sandisk Corporation Method for column redundancy using data latches in solid-state memories
US7224605B1 (en) * 2006-03-24 2007-05-29 Sandisk Corporation Non-volatile memory with redundancy data buffered in data latches for defective locations
US7352635B2 (en) * 2006-03-24 2008-04-01 Sandisk Corporation Method for remote redundancy for non-volatile memory
PL2523950T3 (pl) * 2010-01-15 2017-09-29 Gilead Sciences, Inc. Inhibitory wirusów flaviviridae
US8830334B2 (en) * 2010-11-30 2014-09-09 Aptina Imaging Corporation Systems and methods for providing shiftable column circuitry of imager pixel arrays
US9224439B2 (en) 2012-06-29 2015-12-29 Freescale Semiconductor, Inc. Memory with word line access control
WO2014068756A1 (ja) * 2012-11-01 2014-05-08 富士通株式会社 半導体集積回路、半導体記憶装置及び半導体記憶装置の制御方法
JP2014186772A (ja) * 2013-03-22 2014-10-02 Toshiba Corp 半導体記憶装置、コントローラ、及びメモリシステム
US9445027B2 (en) * 2014-02-20 2016-09-13 Semiconductor Components Industries, Llc Image sensors with column memory repair circuitry
US9672938B2 (en) * 2014-04-22 2017-06-06 Nxp Usa, Inc. Memory with redundancy
KR20150130065A (ko) * 2014-05-13 2015-11-23 에스케이하이닉스 주식회사 반도체 메모리 장치
CN114927156B (zh) * 2022-07-21 2022-11-11 浙江力积存储科技有限公司 一种包含冗余存储单元的移位寄存方法及移位寄存结构

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3763480A (en) * 1971-10-12 1973-10-02 Rca Corp Digital and analog data handling devices
GB2184268B (en) * 1985-12-13 1989-11-22 Anamartic Ltd Fault tolerant memory system
NL8702606A (nl) * 1987-11-02 1989-06-01 Philips Nv Serie-parallel-serie-geheugen voorzien van redundante opslagkolommen en beeldgeheugen voorzien van zulke serie-parallel-serie-geheugens.

Also Published As

Publication number Publication date
DE69121921T2 (de) 1997-02-13
EP0438273A2 (de) 1991-07-24
EP0438273A3 (en) 1992-05-13
US5231604A (en) 1993-07-27
EP0438273B1 (de) 1996-09-11
JPH03214500A (ja) 1991-09-19

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Legal Events

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8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee