DE69120704D1 - Halbleiterspeicheranordnung hergestellt mit BICMOS-Schaltungen und fähig, ein Signal zu empfangen - Google Patents
Halbleiterspeicheranordnung hergestellt mit BICMOS-Schaltungen und fähig, ein Signal zu empfangenInfo
- Publication number
- DE69120704D1 DE69120704D1 DE69120704T DE69120704T DE69120704D1 DE 69120704 D1 DE69120704 D1 DE 69120704D1 DE 69120704 T DE69120704 T DE 69120704T DE 69120704 T DE69120704 T DE 69120704T DE 69120704 D1 DE69120704 D1 DE 69120704D1
- Authority
- DE
- Germany
- Prior art keywords
- receiving
- signal
- memory device
- semiconductor memory
- device fabricated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/418—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2082683A JPH03283091A (ja) | 1990-03-29 | 1990-03-29 | 半導体記憶回路装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69120704D1 true DE69120704D1 (de) | 1996-08-14 |
DE69120704T2 DE69120704T2 (de) | 1997-02-20 |
Family
ID=13781223
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69120704T Expired - Fee Related DE69120704T2 (de) | 1990-03-29 | 1991-03-26 | Halbleiterspeicheranordnung hergestellt mit BICMOS-Schaltungen und fähig, ein Signal zu empfangen |
Country Status (4)
Country | Link |
---|---|
US (1) | US5202823A (de) |
EP (1) | EP0449218B1 (de) |
JP (1) | JPH03283091A (de) |
DE (1) | DE69120704T2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR940010837B1 (ko) * | 1991-10-21 | 1994-11-17 | 현대전자산업 주식회사 | Dram의 워드선 구동회로 |
US6366524B1 (en) * | 2000-07-28 | 2002-04-02 | Micron Technology Inc. | Address decoding in multiple-bank memory architectures |
JP2007035091A (ja) * | 2005-07-22 | 2007-02-08 | Sony Corp | 半導体記憶装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5310229A (en) * | 1976-07-16 | 1978-01-30 | Mitsubishi Electric Corp | Decoder circuit |
JPS6035758B2 (ja) * | 1979-10-03 | 1985-08-16 | 株式会社東芝 | 不揮発性半導体メモリ |
JPS5936357B2 (ja) * | 1980-12-02 | 1984-09-03 | 三洋電機株式会社 | 半導体記憶装置 |
JPS6059587A (ja) * | 1983-09-12 | 1985-04-05 | Hitachi Ltd | 半導体集積回路装置 |
JPS6368053U (de) * | 1986-10-20 | 1988-05-07 | ||
JPH02101695A (ja) * | 1988-10-07 | 1990-04-13 | Fujitsu Ltd | Ramチップセレクト回路 |
JPH02247892A (ja) * | 1989-03-20 | 1990-10-03 | Fujitsu Ltd | ダイナミックランダムアクセスメモリ |
JPH03224199A (ja) * | 1990-01-29 | 1991-10-03 | Hitachi Ltd | 半導体集積回路装置 |
-
1990
- 1990-03-29 JP JP2082683A patent/JPH03283091A/ja active Pending
-
1991
- 1991-03-25 US US07/673,998 patent/US5202823A/en not_active Expired - Fee Related
- 1991-03-26 EP EP91104791A patent/EP0449218B1/de not_active Expired - Lifetime
- 1991-03-26 DE DE69120704T patent/DE69120704T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5202823A (en) | 1993-04-13 |
EP0449218A3 (en) | 1993-03-17 |
JPH03283091A (ja) | 1991-12-13 |
EP0449218A2 (de) | 1991-10-02 |
EP0449218B1 (de) | 1996-07-10 |
DE69120704T2 (de) | 1997-02-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |