DE69117866D1 - Heteroübergangsfeldeffekttransistor - Google Patents

Heteroübergangsfeldeffekttransistor

Info

Publication number
DE69117866D1
DE69117866D1 DE69117866T DE69117866T DE69117866D1 DE 69117866 D1 DE69117866 D1 DE 69117866D1 DE 69117866 T DE69117866 T DE 69117866T DE 69117866 T DE69117866 T DE 69117866T DE 69117866 D1 DE69117866 D1 DE 69117866D1
Authority
DE
Germany
Prior art keywords
field effect
effect transistor
heterojunction field
heterojunction
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69117866T
Other languages
English (en)
Other versions
DE69117866T2 (de
Inventor
Takatomo Enoki
Naoteru Shigekawa
Kunihiro Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Publication of DE69117866D1 publication Critical patent/DE69117866D1/de
Application granted granted Critical
Publication of DE69117866T2 publication Critical patent/DE69117866T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
    • H01L29/7785—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material with more than one donor layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)
DE69117866T 1990-10-26 1991-10-23 Heteroübergangsfeldeffekttransistor Expired - Lifetime DE69117866T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29018790 1990-10-26

Publications (2)

Publication Number Publication Date
DE69117866D1 true DE69117866D1 (de) 1996-04-18
DE69117866T2 DE69117866T2 (de) 1996-10-10

Family

ID=17752878

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69117866T Expired - Lifetime DE69117866T2 (de) 1990-10-26 1991-10-23 Heteroübergangsfeldeffekttransistor

Country Status (3)

Country Link
US (1) US5151757A (de)
EP (1) EP0482726B1 (de)
DE (1) DE69117866T2 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5406094A (en) * 1991-10-14 1995-04-11 Fujitsu Limited Quantum interference effect semiconductor device and method of producing the same
CA2091926A1 (en) * 1992-03-23 1993-09-24 Shigeru Nakajima Semiconductor device
JPH0661269A (ja) * 1992-08-11 1994-03-04 Mitsubishi Electric Corp 半導体装置及びその製造方法
JP3259106B2 (ja) * 1992-09-02 2002-02-25 富士通株式会社 高電子移動度電界効果半導体装置
JP3224437B2 (ja) * 1992-11-30 2001-10-29 富士通株式会社 Ｉｉｉ−ｖ族化合物半導体装置
US5350936A (en) * 1993-07-19 1994-09-27 Texas Instruments Incorporated Linear field effect transistor
JPH08250520A (ja) * 1995-03-14 1996-09-27 Mitsubishi Electric Corp 電界効果型半導体装置
US6133593A (en) * 1999-07-23 2000-10-17 The United States Of America As Represented By The Secretary Of The Navy Channel design to reduce impact ionization in heterostructure field-effect transistors
JP3705431B2 (ja) * 2002-03-28 2005-10-12 ユーディナデバイス株式会社 半導体装置及びその製造方法
WO2004086461A2 (en) * 2003-03-21 2004-10-07 North Carolina State University Methods for nanoscale structures from optical lithography and subsequent lateral growth
US20060276043A1 (en) * 2003-03-21 2006-12-07 Johnson Mark A L Method and systems for single- or multi-period edge definition lithography
JP4284254B2 (ja) * 2004-09-07 2009-06-24 富士通株式会社 電界効果型半導体装置
WO2011161791A1 (ja) * 2010-06-24 2011-12-29 富士通株式会社 半導体装置
JP2014053418A (ja) * 2012-09-06 2014-03-20 Fujitsu Ltd 半導体装置
JP6527423B2 (ja) * 2015-08-11 2019-06-05 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58147166A (ja) * 1982-02-26 1983-09-01 Fujitsu Ltd 半導体装置
JPS617666A (ja) * 1984-06-22 1986-01-14 Fujitsu Ltd 不揮発性半導体記憶装置
US4745452A (en) * 1984-09-24 1988-05-17 Massachusetts Institute Of Technology Tunneling transfer devices
US4764796A (en) * 1985-12-19 1988-08-16 Sumitomo Electric Industries, Ltd. Heterojunction field effect transistor with two-dimensional electron layer
JPH01143264A (ja) * 1987-11-28 1989-06-05 Sharp Corp 電界効果半導体素子
JPH0812916B2 (ja) * 1989-12-20 1996-02-07 日本電気株式会社 電界効果トランジスタ
JP3046098B2 (ja) * 1991-07-03 2000-05-29 富士通株式会社 ヘテロ接合半導体装置
JPH1143264A (ja) * 1997-07-24 1999-02-16 Canon Inc 画像形成装置
JP3204932B2 (ja) * 1997-09-02 2001-09-04 ナカライテスク株式会社 膜結合した特定タンパク質の検出方法および脱色液調製キット

Also Published As

Publication number Publication date
DE69117866T2 (de) 1996-10-10
EP0482726B1 (de) 1996-03-13
EP0482726A3 (en) 1993-07-21
EP0482726A2 (de) 1992-04-29
US5151757A (en) 1992-09-29

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Legal Events

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