DE69031142D1 - Integrierte Hybridschaltungsanordnung - Google Patents
Integrierte HybridschaltungsanordnungInfo
- Publication number
- DE69031142D1 DE69031142D1 DE69031142T DE69031142T DE69031142D1 DE 69031142 D1 DE69031142 D1 DE 69031142D1 DE 69031142 T DE69031142 T DE 69031142T DE 69031142 T DE69031142 T DE 69031142T DE 69031142 D1 DE69031142 D1 DE 69031142D1
- Authority
- DE
- Germany
- Prior art keywords
- circuit arrangement
- hybrid circuit
- integrated hybrid
- integrated
- arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67126—Apparatus for sealing, encapsulating, glassing, decapsulating or the like
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67121—Apparatus for making assemblies not otherwise provided for, e.g. package constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/162—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Applications Claiming Priority (13)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10078489A JPH0680763B2 (ja) | 1989-04-20 | 1989-04-20 | 混成集積回路装置 |
JP10078389A JPH0758754B2 (ja) | 1989-04-20 | 1989-04-20 | 混成集積回路装置 |
JP10078789A JPH0680766B2 (ja) | 1989-04-20 | 1989-04-20 | 混成集積回路装置 |
JP1119112A JPH0680769B2 (ja) | 1989-05-12 | 1989-05-12 | 混成集積回路装置 |
JP1119111A JPH0680768B2 (ja) | 1989-05-12 | 1989-05-12 | 混成集積回路装置 |
JP12090589A JPH0680775B2 (ja) | 1989-05-15 | 1989-05-15 | 混成集積回路装置 |
JP12090389A JPH0680773B2 (ja) | 1989-05-15 | 1989-05-15 | 混成集積回路装置 |
JP1120907A JPH0680777B2 (ja) | 1989-05-15 | 1989-05-15 | 混成集積回路装置 |
JP12090289A JPH0680772B2 (ja) | 1989-05-15 | 1989-05-15 | 混成集積回路装置 |
JP12090489A JPH0680774B2 (ja) | 1989-05-15 | 1989-05-15 | 混成集積回路装置 |
JP12390289A JPH0680780B2 (ja) | 1989-05-17 | 1989-05-17 | 混成集積回路装置 |
JP1127311A JPH0680786B2 (ja) | 1989-05-19 | 1989-05-19 | 混成集積回路装置 |
JP1127312A JPH0680787B2 (ja) | 1989-05-19 | 1989-05-19 | 混成集積回路装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69031142D1 true DE69031142D1 (de) | 1997-09-04 |
DE69031142T2 DE69031142T2 (de) | 1997-12-18 |
Family
ID=27584284
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69031142T Expired - Fee Related DE69031142T2 (de) | 1989-04-20 | 1990-04-19 | Integrierte Hybridschaltungsanordnung |
Country Status (3)
Country | Link |
---|---|
US (1) | US5159433A (de) |
EP (1) | EP0393671B1 (de) |
DE (1) | DE69031142T2 (de) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5438216A (en) * | 1992-08-31 | 1995-08-01 | Motorola, Inc. | Light erasable multichip module |
EP0654866A3 (de) * | 1993-11-23 | 1997-08-20 | Motorola Inc | Träger zur Verbindung eines Halbleiterwürfels und Herstellungsverfahren. |
JPH07211856A (ja) * | 1994-01-12 | 1995-08-11 | Fujitsu Ltd | 集積回路モジュール |
US5644103A (en) * | 1994-11-10 | 1997-07-01 | Vlt Corporation | Packaging electrical components having a scallop formed in an edge of a circuit board |
EP0957518A4 (de) * | 1996-10-30 | 2004-06-09 | Hitachi Chemical Co Ltd | Chipträgersubstrat für halbleitergehäuse, halbleiter und ihre herstellung |
US6078101A (en) * | 1996-12-04 | 2000-06-20 | Samsung Electronics Co., Ltd. | High-power microwave-frequency hybrid integrated circuit |
US6392289B1 (en) | 1999-04-15 | 2002-05-21 | Micron Technology, Inc. | Integrated circuit substrate having through hole markings to indicate defective/non-defective status of same |
US6316737B1 (en) | 1999-09-09 | 2001-11-13 | Vlt Corporation | Making a connection between a component and a circuit board |
US7215022B2 (en) | 2001-06-21 | 2007-05-08 | Ati Technologies Inc. | Multi-die module |
US6763580B2 (en) * | 2002-03-21 | 2004-07-20 | Motorola, Inc. | Method and apparatus for securing an electrically conductive interconnect through a metallic substrate |
JP3632684B2 (ja) * | 2002-08-26 | 2005-03-23 | 株式会社日立製作所 | 半導体素子及び半導体パッケージ |
US7057928B2 (en) * | 2003-07-08 | 2006-06-06 | Hewlett-Packard Development Company, L.P. | System and method for erasing high-density non-volatile fast memory |
US20060107523A1 (en) * | 2004-11-24 | 2006-05-25 | Trw Inc. | Method of making a printed circuit board |
US8362368B2 (en) * | 2009-04-27 | 2013-01-29 | Ultrasource, Inc. | Method and apparatus for an improved filled via |
JP6030244B2 (ja) * | 2013-09-05 | 2016-11-24 | シャープ株式会社 | 発光装置用基板、発光装置、および発光装置用基板の製造方法 |
US9793237B2 (en) | 2015-10-19 | 2017-10-17 | Qorvo Us, Inc. | Hollow-cavity flip-chip package with reinforced interconnects and process for making the same |
DE102015224422A1 (de) * | 2015-12-07 | 2017-06-08 | Robert Bosch Gmbh | Elektronische Schaltungseinheit |
US9799637B2 (en) * | 2016-02-12 | 2017-10-24 | Qorvo Us, Inc. | Semiconductor package with lid having lid conductive structure |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58131756A (ja) * | 1982-01-29 | 1983-08-05 | Fujitsu Ltd | Dip型ハイブリツドic |
JPS59141258A (ja) * | 1983-02-02 | 1984-08-13 | Sanyo Electric Co Ltd | 混成集積回路 |
JPS59228748A (ja) * | 1983-06-09 | 1984-12-22 | Toshiba Corp | 混成集積回路装置 |
JPS6230367U (de) * | 1985-08-07 | 1987-02-24 | ||
JPS6480032A (en) * | 1987-09-21 | 1989-03-24 | Hitachi Maxell | Semiconductor device and manufacture thereof |
JP2548602B2 (ja) * | 1988-04-12 | 1996-10-30 | 株式会社日立製作所 | 半導体実装モジュール |
JP2978511B2 (ja) * | 1989-09-20 | 1999-11-15 | 株式会社日立製作所 | 集積回路素子実装構造体 |
-
1990
- 1990-04-18 US US07/510,468 patent/US5159433A/en not_active Expired - Lifetime
- 1990-04-19 EP EP90107445A patent/EP0393671B1/de not_active Expired - Lifetime
- 1990-04-19 DE DE69031142T patent/DE69031142T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0393671B1 (de) | 1997-07-30 |
EP0393671A2 (de) | 1990-10-24 |
DE69031142T2 (de) | 1997-12-18 |
US5159433A (en) | 1992-10-27 |
EP0393671A3 (de) | 1991-02-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |