DE69012457D1 - Nichtflüchtige Halbleiterspeicheranordnung. - Google Patents

Nichtflüchtige Halbleiterspeicheranordnung.

Info

Publication number
DE69012457D1
DE69012457D1 DE69012457T DE69012457T DE69012457D1 DE 69012457 D1 DE69012457 D1 DE 69012457D1 DE 69012457 T DE69012457 T DE 69012457T DE 69012457 T DE69012457 T DE 69012457T DE 69012457 D1 DE69012457 D1 DE 69012457D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
volatile semiconductor
volatile
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69012457T
Other languages
English (en)
Other versions
DE69012457T2 (de
Inventor
Seiichiro Yokokura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69012457D1 publication Critical patent/DE69012457D1/de
Application granted granted Critical
Publication of DE69012457T2 publication Critical patent/DE69012457T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
DE69012457T 1989-07-05 1990-07-05 Nichtflüchtige Halbleiterspeicheranordnung. Expired - Fee Related DE69012457T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1173558A JPH0338067A (ja) 1989-07-05 1989-07-05 不揮発性半導体メモリ装置

Publications (2)

Publication Number Publication Date
DE69012457D1 true DE69012457D1 (de) 1994-10-20
DE69012457T2 DE69012457T2 (de) 1995-03-09

Family

ID=15962777

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69012457T Expired - Fee Related DE69012457T2 (de) 1989-07-05 1990-07-05 Nichtflüchtige Halbleiterspeicheranordnung.

Country Status (5)

Country Link
US (1) US5241498A (de)
EP (1) EP0406861B1 (de)
JP (1) JPH0338067A (de)
KR (1) KR930006983B1 (de)
DE (1) DE69012457T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2630119B2 (ja) * 1991-07-11 1997-07-16 松下電器産業株式会社 電圧設定装置
US5648930A (en) * 1996-06-28 1997-07-15 Symbios Logic Inc. Non-volatile memory which is programmable from a power source
US5838616A (en) * 1996-09-30 1998-11-17 Symbios, Inc. Gate edge aligned EEPROM transistor
US5661687A (en) * 1996-09-30 1997-08-26 Symbios Logic Inc. Drain excluded EPROM cell
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
KR101400691B1 (ko) 2008-05-14 2014-05-29 삼성전자주식회사 메모리 장치 및 메모리 프로그래밍 방법

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4203158A (en) * 1978-02-24 1980-05-13 Intel Corporation Electrically programmable and erasable MOS floating gate memory device employing tunneling and method of fabricating same
JPS62222498A (ja) * 1986-03-10 1987-09-30 Fujitsu Ltd 消去及び書き込み可能な読み出し専用メモリ
JPS62229600A (ja) * 1986-03-31 1987-10-08 Toshiba Corp 不揮発性半導体記憶装置
JPS63252481A (ja) * 1987-04-09 1988-10-19 Toshiba Corp 不揮発性半導体メモリ
US4996686A (en) * 1987-05-21 1991-02-26 Kabushiki Kaisha Toshiba Charge transfer device with reset voltage generating circuit
DE3884820T2 (de) * 1987-07-29 1994-01-27 Toshiba Kawasaki Kk Nichtflüchtige Halbleiterspeichereinrichtung.
KR920009054B1 (ko) * 1988-12-28 1992-10-13 가부시키가이샤 도시바 불휘발성 반도체메모리

Also Published As

Publication number Publication date
US5241498A (en) 1993-08-31
EP0406861B1 (de) 1994-09-14
KR910003815A (ko) 1991-02-28
EP0406861A2 (de) 1991-01-09
JPH0338067A (ja) 1991-02-19
EP0406861A3 (en) 1992-07-22
KR930006983B1 (ko) 1993-07-24
DE69012457T2 (de) 1995-03-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee