DE68926063T2 - Verfahren und Gerät zur Steuerung von prozessoren mittels Vorhersagen von Ausnahmen bei der gleitkomma-Arithmetik - Google Patents

Verfahren und Gerät zur Steuerung von prozessoren mittels Vorhersagen von Ausnahmen bei der gleitkomma-Arithmetik

Info

Publication number
DE68926063T2
DE68926063T2 DE68926063T DE68926063T DE68926063T2 DE 68926063 T2 DE68926063 T2 DE 68926063T2 DE 68926063 T DE68926063 T DE 68926063T DE 68926063 T DE68926063 T DE 68926063T DE 68926063 T2 DE68926063 T2 DE 68926063T2
Authority
DE
Germany
Prior art keywords
computation
floating point
exception
predicting
indication
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE68926063T
Other languages
English (en)
Other versions
DE68926063D1 (de
Inventor
Craig C Hansen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MIPS Tech LLC
Original Assignee
Graphics Properties Holdings Inc
Silicon Graphics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Graphics Properties Holdings Inc, Silicon Graphics Inc filed Critical Graphics Properties Holdings Inc
Publication of DE68926063D1 publication Critical patent/DE68926063D1/de
Application granted granted Critical
Publication of DE68926063T2 publication Critical patent/DE68926063T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • G06F9/30014Arithmetic instructions with variable precision
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861Recovery, e.g. branch miss-prediction, exception handling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804Details
    • G06F2207/386Special constructional features
    • G06F2207/3884Pipelining
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905Exception handling
    • G06F7/4991Overflow or underflow
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942Significance control
DE68926063T 1988-02-29 1989-02-24 Verfahren und Gerät zur Steuerung von prozessoren mittels Vorhersagen von Ausnahmen bei der gleitkomma-Arithmetik Expired - Lifetime DE68926063T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/161,543 US4879676A (en) 1988-02-29 1988-02-29 Method and apparatus for precise floating point exceptions

Publications (2)

Publication Number Publication Date
DE68926063D1 DE68926063D1 (de) 1996-05-02
DE68926063T2 true DE68926063T2 (de) 1996-11-28

Family

ID=22581611

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68926063T Expired - Lifetime DE68926063T2 (de) 1988-02-29 1989-02-24 Verfahren und Gerät zur Steuerung von prozessoren mittels Vorhersagen von Ausnahmen bei der gleitkomma-Arithmetik

Country Status (8)

Country Link
US (1) US4879676A (de)
EP (1) EP0331372B1 (de)
JP (1) JP3025776B2 (de)
KR (1) KR950003200B1 (de)
AU (1) AU603973B2 (de)
CA (1) CA1295742C (de)
DE (1) DE68926063T2 (de)
IL (1) IL89262A (de)

Families Citing this family (60)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4845659A (en) * 1986-08-15 1989-07-04 International Business Machines Corporation Accelerated validity response permitting early issue of instructions dependent upon outcome of floating point operations
US5341482A (en) * 1987-03-20 1994-08-23 Digital Equipment Corporation Method for synchronization of arithmetic exceptions in central processing units having pipelined execution units simultaneously executing instructions
JPS63259727A (ja) * 1987-04-17 1988-10-26 Hitachi Ltd コプロセツサのインタ−フエイス方式
US5153848A (en) * 1988-06-17 1992-10-06 Bipolar Integrated Technology, Inc. Floating point processor with internal free-running clock
EP0365322A3 (de) * 1988-10-19 1991-11-27 Hewlett-Packard Company Verfahren und Vorrichtung zur Ausnahmenbehandlung in Fliessbandprozessoren mit unterschiedlicher Befehlspipelinetiefe
US4943941A (en) * 1989-01-13 1990-07-24 Bolt Beranek And Newman Inc. Floating point processor employing counter controlled shifting
US5134693A (en) * 1989-01-18 1992-07-28 Intel Corporation System for handling occurrence of exceptions during execution of microinstructions while running floating point and non-floating point instructions in parallel
US5093908A (en) * 1989-04-17 1992-03-03 International Business Machines Corporation Method and apparatus for executing instructions in a single sequential instruction stream in a main processor and a coprocessor
US5218711A (en) * 1989-05-15 1993-06-08 Mitsubishi Denki Kabushiki Kaisha Microprocessor having program counter registers for its coprocessors
US5058048A (en) * 1990-04-02 1991-10-15 Advanced Micro Devices, Inc. Normalizing pipelined floating point processing unit
JP3089427B2 (ja) * 1990-09-20 2000-09-18 松下電器産業株式会社 データ処理装置
JP2682232B2 (ja) * 1990-11-21 1997-11-26 松下電器産業株式会社 浮動小数点演算処理装置
JP2925818B2 (ja) * 1991-04-05 1999-07-28 株式会社東芝 並列処理制御装置
EP1071020A2 (de) * 1991-12-10 2001-01-24 Fujitsu Limited Informationsverarbeitungssystem
US5257216A (en) * 1992-06-10 1993-10-26 Intel Corporation Floating point safe instruction recognition apparatus
US5559977A (en) * 1992-08-04 1996-09-24 Intel Corporation Method and apparatus for executing floating point (FP) instruction pairs in a pipelined processor by stalling the following FP instructions in an execution stage
US5572235A (en) * 1992-11-02 1996-11-05 The 3Do Company Method and apparatus for processing image data
US5596693A (en) * 1992-11-02 1997-01-21 The 3Do Company Method for controlling a spryte rendering processor
US5481275A (en) 1992-11-02 1996-01-02 The 3Do Company Resolution enhancement for video display using multi-line interpolation
US5838389A (en) * 1992-11-02 1998-11-17 The 3Do Company Apparatus and method for updating a CLUT during horizontal blanking
US5752073A (en) * 1993-01-06 1998-05-12 Cagent Technologies, Inc. Digital signal processor architecture
JP2847688B2 (ja) * 1993-05-27 1999-01-20 松下電器産業株式会社 プログラム変換装置およびプロセッサ
US5752013A (en) * 1993-06-30 1998-05-12 Intel Corporation Method and apparatus for providing precise fault tracing in a superscalar microprocessor
WO1995016955A1 (en) * 1993-12-15 1995-06-22 Silicon Graphics, Inc. Load latency of zero for floating point load instructions using a load data queue
US5537538A (en) * 1993-12-15 1996-07-16 Silicon Graphics, Inc. Debug mode for a superscalar RISC processor
JP2815236B2 (ja) * 1993-12-15 1998-10-27 シリコン・グラフィックス・インコーポレーテッド スーパースカーラマイクロプロセッサのための命令ディスパッチ方法及びレジスタ競合についてのチェック方法
DE4434895C2 (de) * 1993-12-23 1998-12-24 Hewlett Packard Co Verfahren und Vorrichtung zur Behandlung von Ausnahmebedingungen
TW260765B (de) * 1994-03-31 1995-10-21 Ibm
US5530663A (en) * 1994-11-14 1996-06-25 International Business Machines Corporation Floating point unit for calculating a compound instruction A+B×C in two cycles
US5548545A (en) * 1995-01-19 1996-08-20 Exponential Technology, Inc. Floating point exception prediction for compound operations and variable precision using an intermediate exponent bus
US5812439A (en) * 1995-10-10 1998-09-22 Microunity Systems Engineering, Inc. Technique of incorporating floating point information into processor instructions
US5864703A (en) * 1997-10-09 1999-01-26 Mips Technologies, Inc. Method for providing extended precision in SIMD vector arithmetic operations
US7197625B1 (en) 1997-10-09 2007-03-27 Mips Technologies, Inc. Alignment and ordering of vector elements for single instruction multiple data processing
US6275838B1 (en) 1997-12-03 2001-08-14 Intrinsity, Inc. Method and apparatus for an enhanced floating point unit with graphics and integer capabilities
US6460134B1 (en) 1997-12-03 2002-10-01 Intrinsity, Inc. Method and apparatus for a late pipeline enhanced floating point unit
US6044454A (en) * 1998-02-19 2000-03-28 International Business Machines Corporation IEEE compliant floating point unit
US6216222B1 (en) * 1998-05-14 2001-04-10 Arm Limited Handling exceptions in a pipelined data processing apparatus
US6732259B1 (en) 1999-07-30 2004-05-04 Mips Technologies, Inc. Processor having a conditional branch extension of an instruction set architecture
US7242414B1 (en) 1999-07-30 2007-07-10 Mips Technologies, Inc. Processor having a compare extension of an instruction set architecture
US6631392B1 (en) 1999-07-30 2003-10-07 Mips Technologies, Inc. Method and apparatus for predicting floating-point exceptions
US6912559B1 (en) 1999-07-30 2005-06-28 Mips Technologies, Inc. System and method for improving the accuracy of reciprocal square root operations performed by a floating-point unit
US7346643B1 (en) 1999-07-30 2008-03-18 Mips Technologies, Inc. Processor with improved accuracy for multiply-add operations
US6714197B1 (en) 1999-07-30 2004-03-30 Mips Technologies, Inc. Processor having an arithmetic extension of an instruction set architecture
US6697832B1 (en) 1999-07-30 2004-02-24 Mips Technologies, Inc. Floating-point processor with improved intermediate result handling
JP2001092662A (ja) 1999-09-22 2001-04-06 Toshiba Corp プロセッサコア及びこれを用いたプロセッサ
US6996596B1 (en) 2000-05-23 2006-02-07 Mips Technologies, Inc. Floating-point processor with operating mode having improved accuracy and high performance
US7599981B2 (en) 2001-02-21 2009-10-06 Mips Technologies, Inc. Binary polynomial multiplier
US7711763B2 (en) 2001-02-21 2010-05-04 Mips Technologies, Inc. Microprocessor instructions for performing polynomial arithmetic operations
US7162621B2 (en) 2001-02-21 2007-01-09 Mips Technologies, Inc. Virtual instruction expansion based on template and parameter selector information specifying sign-extension or concentration
US7181484B2 (en) * 2001-02-21 2007-02-20 Mips Technologies, Inc. Extended-precision accumulation of multiplier output
US7373489B1 (en) * 2004-06-30 2008-05-13 Sun Microsystems, Inc. Apparatus and method for floating-point exception prediction and recovery
US7437538B1 (en) 2004-06-30 2008-10-14 Sun Microsystems, Inc. Apparatus and method for reducing execution latency of floating point operations having special case operands
US7401206B2 (en) * 2004-06-30 2008-07-15 Sun Microsystems, Inc. Apparatus and method for fine-grained multithreading in a multipipelined processor core
JP4500183B2 (ja) 2005-02-25 2010-07-14 東芝機械株式会社 転写装置
US7451171B1 (en) 2008-03-31 2008-11-11 International Business Machines Corporation Systems, methods and computer program products for hardware assists for microcoded floating point divide and square root
US10684852B2 (en) 2017-06-23 2020-06-16 International Business Machines Corporation Employing prefixes to control floating point operations
US10514913B2 (en) 2017-06-23 2019-12-24 International Business Machines Corporation Compiler controls for program regions
US10379851B2 (en) 2017-06-23 2019-08-13 International Business Machines Corporation Fine-grained management of exception enablement of floating point controls
DE102022104815A1 (de) 2022-03-01 2023-09-07 Schaeffler Technologies AG & Co. KG Verfahren zur Steuerung eines Hybridantriebsstrangs
DE102022111312A1 (de) 2022-05-06 2023-11-09 Schaeffler Technologies AG & Co. KG Dedizierter Hybridantriebsstrang und Verfahren zu dessen Steuerung

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53135531A (en) * 1977-05-02 1978-11-27 Hitachi Ltd Data processor
AU549632B2 (en) * 1981-04-23 1986-02-06 Data General Corporation Floating point notation
JPS5892041A (ja) * 1981-11-27 1983-06-01 Hitachi Ltd デ−タ処理装置
JPS5943440A (ja) * 1982-09-03 1984-03-10 Toshiba Corp 演算制御装置
EP0124517A1 (de) * 1982-10-22 1984-11-14 International Business Machines Corporation Beschleunigte befehlsabbildung äusserer quellen- und zielbefehlsströme für fast-echtzeitinjektion in die letzte
JPS59139448A (ja) * 1983-01-28 1984-08-10 Matsushita Electric Ind Co Ltd 浮動小数点乗算装置
US4773035A (en) * 1984-10-19 1988-09-20 Amdahl Corporation Pipelined data processing system utilizing ideal floating point execution condition detection
JPS61288226A (ja) * 1985-06-17 1986-12-18 Panafacom Ltd 外部コンデイシヨン制御方式
US4791557A (en) * 1985-07-31 1988-12-13 Wang Laboratories, Inc. Apparatus and method for monitoring and controlling the prefetching of instructions by an information processing system
US4845659A (en) * 1986-08-15 1989-07-04 International Business Machines Corporation Accelerated validity response permitting early issue of instructions dependent upon outcome of floating point operations

Also Published As

Publication number Publication date
EP0331372A3 (en) 1990-07-04
IL89262A (en) 1992-08-18
DE68926063D1 (de) 1996-05-02
KR890013553A (ko) 1989-09-23
AU603973B2 (en) 1990-11-29
CA1295742C (en) 1992-02-11
KR950003200B1 (ko) 1995-04-04
JP3025776B2 (ja) 2000-03-27
EP0331372B1 (de) 1996-03-27
US4879676A (en) 1989-11-07
EP0331372A2 (de) 1989-09-06
IL89262A0 (en) 1989-09-10
JPH0210427A (ja) 1990-01-16
AU3076589A (en) 1989-08-31

Similar Documents

Publication Publication Date Title
DE68926063D1 (de) Verfahren und Gerät zur Steuerung von prozessoren mittels Vorhersagen von Ausnahmen bei der gleitkomma-Arithmetik
DE69416283D1 (de) Überlaufsteuerung für arithmetische Operationen
ATE186131T1 (de) Gleitkomma-verarbeitungseinheit mit normalisierung
TW345645B (en) Method and apparatus for performing high-precision multiply-add calculations using independent multiply and add instructions
CA931273A (en) Apparatus and method in a multiple operand stream computing system for identifying the specification of multi-task situations and controlling the execution of said tasks
KR900002169A (ko) 부동 소수점 연산장치
EP0328871A3 (de) Statuskode-Voraussagegerät
JPS56155835A (en) Component analyzing method
ES8402954A1 (es) Unidad para tratamiento de informacion.
JPS5776635A (en) Floating multiplying circuit
JPS57172442A (en) Information processor with device for controlling selection of decimal of operand when executing decimal arithmetic command
JPS5729153A (en) Control system for instruction processing order
EP0296071A3 (de) Gerät und Verfahren zur Beschleunigung des effektiven Subtraktionsverfahrens durch die Annäherung des Absolutwerts der Differenz zwischen Exponentargumenten
JPS5330241A (en) Arithmetic unit
BOIS Accuracy in two-dimensional Fourier transform computing
JPS56147246A (en) Program control device
JPS56159734A (en) Arithmetic system
JPH0797312B2 (ja) 演算装置
SU1589270A1 (ru) Устройство дл суммировани двух чисел с плавающей зап той
JPS6448125A (en) Normalization requesting circuit for floating-point arithmetic operation
JP3137636B2 (ja) データ処理装置
JPS5730033A (en) Data processor
JPS57153342A (en) Pipeline computer
ADAMS Implementation and testing of numerical analysis techniques in avionics applications[M. S. Thesis]
JPS5487446A (en) Data processor

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: MIPS TECHNOLOGIES,INC., MOUNTAIN VIEW,CALIF.,, US