IL89262A - Method and apparatus for predicting floating point exceptions - Google Patents

Method and apparatus for predicting floating point exceptions

Info

Publication number
IL89262A
IL89262A IL89262A IL8926289A IL89262A IL 89262 A IL89262 A IL 89262A IL 89262 A IL89262 A IL 89262A IL 8926289 A IL8926289 A IL 8926289A IL 89262 A IL89262 A IL 89262A
Authority
IL
Israel
Prior art keywords
computation
floating point
exception
indication
subtract
Prior art date
Application number
IL89262A
Other languages
English (en)
Other versions
IL89262A0 (en
Original Assignee
Mips Computer Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mips Computer Systems Inc filed Critical Mips Computer Systems Inc
Publication of IL89262A0 publication Critical patent/IL89262A0/xx
Publication of IL89262A publication Critical patent/IL89262A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/386—Special constructional features
    • G06F2207/3884—Pipelining
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905—Exception handling
    • G06F7/4991—Overflow or underflow
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • Nonlinear Science (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
IL89262A 1988-02-29 1989-02-10 Method and apparatus for predicting floating point exceptions IL89262A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/161,543 US4879676A (en) 1988-02-29 1988-02-29 Method and apparatus for precise floating point exceptions

Publications (2)

Publication Number Publication Date
IL89262A0 IL89262A0 (en) 1989-09-10
IL89262A true IL89262A (en) 1992-08-18

Family

ID=22581611

Family Applications (1)

Application Number Title Priority Date Filing Date
IL89262A IL89262A (en) 1988-02-29 1989-02-10 Method and apparatus for predicting floating point exceptions

Country Status (8)

Country Link
US (1) US4879676A (de)
EP (1) EP0331372B1 (de)
JP (1) JP3025776B2 (de)
KR (1) KR950003200B1 (de)
AU (1) AU603973B2 (de)
CA (1) CA1295742C (de)
DE (1) DE68926063T2 (de)
IL (1) IL89262A (de)

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JP2682232B2 (ja) * 1990-11-21 1997-11-26 松下電器産業株式会社 浮動小数点演算処理装置
JP2925818B2 (ja) * 1991-04-05 1999-07-28 株式会社東芝 並列処理制御装置
DE69231720T2 (de) * 1991-12-10 2001-06-21 Fujitsu Ltd Speicherzugriffsvorrichtung mit Adresspipeline
US5257216A (en) * 1992-06-10 1993-10-26 Intel Corporation Floating point safe instruction recognition apparatus
US5559977A (en) * 1992-08-04 1996-09-24 Intel Corporation Method and apparatus for executing floating point (FP) instruction pairs in a pipelined processor by stalling the following FP instructions in an execution stage
US5481275A (en) 1992-11-02 1996-01-02 The 3Do Company Resolution enhancement for video display using multi-line interpolation
US5572235A (en) * 1992-11-02 1996-11-05 The 3Do Company Method and apparatus for processing image data
US5596693A (en) * 1992-11-02 1997-01-21 The 3Do Company Method for controlling a spryte rendering processor
US5838389A (en) * 1992-11-02 1998-11-17 The 3Do Company Apparatus and method for updating a CLUT during horizontal blanking
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JP2847688B2 (ja) * 1993-05-27 1999-01-20 松下電器産業株式会社 プログラム変換装置およびプロセッサ
US5752013A (en) * 1993-06-30 1998-05-12 Intel Corporation Method and apparatus for providing precise fault tracing in a superscalar microprocessor
KR0175116B1 (ko) * 1993-12-15 1999-04-01 윌리엄 더블유. 켈리 명령 인출 및 해제제어를 함유한 슈퍼스칼라 마이크로프로세서명령파이프라인
US5537538A (en) * 1993-12-15 1996-07-16 Silicon Graphics, Inc. Debug mode for a superscalar RISC processor
WO1995016955A1 (en) * 1993-12-15 1995-06-22 Silicon Graphics, Inc. Load latency of zero for floating point load instructions using a load data queue
DE4434895C2 (de) * 1993-12-23 1998-12-24 Hewlett Packard Co Verfahren und Vorrichtung zur Behandlung von Ausnahmebedingungen
TW260765B (de) * 1994-03-31 1995-10-21 Ibm
US5530663A (en) * 1994-11-14 1996-06-25 International Business Machines Corporation Floating point unit for calculating a compound instruction A+B×C in two cycles
US5548545A (en) * 1995-01-19 1996-08-20 Exponential Technology, Inc. Floating point exception prediction for compound operations and variable precision using an intermediate exponent bus
US5812439A (en) * 1995-10-10 1998-09-22 Microunity Systems Engineering, Inc. Technique of incorporating floating point information into processor instructions
US5864703A (en) * 1997-10-09 1999-01-26 Mips Technologies, Inc. Method for providing extended precision in SIMD vector arithmetic operations
US7197625B1 (en) 1997-10-09 2007-03-27 Mips Technologies, Inc. Alignment and ordering of vector elements for single instruction multiple data processing
US6460134B1 (en) 1997-12-03 2002-10-01 Intrinsity, Inc. Method and apparatus for a late pipeline enhanced floating point unit
US6275838B1 (en) 1997-12-03 2001-08-14 Intrinsity, Inc. Method and apparatus for an enhanced floating point unit with graphics and integer capabilities
US6044454A (en) * 1998-02-19 2000-03-28 International Business Machines Corporation IEEE compliant floating point unit
US6216222B1 (en) * 1998-05-14 2001-04-10 Arm Limited Handling exceptions in a pipelined data processing apparatus
US7242414B1 (en) 1999-07-30 2007-07-10 Mips Technologies, Inc. Processor having a compare extension of an instruction set architecture
US6732259B1 (en) 1999-07-30 2004-05-04 Mips Technologies, Inc. Processor having a conditional branch extension of an instruction set architecture
US6697832B1 (en) 1999-07-30 2004-02-24 Mips Technologies, Inc. Floating-point processor with improved intermediate result handling
US7346643B1 (en) 1999-07-30 2008-03-18 Mips Technologies, Inc. Processor with improved accuracy for multiply-add operations
US6714197B1 (en) 1999-07-30 2004-03-30 Mips Technologies, Inc. Processor having an arithmetic extension of an instruction set architecture
US6631392B1 (en) 1999-07-30 2003-10-07 Mips Technologies, Inc. Method and apparatus for predicting floating-point exceptions
US6912559B1 (en) 1999-07-30 2005-06-28 Mips Technologies, Inc. System and method for improving the accuracy of reciprocal square root operations performed by a floating-point unit
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US6996596B1 (en) 2000-05-23 2006-02-07 Mips Technologies, Inc. Floating-point processor with operating mode having improved accuracy and high performance
US7599981B2 (en) 2001-02-21 2009-10-06 Mips Technologies, Inc. Binary polynomial multiplier
US7181484B2 (en) * 2001-02-21 2007-02-20 Mips Technologies, Inc. Extended-precision accumulation of multiplier output
US7711763B2 (en) 2001-02-21 2010-05-04 Mips Technologies, Inc. Microprocessor instructions for performing polynomial arithmetic operations
US7162621B2 (en) 2001-02-21 2007-01-09 Mips Technologies, Inc. Virtual instruction expansion based on template and parameter selector information specifying sign-extension or concentration
US7373489B1 (en) * 2004-06-30 2008-05-13 Sun Microsystems, Inc. Apparatus and method for floating-point exception prediction and recovery
US7437538B1 (en) 2004-06-30 2008-10-14 Sun Microsystems, Inc. Apparatus and method for reducing execution latency of floating point operations having special case operands
US7401206B2 (en) * 2004-06-30 2008-07-15 Sun Microsystems, Inc. Apparatus and method for fine-grained multithreading in a multipipelined processor core
JP4500183B2 (ja) 2005-02-25 2010-07-14 東芝機械株式会社 転写装置
US7451171B1 (en) 2008-03-31 2008-11-11 International Business Machines Corporation Systems, methods and computer program products for hardware assists for microcoded floating point divide and square root
US10514913B2 (en) 2017-06-23 2019-12-24 International Business Machines Corporation Compiler controls for program regions
US10379851B2 (en) 2017-06-23 2019-08-13 International Business Machines Corporation Fine-grained management of exception enablement of floating point controls
US10684852B2 (en) 2017-06-23 2020-06-16 International Business Machines Corporation Employing prefixes to control floating point operations
DE102022104815A1 (de) 2022-03-01 2023-09-07 Schaeffler Technologies AG & Co. KG Verfahren zur Steuerung eines Hybridantriebsstrangs
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Also Published As

Publication number Publication date
JP3025776B2 (ja) 2000-03-27
US4879676A (en) 1989-11-07
KR950003200B1 (ko) 1995-04-04
IL89262A0 (en) 1989-09-10
DE68926063T2 (de) 1996-11-28
AU603973B2 (en) 1990-11-29
EP0331372B1 (de) 1996-03-27
EP0331372A3 (en) 1990-07-04
AU3076589A (en) 1989-08-31
EP0331372A2 (de) 1989-09-06
CA1295742C (en) 1992-02-11
JPH0210427A (ja) 1990-01-16
DE68926063D1 (de) 1996-05-02
KR890013553A (ko) 1989-09-23

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