JPS5487446A - Data processor - Google Patents

Data processor

Info

Publication number
JPS5487446A
JPS5487446A JP15595377A JP15595377A JPS5487446A JP S5487446 A JPS5487446 A JP S5487446A JP 15595377 A JP15595377 A JP 15595377A JP 15595377 A JP15595377 A JP 15595377A JP S5487446 A JPS5487446 A JP S5487446A
Authority
JP
Japan
Prior art keywords
data
floating
point data
log
transform processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15595377A
Other languages
Japanese (ja)
Inventor
Shinichiro Yamashita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15595377A priority Critical patent/JPS5487446A/en
Publication of JPS5487446A publication Critical patent/JPS5487446A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To extend the range of numeric data by equipping a data processor which processes floating-point data with a logarithm transform processing part converting floating-point data into logarithms and by performing a process by the logarithm floating-point data of the floaing-poing data.
CONSTITUTION: When two kinds of floating-point data X and Y and two kinds of logarithmic-value floating data (log x) and (log y) are given, their operand data are set to registers 1 and 2 respectively and converted by logarithm transform processing parts 2 and 3 inverse transform processing parts 5 and 6 into pieces of data X and Y, and (log x) and (log y) which are inputted to arithmetic circuit part 8. This arithmetic circuit part 8 is provided with floating-point data arithemetic circuit 9, logarithmic-value floating-point data arithmetic circuit 10 and overflow detection part 11 detecting an overflow, so that gates 19 and 20 will be controlled when an overflow or underflow occurs.
COPYRIGHT: (C)1979,JPO&Japio
JP15595377A 1977-12-23 1977-12-23 Data processor Pending JPS5487446A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15595377A JPS5487446A (en) 1977-12-23 1977-12-23 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15595377A JPS5487446A (en) 1977-12-23 1977-12-23 Data processor

Publications (1)

Publication Number Publication Date
JPS5487446A true JPS5487446A (en) 1979-07-11

Family

ID=15617129

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15595377A Pending JPS5487446A (en) 1977-12-23 1977-12-23 Data processor

Country Status (1)

Country Link
JP (1) JPS5487446A (en)

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