JPS54158830A - High-speed arithmetic processing system - Google Patents

High-speed arithmetic processing system

Info

Publication number
JPS54158830A
JPS54158830A JP6806378A JP6806378A JPS54158830A JP S54158830 A JPS54158830 A JP S54158830A JP 6806378 A JP6806378 A JP 6806378A JP 6806378 A JP6806378 A JP 6806378A JP S54158830 A JPS54158830 A JP S54158830A
Authority
JP
Japan
Prior art keywords
digit
actual
overflow
operands
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6806378A
Other languages
Japanese (ja)
Other versions
JPS6051728B2 (en
Inventor
Shigemi Uemoto
Shigeaki Okuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP53068063A priority Critical patent/JPS6051728B2/en
Publication of JPS54158830A publication Critical patent/JPS54158830A/en
Publication of JPS6051728B2 publication Critical patent/JPS6051728B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to perform arithmetic processing at a high speed as possible by making a decision on whether the mode of digit shift processing is needed, unneeded or undefined, before executing actual addition and actual subtraction.
CONSTITUTION: When actual addition AA is executed regarding the addition and subtraction between the lst and 2nd operands OP1 and OP2 with decimal places expressed by hexadecimal notation, it is clear that after exponent matching between both the operands is done actually, the execution of AA results in a digit overflow in region A1 without fail through the comparison between bits more than the highest digits of the decimal places of both the operands. For the purpose, one-digit right shift processing after AA is required corresponding to the digit overflow. In terms of region A2, the result of AA has no digit overflow, it becomes the decimal place of operand as it is. In terms of region A3, it is uncertain whether the overflow is causes or not and POST NORMALIZE procssing is required after actual AA process.
COPYRIGHT: (C)1979,JPO&Japio
JP53068063A 1978-06-06 1978-06-06 High-speed calculation processing method Expired JPS6051728B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53068063A JPS6051728B2 (en) 1978-06-06 1978-06-06 High-speed calculation processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53068063A JPS6051728B2 (en) 1978-06-06 1978-06-06 High-speed calculation processing method

Publications (2)

Publication Number Publication Date
JPS54158830A true JPS54158830A (en) 1979-12-15
JPS6051728B2 JPS6051728B2 (en) 1985-11-15

Family

ID=13362941

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53068063A Expired JPS6051728B2 (en) 1978-06-06 1978-06-06 High-speed calculation processing method

Country Status (1)

Country Link
JP (1) JPS6051728B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56105539A (en) * 1980-01-28 1981-08-22 Kokusai Denshin Denwa Co Ltd <Kdd> Adder of pcm signal
JPS595346A (en) * 1982-06-30 1984-01-12 Fujitsu Ltd Operation controlling system
JPS62187933A (en) * 1987-02-06 1987-08-17 Hitachi Ltd Adder/subtractor
JPS6312025A (en) * 1987-02-06 1988-01-19 Hitachi Ltd Adding and subtracting device
JPS6353138U (en) * 1987-09-02 1988-04-09
JPS63171842U (en) * 1988-01-20 1988-11-08

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6225389U (en) * 1985-07-30 1987-02-16

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56105539A (en) * 1980-01-28 1981-08-22 Kokusai Denshin Denwa Co Ltd <Kdd> Adder of pcm signal
JPS595346A (en) * 1982-06-30 1984-01-12 Fujitsu Ltd Operation controlling system
JPS6341089B2 (en) * 1982-06-30 1988-08-15 Fujitsu Ltd
JPS62187933A (en) * 1987-02-06 1987-08-17 Hitachi Ltd Adder/subtractor
JPS6312025A (en) * 1987-02-06 1988-01-19 Hitachi Ltd Adding and subtracting device
JPH026089B2 (en) * 1987-02-06 1990-02-07 Hitachi Seisakusho Kk
JPH0353650B2 (en) * 1987-02-06 1991-08-15 Hitachi Seisakusho Kk
JPS6353138U (en) * 1987-09-02 1988-04-09
JPS63171842U (en) * 1988-01-20 1988-11-08

Also Published As

Publication number Publication date
JPS6051728B2 (en) 1985-11-15

Similar Documents

Publication Publication Date Title
JPS54158830A (en) High-speed arithmetic processing system
JPS5533237A (en) Microprogram controller
JPS5720842A (en) Overflow detecting system
JPS55154606A (en) Input fetch system for sequence controller
JPS56147237A (en) Operation processing device
JPS55103656A (en) Information processing system
JPS5663649A (en) Parallel multiplication apparatus
JPS55116143A (en) Data processor
JPS56121148A (en) Arithmetic control equipment
JPS55119739A (en) Binary-decimal conversion system
JPS61282928A (en) Floating-point arithmetic unit
JPS57196351A (en) Floating point multiplying circuit
JPS54100633A (en) Miniature electronic computer
JPS5667453A (en) Information processor with data generation part
JPS5690343A (en) Data normalization device
JPS6442732A (en) Information processor
JPS54159832A (en) Adder and subtractor for numbers different in data length
JPS52147036A (en) Operation control system
JPS60235241A (en) Floating point adding circuit
JPS5771045A (en) Digital mulitplier
JPS5549743A (en) Round arithmetic operation control system
JPS57125441A (en) Operaton system
JPS52144922A (en) Numeric input unit
JPS553064A (en) Binary/decimal adder device
JPS6484332A (en) Arithmetic unit